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📄 stm32f10x_spi.s79

📁 STM32利用正交编码器实现电机的控制
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//////////////////////////////////////////////////////////////////////////////
//                                                                           /
// IAR ARM ANSI C/C++ Compiler V4.42A/W32              15/May/2008  12:06:32 /
// Copyright 1999-2005 IAR Systems. All rights reserved.                     /
//                                                                           /
//    Cpu mode        =  thumb                                               /
//    Endian          =  little                                              /
//    Stack alignment =  4                                                   /
//    Source file     =  C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM       /
//                       Encoder\example\FWLib\src\stm32f10x_spi.c           /
//    Command line    =  "C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM      /
//                       Encoder\example\FWLib\src\stm32f10x_spi.c" -D       /
//                       VECT_TAB_FLASH -lcN "C:\David JIANG\ST              /
//                       MCU\Docs\STM32\AN_JIANG\TIM                         /
//                       Encoder\example\project\EWARM\BOOT_FLASH\List\"     /
//                       -lb "C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM  /
//                       Encoder\example\project\EWARM\BOOT_FLASH\List\" -o  /
//                       "C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM      /
//                       Encoder\example\project\EWARM\BOOT_FLASH\Obj\" -z3  /
//                       --no_cse --no_unroll --no_inline --no_code_motion   /
//                       --no_tbaa --no_clustering --no_scheduling --debug   /
//                       --cpu_mode thumb --endian little --cpu cortex-M3    /
//                       --stack_align 4 --require_prototypes --fpu None     /
//                       --dlib_config "C:\Program Files\IAR                 /
//                       Systems\Embedded Workbench                          /
//                       4.0\arm\LIB\dl7mptnnl8f.h" -I "C:\David JIANG\ST    /
//                       MCU\Docs\STM32\AN_JIANG\TIM                         /
//                       Encoder\example\project\EWARM\" -I "C:\David        /
//                       JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM                /
//                       Encoder\example\project\EWARM\..\include\" -I       /
//                       "C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM      /
//                       Encoder\example\project\EWARM\..\..\FWLib\inc\" -I  /
//                       "C:\Program Files\IAR Systems\Embedded Workbench    /
//                       4.0\arm\INC\"                                       /
//    List file       =  C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM       /
//                       Encoder\example\project\EWARM\BOOT_FLASH\List\stm32 /
//                       f10x_spi.s79                                        /
//                                                                           /
//                                                                           /
//////////////////////////////////////////////////////////////////////////////

        NAME stm32f10x_spi

        RSEG CSTACK:DATA:NOROOT(2)

??DataTable0 EQU 0
??DataTable1 EQU 0
??DataTable10 EQU 0
??DataTable11 EQU 0
??DataTable12 EQU 0
??DataTable13 EQU 0
??DataTable14 EQU 0
??DataTable15 EQU 0
??DataTable16 EQU 0
??DataTable17 EQU 0
??DataTable19 EQU 0
??DataTable2 EQU 0
??DataTable20 EQU 0
??DataTable21 EQU 0
??DataTable22 EQU 0
??DataTable3 EQU 0
??DataTable4 EQU 0
??DataTable5 EQU 0
??DataTable6 EQU 0
??DataTable7 EQU 0
??DataTable8 EQU 0
??DataTable9 EQU 0
        MULTWEAK ??RCC_APB1PeriphResetCmd??rT
        MULTWEAK ??RCC_APB2PeriphResetCmd??rT
        MULTWEAK ??assert_failed??rT
        PUBLIC SPI_BiDirectionalLineConfig
        PUBLIC SPI_CalculateCRC
        PUBLIC SPI_ClearFlag
        PUBLIC SPI_ClearITPendingBit
        PUBLIC SPI_Cmd
        PUBLIC SPI_DMACmd
        PUBLIC SPI_DataSizeConfig
        PUBLIC SPI_DeInit
        PUBLIC SPI_GetCRC
        PUBLIC SPI_GetCRCPolynomial
        PUBLIC SPI_GetFlagStatus
        PUBLIC SPI_GetITStatus
        PUBLIC SPI_ITConfig
        PUBLIC SPI_Init
        PUBLIC SPI_NSSInternalSoftwareConfig
        PUBLIC SPI_ReceiveData
        PUBLIC SPI_SSOutputCmd
        PUBLIC SPI_SendData
        PUBLIC SPI_StructInit
        PUBLIC SPI_TransmitCRC

RCC_APB1PeriphResetCmd SYMBOL "RCC_APB1PeriphResetCmd"
RCC_APB2PeriphResetCmd SYMBOL "RCC_APB2PeriphResetCmd"
assert_failed       SYMBOL "assert_failed"
??RCC_APB1PeriphResetCmd??rT SYMBOL "??rT", RCC_APB1PeriphResetCmd
??RCC_APB2PeriphResetCmd??rT SYMBOL "??rT", RCC_APB2PeriphResetCmd
??assert_failed??rT SYMBOL "??rT", assert_failed

        EXTERN RCC_APB1PeriphResetCmd
        EXTERN RCC_APB2PeriphResetCmd
        EXTERN assert_failed


        RSEG CODE:CODE:NOROOT(2)
        THUMB
SPI_DeInit:
        PUSH     {LR}
        LDR.N    R1,??SPI_DeInit_0  ;; 0x40003800
        CMP      R0,R1
        BEQ.N    ??SPI_DeInit_1
        LDR.N    R1,??SPI_DeInit_0+0x4  ;; 0x40013000
        CMP      R0,R1
        BNE.N    ??SPI_DeInit_2
??SPI_DeInit_3:
        MOVS     R1,#+1
        MOVS     R0,#+4096
        _BLF     RCC_APB2PeriphResetCmd,??RCC_APB2PeriphResetCmd??rT
        MOVS     R1,#+0
        MOVS     R0,#+4096
        _BLF     RCC_APB2PeriphResetCmd,??RCC_APB2PeriphResetCmd??rT
        B.N      ??SPI_DeInit_2
??SPI_DeInit_1:
        MOVS     R1,#+1
        MOVS     R0,#+16384
        _BLF     RCC_APB1PeriphResetCmd,??RCC_APB1PeriphResetCmd??rT
        MOVS     R1,#+0
        MOVS     R0,#+16384
        _BLF     RCC_APB1PeriphResetCmd,??RCC_APB1PeriphResetCmd??rT
??SPI_DeInit_2:
        POP      {PC}             ;; return
        Nop      
        DATA
??SPI_DeInit_0:
        DC32     0x40003800
        DC32     0x40013000

        RSEG CODE:CODE:NOROOT(2)
        THUMB
SPI_Init:
        PUSH     {R4,R5,LR}
        MOVS     R4,R0
        MOVS     R5,R1
        MOVS     R1,#+0
        LDRH     R0,[R5, #+0]
        CMP      R0,#+0
        BEQ.N    ??SPI_Init_0
        LDRH     R0,[R5, #+0]
        MOVS     R1,#+1024
        CMP      R0,R1
        BEQ.N    ??SPI_Init_0
        LDRH     R0,[R5, #+0]
        MOVS     R1,#+32768
        CMP      R0,R1
        BEQ.N    ??SPI_Init_0
        LDRH     R0,[R5, #+0]
        MOVS     R1,#+49152
        CMP      R0,R1
        BEQ.N    ??SPI_Init_0
        MOVS     R1,#+97
        LDR.N    R0,??DataTable18  ;; `?<Constant "C:\\\\David JIANG\\\\ST MCU...">`
        _BLF     assert_failed,??assert_failed??rT
??SPI_Init_0:
        LDRH     R0,[R5, #+2]
        MOVS     R1,#+260
        CMP      R0,R1
        BEQ.N    ??SPI_Init_1
        LDRH     R0,[R5, #+2]
        CMP      R0,#+0
        BEQ.N    ??SPI_Init_1
        MOVS     R1,#+98
        LDR.N    R0,??DataTable18  ;; `?<Constant "C:\\\\David JIANG\\\\ST MCU...">`
        _BLF     assert_failed,??assert_failed??rT
??SPI_Init_1:
        LDRH     R0,[R5, #+4]
        MOVS     R1,#+2048
        CMP      R0,R1
        BEQ.N    ??SPI_Init_2
        LDRH     R0,[R5, #+4]
        CMP      R0,#+0
        BEQ.N    ??SPI_Init_2
        MOVS     R1,#+99
        LDR.N    R0,??DataTable18  ;; `?<Constant "C:\\\\David JIANG\\\\ST MCU...">`
        _BLF     assert_failed,??assert_failed??rT
??SPI_Init_2:
        LDRH     R0,[R5, #+6]
        CMP      R0,#+0
        BEQ.N    ??SPI_Init_3
        LDRH     R0,[R5, #+6]
        CMP      R0,#+2
        BEQ.N    ??SPI_Init_3
        MOVS     R1,#+100
        LDR.N    R0,??DataTable18  ;; `?<Constant "C:\\\\David JIANG\\\\ST MCU...">`
        _BLF     assert_failed,??assert_failed??rT
??SPI_Init_3:
        LDRH     R0,[R5, #+8]
        CMP      R0,#+0
        BEQ.N    ??SPI_Init_4
        LDRH     R0,[R5, #+8]
        CMP      R0,#+1
        BEQ.N    ??SPI_Init_4
        MOVS     R1,#+101
        LDR.N    R0,??DataTable18  ;; `?<Constant "C:\\\\David JIANG\\\\ST MCU...">`
        _BLF     assert_failed,??assert_failed??rT
??SPI_Init_4:
        LDRH     R0,[R5, #+10]
        MOVS     R1,#+512
        CMP      R0,R1
        BEQ.N    ??SPI_Init_5
        LDRH     R0,[R5, #+10]
        CMP      R0,#+0
        BEQ.N    ??SPI_Init_5
        MOVS     R1,#+102
        LDR.N    R0,??DataTable18  ;; `?<Constant "C:\\\\David JIANG\\\\ST MCU...">`
        _BLF     assert_failed,??assert_failed??rT
??SPI_Init_5:
        LDRH     R0,[R5, #+12]
        CMP      R0,#+0
        BEQ.N    ??SPI_Init_6
        LDRH     R0,[R5, #+12]
        CMP      R0,#+8
        BEQ.N    ??SPI_Init_6
        LDRH     R0,[R5, #+12]
        CMP      R0,#+16
        BEQ.N    ??SPI_Init_6
        LDRH     R0,[R5, #+12]
        CMP      R0,#+24
        BEQ.N    ??SPI_Init_6
        LDRH     R0,[R5, #+12]
        CMP      R0,#+32
        BEQ.N    ??SPI_Init_6
        LDRH     R0,[R5, #+12]
        CMP      R0,#+40
        BEQ.N    ??SPI_Init_6
        LDRH     R0,[R5, #+12]
        CMP      R0,#+48
        BEQ.N    ??SPI_Init_6
        LDRH     R0,[R5, #+12]
        CMP      R0,#+56
        BEQ.N    ??SPI_Init_6
        MOVS     R1,#+103
        LDR.N    R0,??DataTable18  ;; `?<Constant "C:\\\\David JIANG\\\\ST MCU...">`
        _BLF     assert_failed,??assert_failed??rT
??SPI_Init_6:
        LDRH     R0,[R5, #+14]
        CMP      R0,#+0
        BEQ.N    ??SPI_Init_7
        LDRH     R0,[R5, #+14]
        CMP      R0,#+128
        BEQ.N    ??SPI_Init_7
        MOVS     R1,#+104
        LDR.N    R0,??DataTable18  ;; `?<Constant "C:\\\\David JIANG\\\\ST MCU...">`
        _BLF     assert_failed,??assert_failed??rT
??SPI_Init_7:
        LDRH     R0,[R5, #+16]
        CMP      R0,#+1
        BCS.N    ??SPI_Init_8
        MOVS     R1,#+105
        LDR.N    R0,??DataTable18  ;; `?<Constant "C:\\\\David JIANG\\\\ST MCU...">`
        _BLF     assert_failed,??assert_failed??rT
??SPI_Init_8:
        LDRH     R1,[R4, #+0]
        ANDS     R1,R1,#0x3040
        MOVS     R0,R1
        LDRH     R1,[R5, #+0]
        LDRH     R2,[R5, #+2]
        ORRS     R2,R2,R1
        LDRH     R1,[R5, #+4]
        ORRS     R1,R1,R2
        LDRH     R2,[R5, #+6]
        ORRS     R2,R2,R1
        LDRH     R1,[R5, #+8]
        ORRS     R1,R1,R2
        LDRH     R2,[R5, #+10]
        ORRS     R2,R2,R1
        LDRH     R3,[R5, #+12]
        ORRS     R3,R3,R2
        LDRH     R1,[R5, #+14]
        ORRS     R1,R1,R3
        ORRS     R1,R1,R0
        STRH     R1,[R4, #+0]
        LDRH     R0,[R5, #+16]
        STRH     R0,[R4, #+16]
        POP      {R4,R5,PC}       ;; return

        RSEG CODE:CODE:NOROOT(2)
        THUMB
SPI_StructInit:
        MOVS     R1,#+0
        STRH     R1,[R0, #+0]
        MOVS     R1,#+0
        STRH     R1,[R0, #+2]
        MOVS     R1,#+0
        STRH     R1,[R0, #+4]
        MOVS     R1,#+0
        STRH     R1,[R0, #+6]
        MOVS     R1,#+0
        STRH     R1,[R0, #+8]
        MOVS     R1,#+0
        STRH     R1,[R0, #+10]
        MOVS     R1,#+0
        STRH     R1,[R0, #+12]
        MOVS     R1,#+0
        STRH     R1,[R0, #+14]
        MOVS     R1,#+7
        STRH     R1,[R0, #+16]
        BX       LR               ;; return

        RSEG CODE:CODE:NOROOT(2)
        THUMB
SPI_Cmd:
        PUSH     {R4,R5,LR}
        MOVS     R4,R0
        MOVS     R5,R1
        CMP      R5,#+0
        BEQ.N    ??SPI_Cmd_0
        CMP      R5,#+1
        BEQ.N    ??SPI_Cmd_0
        MOVS     R1,#+183
        LDR.N    R0,??DataTable18  ;; `?<Constant "C:\\\\David JIANG\\\\ST MCU...">`
        _BLF     assert_failed,??assert_failed??rT
??SPI_Cmd_0:
        CMP      R5,#+0
        BEQ.N    ??SPI_Cmd_1
        LDRH     R0,[R4, #+0]
        ORRS     R0,R0,#0x40
        STRH     R0,[R4, #+0]
        B.N      ??SPI_Cmd_2
??SPI_Cmd_1:
        LDRH     R0,[R4, #+0]
        LDR.N    R1,??SPI_Cmd_3   ;; 0xffbf
        ANDS     R1,R1,R0
        STRH     R1,[R4, #+0]
??SPI_Cmd_2:
        POP      {R4,R5,PC}       ;; return
        Nop      
        DATA
??SPI_Cmd_3:
        DC32     0xffbf

        RSEG CODE:CODE:NOROOT(2)
        THUMB
SPI_ITConfig:
        PUSH     {R4-R6,LR}
        MOVS     R4,R0
        MOVS     R5,R1
        MOVS     R6,R2
        MOVS     R0,#+0
        MOVS     R1,#+0
        CMP      R6,#+0
        BEQ.N    ??SPI_ITConfig_0
        CMP      R6,#+1
        BEQ.N    ??SPI_ITConfig_0
        MOVS     R1,#+217
        LDR.N    R0,??DataTable18  ;; `?<Constant "C:\\\\David JIANG\\\\ST MCU...">`
        _BLF     assert_failed,??assert_failed??rT
??SPI_ITConfig_0:
        CMP      R5,#+113
        BEQ.N    ??SPI_ITConfig_1
        CMP      R5,#+96
        BEQ.N    ??SPI_ITConfig_1
        CMP      R5,#+80
        BEQ.N    ??SPI_ITConfig_1
        MOVS     R1,#+218
        LDR.N    R0,??DataTable18  ;; `?<Constant "C:\\\\David JIANG\\\\ST MCU...">`
        _BLF     assert_failed,??assert_failed??rT
??SPI_ITConfig_1:
        MOVS     R0,R5
        LSLS     R0,R0,#+24       ;; ZeroExtS R0,R0,#+24,#+24
        LSRS     R0,R0,#+24
        LSRS     R0,R0,#+4
        LSLS     R0,R0,#+24       ;; ZeroExtS R0,R0,#+24,#+24
        LSRS     R0,R0,#+24
        MOVS     R1,#+1
        LSLS     R1,R1,R0
        CMP      R6,#+0
        BEQ.N    ??SPI_ITConfig_2
        LDRH     R0,[R4, #+4]
        ORRS     R1,R1,R0
        STRH     R1,[R4, #+4]
        B.N      ??SPI_ITConfig_3
??SPI_ITConfig_2:
        LDRH     R0,[R4, #+4]
        BICS     R0,R0,R1
        STRH     R0,[R4, #+4]
??SPI_ITConfig_3:
        POP      {R4-R6,PC}       ;; return

        RSEG CODE:CODE:NOROOT(2)
        THUMB
SPI_DMACmd:
        PUSH     {R4-R6,LR}
        MOVS     R4,R0
        MOVS     R5,R1
        MOVS     R6,R2
        CMP      R6,#+0
        BEQ.N    ??SPI_DMACmd_0
        CMP      R6,#+1
        BEQ.N    ??SPI_DMACmd_0
        MOVS     R1,#+254
        LDR.N    R0,??DataTable18  ;; `?<Constant "C:\\\\David JIANG\\\\ST MCU...">`
        _BLF     assert_failed,??assert_failed??rT
??SPI_DMACmd_0:
        LDR.N    R0,??SPI_DMACmd_1  ;; 0xfffc
        TST      R5,R0
        BNE.N    ??SPI_DMACmd_2
        CMP      R5,#+0
        BNE.N    ??SPI_DMACmd_3
??SPI_DMACmd_2:
        MOVS     R1,#+255
        LDR.N    R0,??DataTable18  ;; `?<Constant "C:\\\\David JIANG\\\\ST MCU...">`
        _BLF     assert_failed,??assert_failed??rT
??SPI_DMACmd_3:
        CMP      R6,#+0
        BEQ.N    ??SPI_DMACmd_4
        LDRH     R0,[R4, #+4]
        ORRS     R5,R5,R0
        STRH     R5,[R4, #+4]
        B.N      ??SPI_DMACmd_5
??SPI_DMACmd_4:
        LDRH     R0,[R4, #+4]
        BICS     R0,R0,R5
        STRH     R0,[R4, #+4]
??SPI_DMACmd_5:
        POP      {R4-R6,PC}       ;; return
        Nop      
        DATA
??SPI_DMACmd_1:
        DC32     0xfffc

        RSEG CODE:CODE:NOROOT(2)
        THUMB
SPI_SendData:
        STRH     R1,[R0, #+12]
        BX       LR               ;; return

        RSEG CODE:CODE:NOROOT(2)
        THUMB
SPI_ReceiveData:
        LDRH     R0,[R0, #+12]
        BX       LR               ;; return

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