📄 stm32f10x_iwdg.s79
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//////////////////////////////////////////////////////////////////////////////
// /
// IAR ARM ANSI C/C++ Compiler V4.42A/W32 15/May/2008 12:06:31 /
// Copyright 1999-2005 IAR Systems. All rights reserved. /
// /
// Cpu mode = thumb /
// Endian = little /
// Stack alignment = 4 /
// Source file = C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM /
// Encoder\example\FWLib\src\stm32f10x_iwdg.c /
// Command line = "C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM /
// Encoder\example\FWLib\src\stm32f10x_iwdg.c" -D /
// VECT_TAB_FLASH -lcN "C:\David JIANG\ST /
// MCU\Docs\STM32\AN_JIANG\TIM /
// Encoder\example\project\EWARM\BOOT_FLASH\List\" /
// -lb "C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM /
// Encoder\example\project\EWARM\BOOT_FLASH\List\" -o /
// "C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM /
// Encoder\example\project\EWARM\BOOT_FLASH\Obj\" -z3 /
// --no_cse --no_unroll --no_inline --no_code_motion /
// --no_tbaa --no_clustering --no_scheduling --debug /
// --cpu_mode thumb --endian little --cpu cortex-M3 /
// --stack_align 4 --require_prototypes --fpu None /
// --dlib_config "C:\Program Files\IAR /
// Systems\Embedded Workbench /
// 4.0\arm\LIB\dl7mptnnl8f.h" -I "C:\David JIANG\ST /
// MCU\Docs\STM32\AN_JIANG\TIM /
// Encoder\example\project\EWARM\" -I "C:\David /
// JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM /
// Encoder\example\project\EWARM\..\include\" -I /
// "C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM /
// Encoder\example\project\EWARM\..\..\FWLib\inc\" -I /
// "C:\Program Files\IAR Systems\Embedded Workbench /
// 4.0\arm\INC\" /
// List file = C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM /
// Encoder\example\project\EWARM\BOOT_FLASH\List\stm32 /
// f10x_iwdg.s79 /
// /
// /
//////////////////////////////////////////////////////////////////////////////
NAME stm32f10x_iwdg
RSEG CSTACK:DATA:NOROOT(2)
??DataTable0 EQU 0
??DataTable1 EQU 0
??DataTable2 EQU 0
??DataTable3 EQU 0
??DataTable4 EQU 0
??DataTable5 EQU 0
??DataTable6 EQU 0
??DataTable7 EQU 0
MULTWEAK ??assert_failed??rT
PUBLIC IWDG_Enable
PUBLIC IWDG_GetFlagStatus
PUBLIC IWDG_ReloadCounter
PUBLIC IWDG_SetPrescaler
PUBLIC IWDG_SetReload
PUBLIC IWDG_WriteAccessCmd
assert_failed SYMBOL "assert_failed"
??assert_failed??rT SYMBOL "??rT", assert_failed
EXTERN IWDG
EXTERN assert_failed
RSEG CODE:CODE:NOROOT(2)
THUMB
IWDG_WriteAccessCmd:
PUSH {R4,LR}
MOVS R4,R0
LDR.N R0,??IWDG_WriteAccessCmd_0 ;; 0x5555
CMP R4,R0
BEQ.N ??IWDG_WriteAccessCmd_1
CMP R4,#+0
BEQ.N ??IWDG_WriteAccessCmd_1
MOVS R1,#+53
LDR.N R0,??DataTable8 ;; `?<Constant "C:\\\\David JIANG\\\\ST MCU...">`
_BLF assert_failed,??assert_failed??rT
??IWDG_WriteAccessCmd_1:
LDR.N R0,??DataTable9 ;; IWDG
LDR R0,[R0, #+0]
STR R4,[R0, #+0]
POP {R4,PC} ;; return
Nop
DATA
??IWDG_WriteAccessCmd_0:
DC32 0x5555
RSEG CODE:CODE:NOROOT(2)
THUMB
IWDG_SetPrescaler:
PUSH {R4,LR}
MOVS R4,R0
CMP R4,#+0
BEQ.N ??IWDG_SetPrescaler_0
CMP R4,#+1
BEQ.N ??IWDG_SetPrescaler_0
CMP R4,#+2
BEQ.N ??IWDG_SetPrescaler_0
CMP R4,#+3
BEQ.N ??IWDG_SetPrescaler_0
CMP R4,#+4
BEQ.N ??IWDG_SetPrescaler_0
CMP R4,#+5
BEQ.N ??IWDG_SetPrescaler_0
CMP R4,#+6
BEQ.N ??IWDG_SetPrescaler_0
MOVS R1,#+76
LDR.N R0,??DataTable8 ;; `?<Constant "C:\\\\David JIANG\\\\ST MCU...">`
_BLF assert_failed,??assert_failed??rT
??IWDG_SetPrescaler_0:
LDR.N R0,??DataTable9 ;; IWDG
LDR R0,[R0, #+0]
STR R4,[R0, #+4]
POP {R4,PC} ;; return
RSEG CODE:CODE:NOROOT(2)
THUMB
IWDG_SetReload:
PUSH {R4,LR}
MOVS R4,R0
MOVS R0,#+4096
CMP R4,R0
BCC.N ??IWDG_SetReload_0
MOVS R1,#+92
LDR.N R0,??DataTable8 ;; `?<Constant "C:\\\\David JIANG\\\\ST MCU...">`
_BLF assert_failed,??assert_failed??rT
??IWDG_SetReload_0:
LDR.N R0,??DataTable9 ;; IWDG
LDR R0,[R0, #+0]
STR R4,[R0, #+8]
POP {R4,PC} ;; return
RSEG CODE:CODE:NOROOT(2)
THUMB
IWDG_ReloadCounter:
LDR.N R0,??DataTable9 ;; IWDG
LDR R0,[R0, #+0]
LDR.N R1,??IWDG_ReloadCounter_0 ;; 0xaaaa
STR R1,[R0, #+0]
BX LR ;; return
Nop
DATA
??IWDG_ReloadCounter_0:
DC32 0xaaaa
RSEG CODE:CODE:NOROOT(2)
THUMB
IWDG_Enable:
LDR.N R0,??DataTable9 ;; IWDG
LDR R0,[R0, #+0]
LDR.N R1,??IWDG_Enable_0 ;; 0xcccc
STR R1,[R0, #+0]
BX LR ;; return
Nop
DATA
??IWDG_Enable_0:
DC32 0xcccc
RSEG CODE:CODE:NOROOT(2)
THUMB
IWDG_GetFlagStatus:
PUSH {R4,LR}
MOVS R4,R0
MOVS R0,#+0
CMP R4,#+1
BEQ.N ??IWDG_GetFlagStatus_0
CMP R4,#+2
BEQ.N ??IWDG_GetFlagStatus_0
MOVS R1,#+138
LDR.N R0,??DataTable8 ;; `?<Constant "C:\\\\David JIANG\\\\ST MCU...">`
_BLF assert_failed,??assert_failed??rT
??IWDG_GetFlagStatus_0:
LDR.N R0,??DataTable9 ;; IWDG
LDR R0,[R0, #+0]
LDR R0,[R0, #+12]
TST R0,R4
BEQ.N ??IWDG_GetFlagStatus_1
MOVS R0,#+1
B.N ??IWDG_GetFlagStatus_2
??IWDG_GetFlagStatus_1:
MOVS R0,#+0
??IWDG_GetFlagStatus_2:
POP {R4,PC} ;; return
RSEG CODE:CODE:NOROOT(2)
DATA
??DataTable8:
DC32 `?<Constant "C:\\\\David JIANG\\\\ST MCU...">`
RSEG CODE:CODE:NOROOT(2)
DATA
??DataTable9:
DC32 IWDG
RSEG CODE:CODE:NOROOT(2)
THUMB
??assert_failed??rT:
LDR.N R3,??Subroutine0_0 ;; assert_failed
BX R3
DATA
??Subroutine0_0:
DC32 assert_failed
RSEG DATA_C:CONST:SORT:NOROOT(2)
`?<Constant "C:\\\\David JIANG\\\\ST MCU...">`:
DATA
DC8 43H, 3AH, 5CH, 44H, 61H, 76H, 69H, 64H
DC8 20H, 4AH, 49H, 41H, 4EH, 47H, 5CH, 53H
DC8 54H, 20H, 4DH, 43H, 55H, 5CH, 44H, 6FH
DC8 63H, 73H, 5CH, 53H, 54H, 4DH, 33H, 32H
DC8 5CH, 41H, 4EH, 5FH, 4AH, 49H, 41H, 4EH
DC8 47H, 5CH, 54H, 49H, 4DH, 20H, 45H, 6EH
DC8 63H, 6FH, 64H, 65H, 72H, 5CH, 65H, 78H
DC8 61H, 6DH, 70H, 6CH, 65H, 5CH, 46H, 57H
DC8 4CH, 69H, 62H, 5CH, 73H, 72H, 63H, 5CH
DC8 73H, 74H, 6DH, 33H, 32H, 66H, 31H, 30H
DC8 78H, 5FH, 69H, 77H, 64H, 67H, 2EH, 63H
DC8 0
DC8 0, 0, 0
END
//
// 200 bytes in segment CODE
// 92 bytes in segment DATA_C
//
// 192 bytes of CODE memory (+ 8 bytes shared)
// 92 bytes of CONST memory
//
//Errors: none
//Warnings: none
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