stm32f10x_lib.s79

STM32利用正交编码器实现电机的控制

//////////////////////////////////////////////////////////////////////////////
//                                                                           /
// IAR ARM ANSI C/C++ Compiler V4.42A/W32              15/May/2008  12:06:31 /
// Copyright 1999-2005 IAR Systems. All rights reserved.                     /
//                                                                           /
//    Cpu mode        =  thumb                                               /
//    Endian          =  little                                              /
//    Stack alignment =  4                                                   /
//    Source file     =  C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM       /
//                       Encoder\example\FWLib\src\stm32f10x_lib.c           /
//    Command line    =  "C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM      /
//                       Encoder\example\FWLib\src\stm32f10x_lib.c" -D       /
//                       VECT_TAB_FLASH -lcN "C:\David JIANG\ST              /
//                       MCU\Docs\STM32\AN_JIANG\TIM                         /
//                       Encoder\example\project\EWARM\BOOT_FLASH\List\"     /
//                       -lb "C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM  /
//                       Encoder\example\project\EWARM\BOOT_FLASH\List\" -o  /
//                       "C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM      /
//                       Encoder\example\project\EWARM\BOOT_FLASH\Obj\" -z3  /
//                       --no_cse --no_unroll --no_inline --no_code_motion   /
//                       --no_tbaa --no_clustering --no_scheduling --debug   /
//                       --cpu_mode thumb --endian little --cpu cortex-M3    /
//                       --stack_align 4 --require_prototypes --fpu None     /
//                       --dlib_config "C:\Program Files\IAR                 /
//                       Systems\Embedded Workbench                          /
//                       4.0\arm\LIB\dl7mptnnl8f.h" -I "C:\David JIANG\ST    /
//                       MCU\Docs\STM32\AN_JIANG\TIM                         /
//                       Encoder\example\project\EWARM\" -I "C:\David        /
//                       JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM                /
//                       Encoder\example\project\EWARM\..\include\" -I       /
//                       "C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM      /
//                       Encoder\example\project\EWARM\..\..\FWLib\inc\" -I  /
//                       "C:\Program Files\IAR Systems\Embedded Workbench    /
//                       4.0\arm\INC\"                                       /
//    List file       =  C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM       /
//                       Encoder\example\project\EWARM\BOOT_FLASH\List\stm32 /
//                       f10x_lib.s79                                        /
//                                                                           /
//                                                                           /
//////////////////////////////////////////////////////////////////////////////

        NAME stm32f10x_lib

        RSEG CSTACK:DATA:NOROOT(2)

        PUBWEAK ?init?tab?DATA_Z
        PUBLIC ADC1
        PUBLIC ADC2
        PUBLIC AFIO
        PUBLIC BKP
        PUBLIC CAN
        PUBLIC DMA
        PUBLIC DMA_Channel1
        PUBLIC DMA_Channel2
        PUBLIC DMA_Channel3
        PUBLIC DMA_Channel4
        PUBLIC DMA_Channel5
        PUBLIC DMA_Channel6
        PUBLIC DMA_Channel7
        PUBLIC EXTI
        PUBLIC FLASH
        PUBLIC GPIOA
        PUBLIC GPIOB
        PUBLIC GPIOC
        PUBLIC GPIOD
        PUBLIC GPIOE
        PUBLIC I2C1
        PUBLIC I2C2
        PUBLIC IWDG
        PUBLIC NVIC
        PUBLIC OB
        PUBLIC PWR
        PUBLIC RCC
        PUBLIC RTC
        PUBLIC SCB
        PUBLIC SPI1
        PUBLIC SPI2
        PUBLIC SysTick
        PUBLIC TIM1
        PUBLIC TIM2
        PUBLIC TIM3
        PUBLIC TIM4
        PUBLIC USART1
        PUBLIC USART2
        PUBLIC USART3
        PUBLIC WWDG
        PUBLIC debug


        RSEG DATA_Z:DATA:SORT:NOROOT(2)
// TIM_TypeDef *__data TIM2
TIM2:
        DS8 4

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
// TIM_TypeDef *__data TIM3
TIM3:
        DS8 4

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
// TIM_TypeDef *__data TIM4
TIM4:
        DS8 4

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
// RTC_TypeDef *__data RTC
RTC:
        DS8 4

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
// WWDG_TypeDef *__data WWDG
WWDG:
        DS8 4

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
// IWDG_TypeDef *__data IWDG
IWDG:
        DS8 4

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
// SPI_TypeDef *__data SPI2
SPI2:
        DS8 4

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
// USART_TypeDef *__data USART2
USART2:
        DS8 4

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
// USART_TypeDef *__data USART3
USART3:
        DS8 4

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
// I2C_TypeDef *__data I2C1
I2C1:
        DS8 4

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
// I2C_TypeDef *__data I2C2
I2C2:
        DS8 4

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
// CAN_TypeDef *__data CAN
CAN:
        DS8 4

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
// BKP_TypeDef *__data BKP
BKP:
        DS8 4

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
// PWR_TypeDef *__data PWR
PWR:
        DS8 4

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
// AFIO_TypeDef *__data AFIO
AFIO:
        DS8 4

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
// EXTI_TypeDef *__data EXTI
EXTI:
        DS8 4

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
// GPIO_TypeDef *__data GPIOA
GPIOA:
        DS8 4

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
// GPIO_TypeDef *__data GPIOB
GPIOB:
        DS8 4

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
// GPIO_TypeDef *__data GPIOC
GPIOC:
        DS8 4

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
// GPIO_TypeDef *__data GPIOD
GPIOD:
        DS8 4

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
// GPIO_TypeDef *__data GPIOE
GPIOE:
        DS8 4

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
// ADC_TypeDef *__data ADC1
ADC1:
        DS8 4

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
// ADC_TypeDef *__data ADC2
ADC2:
        DS8 4

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
// TIM1_TypeDef *__data TIM1
TIM1:
        DS8 4

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
// SPI_TypeDef *__data SPI1
SPI1:
        DS8 4

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
// USART_TypeDef *__data USART1
USART1:
        DS8 4

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
// DMA_TypeDef *__data DMA
DMA:
        DS8 4

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
// struct <unnamed> *__data DMA_Channel1
DMA_Channel1:
        DS8 4

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
// struct <unnamed> *__data DMA_Channel2
DMA_Channel2:
        DS8 4

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
// struct <unnamed> *__data DMA_Channel3
DMA_Channel3:
        DS8 4

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
// struct <unnamed> *__data DMA_Channel4
DMA_Channel4:
        DS8 4

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
// struct <unnamed> *__data DMA_Channel5
DMA_Channel5:
        DS8 4

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
// struct <unnamed> *__data DMA_Channel6
DMA_Channel6:
        DS8 4

        RSEG DATA_Z:DATA:SORT:NOROOT(2)
// struct <unnamed> *__data DMA_Channel7