top.srs

synplify环境下 实现 全加器 功能

#
#
#
# Created by Synplify VHDL Compiler version Compilers 7.3, Build 041R from Synplicity, Inc.
# Copyright 1994-1999 Synplicity, Inc. , All rights reserved.
# Synthesis Netlist written on Mon Feb 02 09:42:56 2004
#
#
#OPTIONS:"|-ram|-primux|-fixsmult|-sdff_counter|-infer_seqShift|-autosm|-fid2|-sharing|on|-encrypt|-ui|-lite|-pro|-lib|work"
#CUR:"C:\\Program Files\\synplicity\\Synplify_731\\bin\\c_vhdl.exe":1059127834l
#CUR:"C:\\Program Files\\synplicity\\Synplify_731\\lib\\vhd\\location.map":1059542650l
#CUR:"C:\\Program Files\\synplicity\\Synplify_731\\lib\\vhd\\std.vhd":1044934492l
#CUR:"C:\\Program Files\\synplicity\\Synplify_731\\lib\\vhd\\std.vhd":1044934492l
#CUR:"D:\\YHQProj\\ModelSim\\5-2-2\\top.vhd":1075682700l
#CUR:"D:\\YHQProj\\ModelSim\\5-2-2\\top.vhd":1075682700l
#CUR:"D:\\YHQProj\\ModelSim\\5-2-2\\top.vhd":1075682700l
#CUR:"D:\\YHQProj\\ModelSim\\5-2-2\\top.vhd":1075682700l
#CUR:"C:\\Program Files\\synplicity\\Synplify_731\\lib\\vhd\\std1164.vhd":927285456l
#CUR:"C:\\Program Files\\synplicity\\Synplify_731\\lib\\vhd\\std1164.vhd":927285456l
#CUR:"C:\\Program Files\\synplicity\\Synplify_731\\lib\\vhd\\unsigned.vhd":1043981520l
#CUR:"C:\\Program Files\\synplicity\\Synplify_731\\lib\\vhd\\unsigned.vhd":1043981520l
#CUR:"C:\\Program Files\\synplicity\\Synplify_731\\lib\\vhd\\arith.vhd":1035356678l
#CUR:"C:\\Program Files\\synplicity\\Synplify_731\\lib\\vhd\\arith.vhd":1035356678l
f "C:\Program Files\synplicity\Synplify_731\lib\vhd\std.vhd"; # file 0
f "D:\YHQProj\ModelSim\5-2-2\top.vhd"; # file 1
f "C:\Program Files\synplicity\Synplify_731\lib\vhd\std1164.vhd"; # file 2
f "C:\Program Files\synplicity\Synplify_731\lib\vhd\unsigned.vhd"; # file 3
f "C:\Program Files\synplicity\Synplify_731\lib\vhd\arith.vhd"; # file 4
@E
@ 
ftell;
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