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(edif (rename top "full_adder")
(edifVersion 2 0 0)
(edifLevel 0)
(keywordMap (keywordLevel 0))
(status
(written
(timeStamp 2004 2 2 9 43 1)
(author "Synplicity, Inc.")
(program "Synplify Pro" (version "7.3, Build 192R"))
)
)
(library VIRTEX
(edifLevel 0)
(technology (numberDefinition ))
(cell IBUF (cellType GENERIC)
(view PRIM (viewType NETLIST)
(interface
(port O (direction OUTPUT))
(port I (direction INPUT))
)
)
)
(cell OBUF (cellType GENERIC)
(view PRIM (viewType NETLIST)
(interface
(port O (direction OUTPUT))
(port I (direction INPUT))
)
)
)
(cell LUT3 (cellType GENERIC)
(view PRIM (viewType NETLIST)
(interface
(port I0 (direction INPUT))
(port I1 (direction INPUT))
(port I2 (direction INPUT))
(port O (direction OUTPUT))
)
)
)
)
(library work
(edifLevel 0)
(technology (numberDefinition ))
(cell (rename top "full_adder") (cellType GENERIC)
(view behavioral (viewType NETLIST)
(interface
(port a (direction INPUT)
)
(port b (direction INPUT)
)
(port cin (direction INPUT)
)
(port s (direction OUTPUT))
(port cout (direction OUTPUT))
)
(contents
(instance un2_si_axbxc0 (viewRef PRIM (cellRef LUT3 (libraryRef VIRTEX)))
(property init (string "96"))
)
(instance un2_si_c1 (viewRef PRIM (cellRef LUT3 (libraryRef VIRTEX)))
(property init (string "E8"))
)
(instance cout_obuf (viewRef PRIM (cellRef OBUF (libraryRef VIRTEX)))
)
(instance s_obuf (viewRef PRIM (cellRef OBUF (libraryRef VIRTEX)))
)
(instance cin_ibuf (viewRef PRIM (cellRef IBUF (libraryRef VIRTEX)))
)
(instance b_ibuf (viewRef PRIM (cellRef IBUF (libraryRef VIRTEX)))
)
(instance a_ibuf (viewRef PRIM (cellRef IBUF (libraryRef VIRTEX)))
)
(net a (joined
(portRef a)
(portRef I (instanceRef a_ibuf))
))
(net b (joined
(portRef b)
(portRef I (instanceRef b_ibuf))
))
(net cin (joined
(portRef cin)
(portRef I (instanceRef cin_ibuf))
))
(net s (joined
(portRef O (instanceRef s_obuf))
(portRef s)
))
(net cout (joined
(portRef O (instanceRef cout_obuf))
(portRef cout)
))
(net cin_c (joined
(portRef O (instanceRef cin_ibuf))
(portRef I0 (instanceRef un2_si_c1))
(portRef I0 (instanceRef un2_si_axbxc0))
))
(net b_c (joined
(portRef O (instanceRef b_ibuf))
(portRef I1 (instanceRef un2_si_c1))
(portRef I1 (instanceRef un2_si_axbxc0))
))
(net a_c (joined
(portRef O (instanceRef a_ibuf))
(portRef I2 (instanceRef un2_si_c1))
(portRef I2 (instanceRef un2_si_axbxc0))
))
(net un2_si_axbxc0_n (joined
(portRef O (instanceRef un2_si_axbxc0))
(portRef I (instanceRef s_obuf))
))
(net un2_si_c1_n (joined
(portRef O (instanceRef un2_si_c1))
(portRef I (instanceRef cout_obuf))
))
)
)
)
)
(design (rename top "full_adder") (cellRef top (libraryRef work))
(property PART (string "xc2s50eft256-7") (owner "Xilinx")))
)
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