⭐ 欢迎来到虫虫下载站! | 📦 资源下载 📁 资源专辑 ℹ️ 关于我们
⭐ 虫虫下载站

📄 full_featured.tan.rpt

📁 一个毕业设计
💻 RPT
📖 第 1 页 / 共 5 页
字号:
intellectual property,  including patents,  copyrights,  trademarks,  trade
secrets,  or maskworks,  embodied in any such megafunction design, netlist,
support  information,  device programming or simulation file,  or any other
related documentation or information provided by  Altera  or a megafunction
partner, remains with Altera, the megafunction partner, or their respective
licensors. No other licenses, including any licenses needed under any third
party's intellectual property, are provided herein.



+----------------------------------------------------------------------------------------+
; Timing Analyzer Settings                                                               ;
+-----------------------------------------------------------------------------------------
; Option                                                ; Setting            ; From ; To ;
+-------------------------------------------------------+--------------------+------+----+
; Device name                                           ; EP1C20F400C7       ;      ;    ;
; Report IO Paths Separately                            ; Off                ;      ;    ;
; Ignore user-defined clock settings                    ; Off                ;      ;    ;
; Default hold multicycle                               ; Same as Multicycle ;      ;    ;
; Cut off feedback from I/O pins                        ; On                 ;      ;    ;
; Cut off clear and preset signal paths                 ; On                 ;      ;    ;
; Cut off read during write signal paths                ; On                 ;      ;    ;
; Cut paths between unrelated clock domains             ; On                 ;      ;    ;
; Run Minimum Analysis                                  ; On                 ;      ;    ;
; Use Minimum Timing Models                             ; Off                ;      ;    ;
; Number of paths to report                             ; 200                ;      ;    ;
; Number of destination nodes to report                 ; 10                 ;      ;    ;
; Number of source nodes to report per destination node ; 10                 ;      ;    ;
+-------------------------------------------------------+--------------------+------+----+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Timing Analyzer Summary                                                                                                                                                                                                                                                                                                                                                                                                                                  ;
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
; Type                                                             ; Slack     ; Required Time                     ; Actual Time                      ; From                                                                                                                                                                     ; To                                                                                                                      ;
+------------------------------------------------------------------+-----------+-----------------------------------+----------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+
; Worst-case tsu                                                   ; N/A       ; None                              ; 15.806 ns                        ; LCD[1]                                                                                                                                                                   ; full_1c20:inst|cpu:the_cpu|d_readdata_d1[1]                                                                             ;
; Worst-case tco                                                   ; N/A       ; None                              ; 16.097 ns                        ; full_1c20:inst|cpu:the_cpu|internal_d_address[23]                                                                                                                        ; LCD_E                                                                                                                   ;
; Worst-case tpd                                                   ; N/A       ; None                              ; 1.879 ns                         ; altera_internal_jtag~TDO                                                                                                                                                 ; altera_reserved_tdo                                                                                                     ;
; Worst-case th                                                    ; N/A       ; None                              ; 5.407 ns                         ; altera_internal_jtag~TMSUTAP                                                                                                                                             ; sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[2]                                                 ;
; Worst-case minimum tco                                           ; N/A       ; None                              ; -3.498 ns                        ; sdram_pll:inst1|altpll:altpll_component|_extclk0                                                                                                                         ; SDRAM_CLK                                                                                                               ;

⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -