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📄 bswap_cpu.vhd

📁 一个毕业设计
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--Copyright (C) 1991-2004 Altera Corporation
--Any megafunction design, and related net list (encrypted or decrypted),
--support information, device programming or simulation file, and any other
--associated documentation or information provided by Altera or a partner
--under Altera's Megafunction Partnership Program may be used only to
--program PLD devices (but not masked PLD devices) from Altera.  Any other
--use of such megafunction design, net list, support information, device
--programming or simulation file, or any other related documentation or
--information is prohibited for any other purpose, including, but not
--limited to modification, reverse engineering, de-compiling, or use with
--any other silicon devices, unless such use is explicitly licensed under
--a separate agreement with Altera or a megafunction partner.  Title to
--the intellectual property, including patents, copyrights, trademarks,
--trade secrets, or maskworks, embodied in any such megafunction design,
--net list, support information, device programming or simulation file, or
--any other related documentation or information provided by Altera or a
--megafunction partner, remains with Altera, the megafunction partner, or
--their respective licensors.  No other licenses, including any licenses
--needed under any third party's intellectual property, are provided herein.
--Copying or modifying any file, or portion thereof, to which this notice
--is attached violates this copyright.

library altera_vhdl_support;
use altera_vhdl_support.altera_vhdl_support_lib.all;

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;

entity bswap_cpu is 
        port (
              -- inputs:
                 signal dataa : IN STD_LOGIC_VECTOR (31 DOWNTO 0);
                 signal datab : IN STD_LOGIC_VECTOR (31 DOWNTO 0);

              -- outputs:
                 signal result : OUT STD_LOGIC_VECTOR (31 DOWNTO 0)
              );
end entity bswap_cpu;


architecture europa of bswap_cpu is

begin

  result(31) <= dataa(0);
  result(30) <= dataa(1);
  result(29) <= dataa(2);
  result(28) <= dataa(3);
  result(27) <= dataa(4);
  result(26) <= dataa(5);
  result(25) <= dataa(6);
  result(24) <= dataa(7);
  result(23) <= dataa(8);
  result(22) <= dataa(9);
  result(21) <= dataa(10);
  result(20) <= dataa(11);
  result(19) <= dataa(12);
  result(18) <= dataa(13);
  result(17) <= dataa(14);
  result(16) <= dataa(15);
  result(15) <= dataa(16);
  result(14) <= dataa(17);
  result(13) <= dataa(18);
  result(12) <= dataa(19);
  result(11) <= dataa(20);
  result(10) <= dataa(21);
  result(9) <= dataa(22);
  result(8) <= dataa(23);
  result(7) <= dataa(24);
  result(6) <= dataa(25);
  result(5) <= dataa(26);
  result(4) <= dataa(27);
  result(3) <= dataa(28);
  result(2) <= dataa(29);
  result(1) <= dataa(30);
  result(0) <= dataa(31);

end europa;

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