target-supports.exp

来自「linux下编程用 编译软件」· EXP 代码 · 共 1,508 行 · 第 1/4 页

	   set et_vect_int_saved 1
	}
    }

    verbose "check_effective_target_vect_int: returning $et_vect_int_saved" 2
    return $et_vect_int_saved
}

# Return 1 is this is an arm target using 32-bit instructions
proc check_effective_target_arm32 { } {
    global et_arm32_saved
    global et_arm32_target_name
    global compiler_flags

    if { ![info exists et_arm32_target_name] } {
	set et_arm32_target_name ""
    }

    # If the target has changed since we set the cached value, clear it.
    set current_target [current_target_name]
    if { $current_target != $et_arm32_target_name } {
	verbose "check_effective_target_arm32: `$et_arm32_target_name' `$current_target'" 2
	set et_arm32_target_name $current_target
	if { [info exists et_arm32_saved] } {
	    verbose "check_effective_target_arm32: removing cached result" 2
	    unset et_arm32_saved
	}
    }

    if [info exists et_arm32_saved] {
	verbose "check-effective_target_arm32: using cached result" 2
    } else {
	set et_arm32_saved 0
	if { [istarget arm-*-*]
	      || [istarget strongarm*-*-*]
	      || [istarget xscale-*-*] } {
	    if ![string match "*-mthumb *" $compiler_flags] {
		set et_arm32_saved 1
	    }
	}
    }
    verbose "check_effective_target_arm32: returning $et_arm32_saved" 2
    return $et_arm32_saved
}

# Return 1 if the target supports hardware vector shift operation.

proc check_effective_target_vect_shift { } {
    global et_vect_shift_saved

    if [info exists et_vect_shift_saved] {
	verbose "check_effective_target_vect_shift: using cached result" 2
    } else {
	set et_vect_shift_saved 0
	if { [istarget powerpc*-*-*]
	     || [istarget ia64-*-*]
	     || [istarget i?86-*-*]
	     || [istarget x86_64-*-*] } {
	   set et_vect_shift_saved 1
	}
    }

    verbose "check_effective_target_vect_shift: returning $et_vect_shift_saved" 2
    return $et_vect_shift_saved
}

# Return 1 if the target supports hardware vectors of long, 0 otherwise.
#
# This can change for different subtargets so do not cache the result.

proc check_effective_target_vect_long { } {
    if { [istarget i?86-*-*]
	 || ([istarget powerpc*-*-*] && [check_effective_target_ilp32])
	 || [istarget x86_64-*-*]
	 || ([istarget sparc*-*-*] && [check_effective_target_ilp32]) } {
	set answer 1
    } else {
	set answer 0
    }

    verbose "check_effective_target_vect_long: returning $answer" 2
    return $answer
}

# Return 1 if the target supports hardware vectors of float, 0 otherwise.
#
# This won't change for different subtargets so cache the result.

proc check_effective_target_vect_float { } {
    global et_vect_float_saved

    if [info exists et_vect_float_saved] {
	verbose "check_effective_target_vect_float: using cached result" 2
    } else {
	set et_vect_float_saved 0
	if { [istarget i?86-*-*]
	      || [istarget powerpc*-*-*]
	      || [istarget mipsisa64*-*-*]
	      || [istarget x86_64-*-*]
	      || [istarget ia64-*-*] } {
	   set et_vect_float_saved 1
	}
    }

    verbose "check_effective_target_vect_float: returning $et_vect_float_saved" 2
    return $et_vect_float_saved
}

# Return 1 if the target supports hardware vectors of double, 0 otherwise.
#
# This won't change for different subtargets so cache the result.

proc check_effective_target_vect_double { } {
    global et_vect_double_saved

    if [info exists et_vect_double_saved] {
	verbose "check_effective_target_vect_double: using cached result" 2
    } else {
	set et_vect_double_saved 0
	if { [istarget i?86-*-*]
	      || [istarget x86_64-*-*] } {
	   set et_vect_double_saved 1
	}
    }

    verbose "check_effective_target_vect_double: returning $et_vect_double_saved" 2
    return $et_vect_double_saved
}

# Return 1 if the target plus current options does not support a vector
# max instruction on "int", 0 otherwise.
#
# This won't change for different subtargets so cache the result.

proc check_effective_target_vect_no_int_max { } {
    global et_vect_no_int_max_saved

    if [info exists et_vect_no_int_max_saved] {
	verbose "check_effective_target_vect_no_int_max: using cached result" 2
    } else {
	set et_vect_no_int_max_saved 0
	if { [istarget sparc*-*-*]
	     || [istarget alpha*-*-*] } {
	    set et_vect_no_int_max_saved 1
	}
    }
    verbose "check_effective_target_vect_no_int_max: returning $et_vect_no_int_max_saved" 2
    return $et_vect_no_int_max_saved
}

# Return 1 if the target plus current options does not support a vector
# add instruction on "int", 0 otherwise.
#
# This won't change for different subtargets so cache the result.

proc check_effective_target_vect_no_int_add { } {
    global et_vect_no_int_add_saved

    if [info exists et_vect_no_int_add_saved] {
	verbose "check_effective_target_vect_no_int_add: using cached result" 2
    } else {
	set et_vect_no_int_add_saved 0
	# Alpha only supports vector add on V8QI and V4HI.
	if { [istarget alpha*-*-*] } {
	    set et_vect_no_int_add_saved 1
	}
    }
    verbose "check_effective_target_vect_no_int_add: returning $et_vect_no_int_add_saved" 2
    return $et_vect_no_int_add_saved
}

# Return 1 if the target plus current options does not support vector
# bitwise instructions, 0 otherwise.
#
# This won't change for different subtargets so cache the result.

proc check_effective_target_vect_no_bitwise { } {
    global et_vect_no_bitwise_saved

    if [info exists et_vect_no_bitwise_saved] {
	verbose "check_effective_target_vect_no_bitwise: using cached result" 2
    } else {
	set et_vect_no_bitwise_saved 0
    }
    verbose "check_effective_target_vect_no_bitwise: returning $et_vect_no_bitwise_saved" 2
    return $et_vect_no_bitwise_saved
}

# Return 1 if the target plus current options does not support a vector
# alignment mechanism, 0 otherwise.
#
# This won't change for different subtargets so cache the result.

proc check_effective_target_vect_no_align { } {
    global et_vect_no_align_saved

    if [info exists et_vect_no_align_saved] {
	verbose "check_effective_target_vect_no_align: using cached result" 2
    } else {
	set et_vect_no_align_saved 0
	if { [istarget mipsisa64*-*-*]
	     || [istarget sparc*-*-*]
	     || [istarget ia64-*-*] } {
	    set et_vect_no_align_saved 1
	}
    }
    verbose "check_effective_target_vect_no_align: returning $et_vect_no_align_saved" 2
    return $et_vect_no_align_saved
}

# Return 1 if the target supports vector conditional operations, 0 otherwise.

proc check_effective_target_vect_condition { } {
    global et_vect_cond_saved

    if [info exists et_vect_cond_saved] {
	verbose "check_effective_target_vect_cond: using cached result" 2
    } else {
	set et_vect_cond_saved 0
	if { [istarget powerpc*-*-*]
	     || [istarget ia64-*-*]
	     || [istarget i?86-*-*]
	     || [istarget x86_64-*-*] } {
	   set et_vect_cond_saved 1
	}
    }

    verbose "check_effective_target_vect_cond: returning $et_vect_cond_saved" 2
    return $et_vect_cond_saved
}

# Return 1 if the target supports vector int multiplication, 0 otherwise.

proc check_effective_target_vect_int_mult { } {
    global et_vect_int_mult_saved

    if [info exists et_vect_int_mult_saved] {
	verbose "check_effective_target_vect_int_mult: using cached result" 2
    } else {
	set et_vect_int_mult_saved 0
	if { [istarget powerpc*-*-*]
	     || [istarget i?86-*-*]
	     || [istarget x86_64-*-*] } {
	   set et_vect_int_mult_saved 1
	}
    }

    verbose "check_effective_target_vect_int_mult: returning $et_vect_int_mult_saved" 2
    return $et_vect_int_mult_saved
}

# Return 1 if the target supports atomic operations on "int" and "long".

proc check_effective_target_sync_int_long { } {
    global et_sync_int_long_saved

    if [info exists et_sync_int_long_saved] {
        verbose "check_effective_target_sync_int_long: using cached result" 2
    } else {
        set et_sync_int_long_saved 0
# This is intentionally powerpc but not rs6000, rs6000 doesn't have the
# load-reserved/store-conditional instructions.
        if { [istarget ia64-*-*]
	     || [istarget i?86-*-*]
	     || [istarget x86_64-*-*]
	     || [istarget alpha*-*-*] 
	     || [istarget s390*-*-*] 
	     || [istarget powerpc*-*-*] } {
           set et_sync_int_long_saved 1
        }
    }

    verbose "check_effective_target_sync_int_long: returning $et_sync_int_long_saved" 2
    return $et_sync_int_long_saved
}

# Return 1 if the target supports atomic operations on "char" and "short".

proc check_effective_target_sync_char_short { } {
    global et_sync_char_short_saved

    if [info exists et_sync_char_short_saved] {
        verbose "check_effective_target_sync_char_short: using cached result" 2
    } else {
        set et_sync_char_short_saved 0
# This is intentionally powerpc but not rs6000, rs6000 doesn't have the
# load-reserved/store-conditional instructions.
        if { [istarget ia64-*-*]
	     || [istarget i?86-*-*]
	     || [istarget x86_64-*-*]
	     || [istarget alpha*-*-*] 
	     || [istarget s390*-*-*] 
	     || [istarget powerpc*-*-*] } {
           set et_sync_char_short_saved 1
        }
    }

    verbose "check_effective_target_sync_char_short: returning $et_sync_char_short_saved" 2
    return $et_sync_char_short_saved
}

# Return 1 if the target matches the effective target 'arg', 0 otherwise.
# This can be used with any check_* proc that takes no argument and
# returns only 1 or 0.  It could be used with check_* procs that take
# arguments with keywords that pass particular arguments.

proc is-effective-target { arg } {
    set selected 0
    if { [info procs check_effective_target_${arg}] != [list] } {
	set selected [check_effective_target_${arg}]
    } else {
	switch $arg {
	  "vmx_hw"         { set selected [check_vmx_hw_available] }
	  "named_sections" { set selected [check_named_sections_available] }
	  "gc_sections"    { set selected [check_gc_sections_available] }
	  default          { error "unknown effective target keyword `$arg'" }
	}
    }
    verbose "is-effective-target: $arg $selected" 2
    return $selected
}

# Return 1 if the argument is an effective-target keyword, 0 otherwise.

proc is-effective-target-keyword { arg } {
    if { [info procs check_effective_target_${arg}] != [list] } {
	return 1
    } else {
	# These have different names for their check_* procs.
	switch $arg {
	  "vmx_hw"         { return 1 }
	  "named_sections" { return 1 }
	  "gc_sections"    { return 1 }
	  default          { return 0 }
	}
    }
}

# Return 1 if target default to short enums

proc check_effective_target_short_enums { } {
    global et_short_enums_saved
    global et_short_enums_target_name

    if { ![info exists et_short_enums_target_name] } {
	set et_short_enums_target_name ""
    }

    # If the target has changed since we set the cached value, clear it.
    set current_target [current_target_name]
    if { $current_target != $et_short_enums_target_name } {
	verbose "check_effective_target_short_enums: `$et_short_enums_target_name'" 2
	set et_short_enums_target_name $current_target
	if [info exists et_short_enums_saved] {
	    verbose "check_effective_target_short_enums: removing cached result" 2
	    unset et_short_enums_saved
	}
    }

    if [info exists et_short_enums_saved] {
	verbose "check_effective_target_short_enums: using cached result" 2
    } else {
	verbose "check_effective_target_short_enums: compiling source" 2

	# PCC_BITFIELD_TYPE_MATTERS isn't just about unnamed or empty
	# bitfields, but let's stick to the example code from the docs.
	set et_short_enums_saved \
	    [string match "" [get_compiler_messages short_enums assembly {
	    enum foo { bar };
	    int s[sizeof (enum foo) == 1 ? 1 : -1];
	} ]]
    }
    verbose "check_effective_target_short_enums: returning $et_short_enums_saved" 2
    return $et_short_enums_saved
}