📄 i386.h
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/* Definitions of target machine for GCC for IA-32. Copyright (C) 1988, 1992, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.This file is part of GCC.GCC is free software; you can redistribute it and/or modifyit under the terms of the GNU General Public License as published bythe Free Software Foundation; either version 2, or (at your option)any later version.GCC is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY; without even the implied warranty ofMERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See theGNU General Public License for more details.You should have received a copy of the GNU General Public Licensealong with GCC; see the file COPYING. If not, write tothe Free Software Foundation, 51 Franklin Street, Fifth Floor,Boston, MA 02110-1301, USA. *//* The purpose of this file is to define the characteristics of the i386, independent of assembler syntax or operating system. Three other files build on this one to describe a specific assembler syntax: bsd386.h, att386.h, and sun386.h. The actual tm.h file for a particular system should include this file, and then the file for the appropriate assembler syntax. Many macros that specify assembler syntax are omitted entirely from this file because they really belong in the files for particular assemblers. These include RP, IP, LPREFIX, PUT_OP_SIZE, USE_STAR, ADDR_BEG, ADDR_END, PRINT_IREG, PRINT_SCALE, PRINT_B_I_S, and many that start with ASM_ or end in ASM_OP. *//* Define the specific costs for a given cpu */struct processor_costs { const int add; /* cost of an add instruction */ const int lea; /* cost of a lea instruction */ const int shift_var; /* variable shift costs */ const int shift_const; /* constant shift costs */ const int mult_init[5]; /* cost of starting a multiply in QImode, HImode, SImode, DImode, TImode*/ const int mult_bit; /* cost of multiply per each bit set */ const int divide[5]; /* cost of a divide/mod in QImode, HImode, SImode, DImode, TImode*/ int movsx; /* The cost of movsx operation. */ int movzx; /* The cost of movzx operation. */ const int large_insn; /* insns larger than this cost more */ const int move_ratio; /* The threshold of number of scalar memory-to-memory move insns. */ const int movzbl_load; /* cost of loading using movzbl */ const int int_load[3]; /* cost of loading integer registers in QImode, HImode and SImode relative to reg-reg move (2). */ const int int_store[3]; /* cost of storing integer register in QImode, HImode and SImode */ const int fp_move; /* cost of reg,reg fld/fst */ const int fp_load[3]; /* cost of loading FP register in SFmode, DFmode and XFmode */ const int fp_store[3]; /* cost of storing FP register in SFmode, DFmode and XFmode */ const int mmx_move; /* cost of moving MMX register. */ const int mmx_load[2]; /* cost of loading MMX register in SImode and DImode */ const int mmx_store[2]; /* cost of storing MMX register in SImode and DImode */ const int sse_move; /* cost of moving SSE register. */ const int sse_load[3]; /* cost of loading SSE register in SImode, DImode and TImode*/ const int sse_store[3]; /* cost of storing SSE register in SImode, DImode and TImode*/ const int mmxsse_to_integer; /* cost of moving mmxsse register to integer and vice versa. */ const int prefetch_block; /* bytes moved to cache for prefetch. */ const int simultaneous_prefetches; /* number of parallel prefetch operations. */ const int branch_cost; /* Default value for BRANCH_COST. */ const int fadd; /* cost of FADD and FSUB instructions. */ const int fmul; /* cost of FMUL instruction. */ const int fdiv; /* cost of FDIV instruction. */ const int fabs; /* cost of FABS instruction. */ const int fchs; /* cost of FCHS instruction. */ const int fsqrt; /* cost of FSQRT instruction. */};extern const struct processor_costs *ix86_cost;/* Macros used in the machine description to test the flags. *//* configure can arrange to make this 2, to force a 486. */#ifndef TARGET_CPU_DEFAULT#ifdef TARGET_64BIT_DEFAULT#define TARGET_CPU_DEFAULT TARGET_CPU_DEFAULT_k8#else#define TARGET_CPU_DEFAULT 0#endif#endif#ifndef TARGET_FPMATH_DEFAULT#define TARGET_FPMATH_DEFAULT \ (TARGET_64BIT && TARGET_SSE ? FPMATH_SSE : FPMATH_387)#endif#define TARGET_FLOAT_RETURNS_IN_80387 TARGET_FLOAT_RETURNS/* 64bit Sledgehammer mode. For libgcc2 we make sure this is a compile-time constant. */#ifdef IN_LIBGCC2#undef TARGET_64BIT#ifdef __x86_64__#define TARGET_64BIT 1#else#define TARGET_64BIT 0#endif#else#ifndef TARGET_BI_ARCH#undef TARGET_64BIT#if TARGET_64BIT_DEFAULT#define TARGET_64BIT 1#else#define TARGET_64BIT 0#endif#endif#endif#define HAS_LONG_COND_BRANCH 1#define HAS_LONG_UNCOND_BRANCH 1#define TARGET_386 (ix86_tune == PROCESSOR_I386)#define TARGET_486 (ix86_tune == PROCESSOR_I486)#define TARGET_PENTIUM (ix86_tune == PROCESSOR_PENTIUM)#define TARGET_PENTIUMPRO (ix86_tune == PROCESSOR_PENTIUMPRO)#define TARGET_K6 (ix86_tune == PROCESSOR_K6)#define TARGET_ATHLON (ix86_tune == PROCESSOR_ATHLON)#define TARGET_PENTIUM4 (ix86_tune == PROCESSOR_PENTIUM4)#define TARGET_K8 (ix86_tune == PROCESSOR_K8)#define TARGET_ATHLON_K8 (TARGET_K8 || TARGET_ATHLON)#define TARGET_NOCONA (ix86_tune == PROCESSOR_NOCONA)#define TUNEMASK (1 << ix86_tune)extern const int x86_use_leave, x86_push_memory, x86_zero_extend_with_and;extern const int x86_use_bit_test, x86_cmove, x86_fisttp, x86_deep_branch;extern const int x86_branch_hints, x86_unroll_strlen;extern const int x86_double_with_add, x86_partial_reg_stall, x86_movx;extern const int x86_use_himode_fiop, x86_use_simode_fiop;extern const int x86_use_mov0, x86_use_cltd, x86_read_modify_write;extern const int x86_read_modify, x86_split_long_moves;extern const int x86_promote_QImode, x86_single_stringop, x86_fast_prefix;extern const int x86_himode_math, x86_qimode_math, x86_promote_qi_regs;extern const int x86_promote_hi_regs, x86_integer_DFmode_moves;extern const int x86_add_esp_4, x86_add_esp_8, x86_sub_esp_4, x86_sub_esp_8;extern const int x86_partial_reg_dependency, x86_memory_mismatch_stall;extern const int x86_accumulate_outgoing_args, x86_prologue_using_move;extern const int x86_epilogue_using_move, x86_decompose_lea;extern const int x86_arch_always_fancy_math_387, x86_shift1;extern const int x86_sse_partial_reg_dependency, x86_sse_split_regs;extern const int x86_sse_typeless_stores, x86_sse_load0_by_pxor;extern const int x86_use_ffreep;extern const int x86_inter_unit_moves, x86_schedule;extern const int x86_use_bt;extern const int x86_cmpxchg, x86_xadd;extern int x86_prefetch_sse;#define TARGET_USE_LEAVE (x86_use_leave & TUNEMASK)#define TARGET_PUSH_MEMORY (x86_push_memory & TUNEMASK)#define TARGET_ZERO_EXTEND_WITH_AND (x86_zero_extend_with_and & TUNEMASK)#define TARGET_USE_BIT_TEST (x86_use_bit_test & TUNEMASK)#define TARGET_UNROLL_STRLEN (x86_unroll_strlen & TUNEMASK)/* For sane SSE instruction set generation we need fcomi instruction. It is safe to enable all CMOVE instructions. */#define TARGET_CMOVE ((x86_cmove & (1 << ix86_arch)) || TARGET_SSE)#define TARGET_FISTTP (((x86_fisttp & (1 << ix86_arch)) || TARGET_SSE3) \ && TARGET_80387)#define TARGET_DEEP_BRANCH_PREDICTION (x86_deep_branch & TUNEMASK)#define TARGET_BRANCH_PREDICTION_HINTS (x86_branch_hints & TUNEMASK)#define TARGET_DOUBLE_WITH_ADD (x86_double_with_add & TUNEMASK)#define TARGET_USE_SAHF ((x86_use_sahf & TUNEMASK) && !TARGET_64BIT)#define TARGET_MOVX (x86_movx & TUNEMASK)#define TARGET_PARTIAL_REG_STALL (x86_partial_reg_stall & TUNEMASK)#define TARGET_USE_HIMODE_FIOP (x86_use_himode_fiop & TUNEMASK)#define TARGET_USE_SIMODE_FIOP (x86_use_simode_fiop & TUNEMASK)#define TARGET_USE_MOV0 (x86_use_mov0 & TUNEMASK)#define TARGET_USE_CLTD (x86_use_cltd & TUNEMASK)#define TARGET_SPLIT_LONG_MOVES (x86_split_long_moves & TUNEMASK)#define TARGET_READ_MODIFY_WRITE (x86_read_modify_write & TUNEMASK)#define TARGET_READ_MODIFY (x86_read_modify & TUNEMASK)#define TARGET_PROMOTE_QImode (x86_promote_QImode & TUNEMASK)#define TARGET_FAST_PREFIX (x86_fast_prefix & TUNEMASK)#define TARGET_SINGLE_STRINGOP (x86_single_stringop & TUNEMASK)#define TARGET_QIMODE_MATH (x86_qimode_math & TUNEMASK)#define TARGET_HIMODE_MATH (x86_himode_math & TUNEMASK)#define TARGET_PROMOTE_QI_REGS (x86_promote_qi_regs & TUNEMASK)#define TARGET_PROMOTE_HI_REGS (x86_promote_hi_regs & TUNEMASK)#define TARGET_ADD_ESP_4 (x86_add_esp_4 & TUNEMASK)#define TARGET_ADD_ESP_8 (x86_add_esp_8 & TUNEMASK)#define TARGET_SUB_ESP_4 (x86_sub_esp_4 & TUNEMASK)#define TARGET_SUB_ESP_8 (x86_sub_esp_8 & TUNEMASK)#define TARGET_INTEGER_DFMODE_MOVES (x86_integer_DFmode_moves & TUNEMASK)#define TARGET_PARTIAL_REG_DEPENDENCY (x86_partial_reg_dependency & TUNEMASK)#define TARGET_SSE_PARTIAL_REG_DEPENDENCY \ (x86_sse_partial_reg_dependency & TUNEMASK)#define TARGET_SSE_SPLIT_REGS (x86_sse_split_regs & TUNEMASK)#define TARGET_SSE_TYPELESS_STORES (x86_sse_typeless_stores & TUNEMASK)#define TARGET_SSE_LOAD0_BY_PXOR (x86_sse_load0_by_pxor & TUNEMASK)#define TARGET_MEMORY_MISMATCH_STALL (x86_memory_mismatch_stall & TUNEMASK)#define TARGET_PROLOGUE_USING_MOVE (x86_prologue_using_move & TUNEMASK)#define TARGET_EPILOGUE_USING_MOVE (x86_epilogue_using_move & TUNEMASK)#define TARGET_DECOMPOSE_LEA (x86_decompose_lea & TUNEMASK)#define TARGET_PREFETCH_SSE (x86_prefetch_sse)#define TARGET_SHIFT1 (x86_shift1 & TUNEMASK)#define TARGET_USE_FFREEP (x86_use_ffreep & TUNEMASK)#define TARGET_REP_MOVL_OPTIMAL (x86_rep_movl_optimal & TUNEMASK)#define TARGET_INTER_UNIT_MOVES (x86_inter_unit_moves & TUNEMASK)#define TARGET_FOUR_JUMP_LIMIT (x86_four_jump_limit & TUNEMASK)#define TARGET_SCHEDULE (x86_schedule & TUNEMASK)#define TARGET_USE_BT (x86_use_bt & TUNEMASK)#define ASSEMBLER_DIALECT (ix86_asm_dialect)#define TARGET_SSE_MATH ((ix86_fpmath & FPMATH_SSE) != 0)#define TARGET_MIX_SSE_I387 ((ix86_fpmath & FPMATH_SSE) \ && (ix86_fpmath & FPMATH_387))#define TARGET_GNU_TLS (ix86_tls_dialect == TLS_DIALECT_GNU)#define TARGET_SUN_TLS (ix86_tls_dialect == TLS_DIALECT_SUN)#define TARGET_CMPXCHG (x86_cmpxchg & (1 << ix86_arch))#define TARGET_XADD (x86_xadd & (1 << ix86_arch))#ifndef TARGET_64BIT_DEFAULT#define TARGET_64BIT_DEFAULT 0#endif#ifndef TARGET_TLS_DIRECT_SEG_REFS_DEFAULT#define TARGET_TLS_DIRECT_SEG_REFS_DEFAULT 0#endif/* Once GDB has been enhanced to deal with functions without frame pointers, we can change this to allow for elimination of the frame pointer in leaf functions. */#define TARGET_DEFAULT 0/* This is not really a target flag, but is done this way so that it's analogous to similar code for Mach-O on PowerPC. darwin.h redefines this to 1. */#define TARGET_MACHO 0/* Subtargets may reset this to 1 in order to enable 96-bit long double with the rounding mode forced to 53 bits. */#define TARGET_96_ROUND_53_LONG_DOUBLE 0/* Sometimes certain combinations of command options do not make sense on a particular target machine. You can define a macro `OVERRIDE_OPTIONS' to take account of this. This macro, if defined, is executed once just after all the command options have been parsed. Don't use this macro to turn on various extra optimizations for `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */#define OVERRIDE_OPTIONS override_options ()/* Define this to change the optimizations performed by default. */#define OPTIMIZATION_OPTIONS(LEVEL, SIZE) \ optimization_options ((LEVEL), (SIZE))/* Support for configure-time defaults of some command line options. */#define OPTION_DEFAULT_SPECS \ {"arch", "%{!march=*:-march=%(VALUE)}"}, \ {"tune", "%{!mtune=*:%{!mcpu=*:%{!march=*:-mtune=%(VALUE)}}}" }, \ {"cpu", "%{!mtune=*:%{!mcpu=*:%{!march=*:-mtune=%(VALUE)}}}" }/* Specs for the compiler proper */#ifndef CC1_CPU_SPEC#define CC1_CPU_SPEC "\%{!mtune*: \%{m386:mtune=i386 \%n`-m386' is deprecated. Use `-march=i386' or `-mtune=i386' instead.\n} \%{m486:-mtune=i486 \%n`-m486' is deprecated. Use `-march=i486' or `-mtune=i486' instead.\n} \%{mpentium:-mtune=pentium \%n`-mpentium' is deprecated. Use `-march=pentium' or `-mtune=pentium' instead.\n} \%{mpentiumpro:-mtune=pentiumpro \%n`-mpentiumpro' is deprecated. Use `-march=pentiumpro' or `-mtune=pentiumpro' instead.\n} \%{mcpu=*:-mtune=%* \%n`-mcpu=' is deprecated. Use `-mtune=' or '-march=' instead.\n}} \%<mcpu=* \%{mintel-syntax:-masm=intel \%n`-mintel-syntax' is deprecated. Use `-masm=intel' instead.\n} \%{mno-intel-syntax:-masm=att \%n`-mno-intel-syntax' is deprecated. Use `-masm=att' instead.\n}"#endif /* Target CPU builtins. */#define TARGET_CPU_CPP_BUILTINS() \ do \ { \ size_t arch_len = strlen (ix86_arch_string); \ size_t tune_len = strlen (ix86_tune_string); \ int last_arch_char = ix86_arch_string[arch_len - 1]; \ int last_tune_char = ix86_tune_string[tune_len - 1]; \ \ if (TARGET_64BIT) \ { \ builtin_assert ("cpu=x86_64"); \ builtin_assert ("machine=x86_64"); \ builtin_define ("__amd64"); \ builtin_define ("__amd64__"); \ builtin_define ("__x86_64"); \ builtin_define ("__x86_64__"); \ } \ else \ { \ builtin_assert ("cpu=i386"); \ builtin_assert ("machine=i386"); \ builtin_define_std ("i386"); \ } \ \ /* Built-ins based on -mtune= (or -march= if no \ -mtune= given). */ \ if (TARGET_386) \ builtin_define ("__tune_i386__"); \ else if (TARGET_486) \ builtin_define ("__tune_i486__"); \ else if (TARGET_PENTIUM) \ { \ builtin_define ("__tune_i586__"); \ builtin_define ("__tune_pentium__"); \ if (last_tune_char == 'x') \⌨️ 快捷键说明
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