📄 sync.md
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;; Machine description for PowerPC synchronization instructions.;; Copyright (C) 2005 Free Software Foundation, Inc.;; Contributed by Geoffrey Keating.;; This file is part of GCC.;; GCC is free software; you can redistribute it and/or modify it;; under the terms of the GNU General Public License as published;; by the Free Software Foundation; either version 2, or (at your;; option) any later version.;; GCC is distributed in the hope that it will be useful, but WITHOUT;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public;; License for more details.;; You should have received a copy of the GNU General Public License;; along with GCC; see the file COPYING. If not, write to the;; Free Software Foundation, 51 Franklin Street, Fifth Floor, Boston,;; MA 02110-1301, USA.(define_mode_attr larx [(SI "lwarx") (DI "ldarx")])(define_mode_attr stcx [(SI "stwcx.") (DI "stdcx.")])(define_code_macro FETCHOP [plus minus ior xor and])(define_code_attr fetchop_name [(plus "add") (minus "sub") (ior "ior") (xor "xor") (and "and")])(define_code_attr fetchop_pred [(plus "add_operand") (minus "gpc_reg_operand") (ior "logical_operand") (xor "logical_operand") (and "and_operand")])(define_code_attr fetchopsi_constr [(plus "rIL") (minus "r") (ior "rKL") (xor "rKL") (and "rTKL")])(define_code_attr fetchopdi_constr [(plus "rIL") (minus "r") (ior "rKJF") (xor "rKJF") (and "rSTKJ")])(define_expand "memory_barrier" [(set (mem:BLK (match_dup 0)) (unspec:BLK [(mem:BLK (match_dup 0))] UNSPEC_SYNC))] ""{ operands[0] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode)); MEM_VOLATILE_P (operands[0]) = 1;})(define_insn "*sync_internal" [(set (match_operand:BLK 0 "" "") (unspec:BLK [(match_operand:BLK 1 "" "")] UNSPEC_SYNC))] "" "{dcs|sync}" [(set_attr "type" "sync")])(define_insn "load_locked_<mode>" [(set (match_operand:GPR 0 "gpc_reg_operand" "=r") (unspec_volatile:GPR [(match_operand:GPR 1 "memory_operand" "Z")] UNSPECV_LL))] "TARGET_POWERPC" "<larx> %0,%y1" [(set_attr "type" "load_l")])(define_insn "store_conditional_<mode>" [(set (match_operand:CC 0 "cc_reg_operand" "=x") (unspec_volatile:CC [(const_int 0)] UNSPECV_SC)) (set (match_operand:GPR 1 "memory_operand" "=Z") (match_operand:GPR 2 "gpc_reg_operand" "r"))] "TARGET_POWERPC" "<stcx> %2,%y1" [(set_attr "type" "store_c")])(define_insn_and_split "sync_compare_and_swap<mode>" [(set (match_operand:GPR 0 "gpc_reg_operand" "=&r") (match_operand:GPR 1 "memory_operand" "+Z")) (set (match_dup 1) (unspec:GPR [(match_operand:GPR 2 "reg_or_short_operand" "rI") (match_operand:GPR 3 "gpc_reg_operand" "r")] UNSPEC_CMPXCHG)) (clobber (match_scratch:GPR 4 "=&r")) (clobber (match_scratch:CC 5 "=&x"))] "TARGET_POWERPC" "#" "&& reload_completed" [(const_int 0)]{ rs6000_split_compare_and_swap (operands[0], operands[1], operands[2], operands[3], operands[4]); DONE;})(define_insn_and_split "sync_lock_test_and_set<mode>" [(set (match_operand:GPR 0 "gpc_reg_operand" "=&r") (match_operand:GPR 1 "memory_operand" "+Z")) (set (match_dup 1) (unspec:GPR [(match_operand:GPR 2 "reg_or_short_operand" "rL")] UNSPEC_XCHG)) (clobber (match_scratch:GPR 3 "=&r")) (clobber (match_scratch:CC 4 "=&x"))] "TARGET_POWERPC" "#" "&& reload_completed" [(const_int 0)]{ rs6000_split_lock_test_and_set (operands[0], operands[1], operands[2], operands[3]); DONE;})(define_expand "sync_<fetchop_name><mode>" [(parallel [(set (match_operand:INT1 0 "memory_operand" "") (unspec:INT1 [(FETCHOP:INT1 (match_dup 0) (match_operand:INT1 1 "<fetchop_pred>" ""))] UNSPEC_ATOMIC)) (clobber (scratch:INT1)) (clobber (scratch:CC))])] "TARGET_POWERPC" "{ if (<MODE>mode != SImode && <MODE>mode != DImode) { if (PPC405_ERRATUM77) FAIL; rs6000_emit_sync (<CODE>, <MODE>mode, operands[0], operands[1], NULL_RTX, NULL_RTX, true); DONE; }}")(define_insn_and_split "*sync_<fetchop_name>si_internal" [(set (match_operand:SI 0 "memory_operand" "+Z") (unspec:SI [(FETCHOP:SI (match_dup 0) (match_operand:SI 1 "<fetchop_pred>" "<fetchopsi_constr>"))] UNSPEC_ATOMIC)) (clobber (match_scratch:SI 2 "=&b")) (clobber (match_scratch:CC 3 "=&x"))] "TARGET_POWERPC" "#" "&& reload_completed" [(const_int 0)]{ rs6000_split_atomic_op (<CODE>, operands[0], operands[1], NULL_RTX, NULL_RTX, operands[2]); DONE;})(define_insn_and_split "*sync_<fetchop_name>di_internal" [(set (match_operand:DI 0 "memory_operand" "+Z") (unspec:DI [(FETCHOP:DI (match_dup 0) (match_operand:DI 1 "<fetchop_pred>" "<fetchopdi_constr>"))] UNSPEC_ATOMIC)) (clobber (match_scratch:DI 2 "=&b")) (clobber (match_scratch:CC 3 "=&x"))] "TARGET_POWERPC" "#" "&& reload_completed" [(const_int 0)]{ rs6000_split_atomic_op (<CODE>, operands[0], operands[1], NULL_RTX, NULL_RTX, operands[2]); DONE;})(define_expand "sync_nand<mode>" [(parallel [(set (match_operand:INT1 0 "memory_operand" "") (unspec:INT1 [(and:INT1 (not:INT1 (match_dup 0)) (match_operand:INT1 1 "gpc_reg_operand" ""))] UNSPEC_ATOMIC)) (clobber (scratch:INT1)) (clobber (scratch:CC))])] "TARGET_POWERPC" "{ if (<MODE>mode != SImode && <MODE>mode != DImode) { if (PPC405_ERRATUM77) FAIL; rs6000_emit_sync (AND, <MODE>mode, gen_rtx_NOT (<MODE>mode, operands[0]), operands[1], NULL_RTX, NULL_RTX, true); DONE; }}")(define_insn_and_split "*sync_nand<mode>_internal" [(set (match_operand:GPR 0 "memory_operand" "+Z") (unspec:GPR [(and:GPR (not:GPR (match_dup 0)) (match_operand:GPR 1 "gpc_reg_operand" "r"))] UNSPEC_ATOMIC)) (clobber (match_scratch:GPR 2 "=&r")) (clobber (match_scratch:CC 3 "=&x"))] "TARGET_POWERPC" "#" "&& reload_completed" [(const_int 0)]{ rs6000_split_atomic_op (NOT, operands[0], operands[1], NULL_RTX, NULL_RTX, operands[2]); DONE;})(define_expand "sync_old_<fetchop_name><mode>" [(parallel [(set (match_operand:INT1 0 "gpc_reg_operand" "") (match_operand:INT1 1 "memory_operand" "")) (set (match_dup 1) (unspec:INT1 [(FETCHOP:INT1 (match_dup 1) (match_operand:INT1 2 "<fetchop_pred>" ""))] UNSPEC_ATOMIC)) (clobber (scratch:INT1)) (clobber (scratch:CC))])] "TARGET_POWERPC" "{ if (<MODE>mode != SImode && <MODE>mode != DImode) { if (PPC405_ERRATUM77) FAIL; rs6000_emit_sync (<CODE>, <MODE>mode, operands[1], operands[2], operands[0], NULL_RTX, true); DONE; }}")(define_insn_and_split "*sync_old_<fetchop_name>si_internal" [(set (match_operand:SI 0 "gpc_reg_operand" "=&r") (match_operand:SI 1 "memory_operand" "+Z")) (set (match_dup 1) (unspec:SI [(FETCHOP:SI (match_dup 1) (match_operand:SI 2 "<fetchop_pred>" "<fetchopsi_constr>"))] UNSPEC_ATOMIC)) (clobber (match_scratch:SI 3 "=&b")) (clobber (match_scratch:CC 4 "=&x"))] "TARGET_POWERPC" "#" "&& reload_completed" [(const_int 0)]{ rs6000_split_atomic_op (<CODE>, operands[1], operands[2], operands[0], NULL_RTX, operands[3]); DONE;})(define_insn_and_split "*sync_old_<fetchop_name>di_internal" [(set (match_operand:DI 0 "gpc_reg_operand" "=&r") (match_operand:DI 1 "memory_operand" "+Z")) (set (match_dup 1) (unspec:DI [(FETCHOP:DI (match_dup 1) (match_operand:DI 2 "<fetchop_pred>" "<fetchopdi_constr>"))] UNSPEC_ATOMIC)) (clobber (match_scratch:DI 3 "=&b")) (clobber (match_scratch:CC 4 "=&x"))] "TARGET_POWERPC" "#" "&& reload_completed" [(const_int 0)]{ rs6000_split_atomic_op (<CODE>, operands[1], operands[2], operands[0], NULL_RTX, operands[3]); DONE;})(define_expand "sync_old_nand<mode>" [(parallel [(set (match_operand:INT1 0 "gpc_reg_operand" "") (match_operand:INT1 1 "memory_operand" "")) (set (match_dup 1) (unspec:INT1 [(and:INT1 (not:INT1 (match_dup 1)) (match_operand:INT1 2 "gpc_reg_operand" ""))] UNSPEC_ATOMIC)) (clobber (scratch:INT1)) (clobber (scratch:CC))])] "TARGET_POWERPC" "{ if (<MODE>mode != SImode && <MODE>mode != DImode) { if (PPC405_ERRATUM77) FAIL; rs6000_emit_sync (AND, <MODE>mode, gen_rtx_NOT (<MODE>mode, operands[1]), operands[2],
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