📄 mt.h
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/* Define this macro to be 1 if all structure and union return values must be in memory. */#define DEFAULT_PCC_STRUCT_RETURN 0/* Define this macro as a C expression that is nonzero if the return instruction or the function epilogue ignores the value of the stack pointer; in other words, if it is safe to delete an instruction to adjust the stack pointer before a return from the function. */#define EXIT_IGNORE_STACK 1#define EPILOGUE_USES(REGNO) mt_epilogue_uses(REGNO)/* Define this macro if the function epilogue contains delay slots to which instructions from the rest of the function can be "moved". */#define DELAY_SLOTS_FOR_EPILOGUE 1/* A C expression that returns 1 if INSN can be placed in delay slot number N of the epilogue. */#define ELIGIBLE_FOR_EPILOGUE_DELAY(INSN, N) 0#define FUNCTION_PROFILER(FILE, LABELNO) gcc_unreachable ()/* Trampolines are not implemented. */#define TRAMPOLINE_SIZE 0#define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, STATIC_CHAIN)/* ?? What is this -- aldyh ?? */#define UCMPSI3_LIBCALL "__ucmpsi3"/* Addressing Modes. *//* A C expression that is 1 if the RTX X is a constant which is a valid address. */#define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)/* A number, the maximum number of registers that can appear in a valid memory address. Note that it is up to you to specify a value equal to the maximum number that `GO_IF_LEGITIMATE_ADDRESS' would ever accept. */#define MAX_REGS_PER_ADDRESS 1#ifdef REG_OK_STRICT#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \{ \ if (mt_legitimate_address_p (MODE, X, 1)) \ goto ADDR; \}#else#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \{ \ if (mt_legitimate_address_p (MODE, X, 0)) \ goto ADDR; \}#endif#ifdef REG_OK_STRICT#define REG_OK_FOR_BASE_P(X) mt_reg_ok_for_base_p (X, 1)#else#define REG_OK_FOR_BASE_P(X) mt_reg_ok_for_base_p (X, 0)#endif#define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_BASE_P (X)#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) {}#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)#define LEGITIMATE_CONSTANT_P(X) 1/* A C expression for the cost of moving data of mode M between a register and memory. A value of 2 is the default; this cost is relative to those in `REGISTER_MOVE_COST'. If moving between registers and memory is more expensive than between two registers, you should define this macro to express the relative cost. */#define MEMORY_MOVE_COST(M,C,I) 10/* Define this macro as a C expression which is nonzero if accessing less than a word of memory (i.e. a `char' or a `short') is no faster than accessing a word of memory. */#define SLOW_BYTE_ACCESS 1#define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) 1 #define TEXT_SECTION_ASM_OP ".text"#define DATA_SECTION_ASM_OP ".data"#define BSS_SECTION_ASM_OP "\t.section\t.bss"/* A C string constant for text to be output before each `asm' statement or group of consecutive ones. Normally this is `"#APP"', which is a comment that has no effect on most assemblers but tells the GNU assembler that it must check the lines that follow for all valid assembler constructs. */#define ASM_APP_ON "#APP\n"/* A C string constant for text to be output after each `asm' statement or group of consecutive ones. Normally this is `"#NO_APP"', which tells the GNU assembler to resume making the time-saving assumptions that are valid for ordinary compiler output. */#define ASM_APP_OFF "#NO_APP\n"/* This is how to output an assembler line defining a `char' constant. */#define ASM_OUTPUT_CHAR(FILE, VALUE) \ do \ { \ fprintf (FILE, "\t.byte\t"); \ output_addr_const (FILE, (VALUE)); \ fprintf (FILE, "\n"); \ } \ while (0)/* This is how to output an assembler line defining a `short' constant. */#define ASM_OUTPUT_SHORT(FILE, VALUE) \ do \ { \ fprintf (FILE, "\t.hword\t"); \ output_addr_const (FILE, (VALUE)); \ fprintf (FILE, "\n"); \ } \ while (0)/* This is how to output an assembler line defining an `int' constant. We also handle symbol output here. */#define ASM_OUTPUT_INT(FILE, VALUE) \ do \ { \ fprintf (FILE, "\t.word\t"); \ output_addr_const (FILE, (VALUE)); \ fprintf (FILE, "\n"); \ } \ while (0)/* A C statement to output to the stdio stream STREAM an assembler instruction to assemble a single byte containing the number VALUE. This declaration must be present. */#define ASM_OUTPUT_BYTE(STREAM, VALUE) \ fprintf (STREAM, "\t%s\t0x%x\n", ASM_BYTE_OP, (VALUE))/* Globalizing directive for a label. */#define GLOBAL_ASM_OP "\t.globl "#define REGISTER_NAMES \{ "R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7", \ "R8", "R9", "R10", "R11", "R12", "R13", "R14", "R15", \ "ap" }/* If defined, a C initializer for an array of structures containing a name and a register number. This macro defines additional names for hard registers, thus allowing the `asm' option in declarations to refer to registers using alternate names. */#define ADDITIONAL_REGISTER_NAMES \{ { "FP", 12}, {"SP", 13}, {"RA", 14}, {"IRA", 15} }/* Define this macro if you are using an unusual assembler that requires different names for the machine instructions. The definition is a C statement or statements which output an assembler instruction opcode to the stdio stream STREAM. The macro-operand PTR is a variable of type `char *' which points to the opcode name in its "internal" form--the form that is written in the machine description. The definition should output the opcode name to STREAM, performing any translation you desire, and increment the variable PTR to point at the end of the opcode so that it will not be output twice. */#define ASM_OUTPUT_OPCODE(STREAM, PTR) \ (PTR) = mt_asm_output_opcode (STREAM, PTR)#define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS) \ mt_final_prescan_insn (INSN, OPVEC, NOPERANDS)#define PRINT_OPERAND(STREAM, X, CODE) mt_print_operand (STREAM, X, CODE)/* A C expression which evaluates to true if CODE is a valid punctuation character for use in the `PRINT_OPERAND' macro. *//* #: Print nop for delay slot. */#define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '#')#define PRINT_OPERAND_ADDRESS(STREAM, X) mt_print_operand_address (STREAM, X)/* If defined, C string expressions to be used for the `%R', `%L', `%U', and `%I' options of `asm_fprintf' (see `final.c'). These are useful when a single `md' file must support multiple assembler formats. In that case, the various `tm.h' files can define these macros differently. USER_LABEL_PREFIX is defined in svr4.h. */#define REGISTER_PREFIX "%"#define LOCAL_LABEL_PREFIX "."#define USER_LABEL_PREFIX ""#define IMMEDIATE_PREFIX ""/* This macro should be provided on machines where the addresses in a dispatch table are relative to the table's own address. The definition should be a C statement to output to the stdio stream STREAM an assembler pseudo-instruction to generate a difference between two labels. VALUE and REL are the numbers of two internal labels. The definitions of these labels are output using `targetm.asm_out.internal_label', and they must be printed in the same way here. */#define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \fprintf (STREAM, "\t.word .L%d-.L%d\n", VALUE, REL)/* This macro should be provided on machines where the addresses in a dispatch table are absolute. The definition should be a C statement to output to the stdio stream STREAM an assembler pseudo-instruction to generate a reference to a label. VALUE is the number of an internal label whose definition is output using `targetm.asm_out.internal_label'. */#define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \fprintf (STREAM, "\t.word .L%d\n", VALUE)#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (GPR_LINK)#define EH_RETURN_DATA_REGNO(N) \ ((N) == 0 ? GPR_R7 : (N) == 1 ? GPR_R8 : INVALID_REGNUM)#define EH_RETURN_STACKADJ_REGNO GPR_R11#define EH_RETURN_STACKADJ_RTX \ gen_rtx_REG (SImode, EH_RETURN_STACKADJ_REGNO)#define EH_RETURN_HANDLER_REGNO GPR_R10#define EH_RETURN_HANDLER_RTX \ gen_rtx_REG (SImode, EH_RETURN_HANDLER_REGNO)#define ASM_OUTPUT_ALIGN(STREAM, POWER) \ fprintf ((STREAM), "\t.p2align %d\n", (POWER))#define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG#ifndef DWARF2_DEBUGGING_INFO#define DWARF2_DEBUGGING_INFO#endif/* Define this macro if GCC should produce dwarf version 2-style line numbers. This usually requires extending the assembler to support them, and #defining DWARF2_LINE_MIN_INSN_LENGTH in the assembler configuration header files. */#define DWARF2_ASM_LINE_DEBUG_INFO 1/* An alias for a machine mode name. This is the machine mode that elements of a jump-table should have. */#define CASE_VECTOR_MODE SImode/* Define this macro if operations between registers with integral mode smaller than a word are always performed on the entire register. Most RISC machines have this property and most CISC machines do not. */#define WORD_REGISTER_OPERATIONS/* The maximum number of bytes that a single instruction can move quickly from memory to memory. */#define MOVE_MAX 4/* A C expression which is nonzero if on this machine it is safe to "convert" an integer of INPREC bits to one of OUTPREC bits (where OUTPREC is smaller than INPREC) by merely operating on it as if it had only OUTPREC bits. On many machines, this expression can be 1. When `TRULY_NOOP_TRUNCATION' returns 1 for a pair of sizes for modes for which `MODES_TIEABLE_P' is 0, suboptimal code can result. If this is the case, making `TRULY_NOOP_TRUNCATION' return 0 in such cases may improve things. */#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1#define Pmode SImode/* An alias for the machine mode used for memory references to functions being called, in `call' RTL expressions. On most machines this should be `QImode'. */#define FUNCTION_MODE QImode#define HANDLE_SYSV_PRAGMA 1/* Indicate how many instructions can be issued at the same time. */#define ISSUE_RATE 1/* Define the information needed to generate branch and scc insns. This is stored from the compare operation. Note that we can't use "rtx" here since it hasn't been defined! */extern struct rtx_def * mt_compare_op0;extern struct rtx_def * mt_compare_op1;
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