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📄 alpha.h

📁 linux下编程用 编译软件
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#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \  ((OFFSET) = alpha_initial_elimination_offset(FROM, TO))/* Define this if stack space is still allocated for a parameter passed   in a register.  *//* #define REG_PARM_STACK_SPACE *//* Value is the number of bytes of arguments automatically   popped when returning from a subroutine call.   FUNDECL is the declaration node of the function (as a tree),   FUNTYPE is the data type of the function (as a tree),   or for a library call it is an identifier node for the subroutine name.   SIZE is the number of bytes of arguments passed on the stack.  */#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0/* Define how to find the value returned by a function.   VALTYPE is the data type of the value (as a tree).   If the precise function being called is known, FUNC is its FUNCTION_DECL;   otherwise, FUNC is 0.   On Alpha the value is found in $0 for integer functions and   $f0 for floating-point functions.  */#define FUNCTION_VALUE(VALTYPE, FUNC) \  function_value (VALTYPE, FUNC, VOIDmode)/* Define how to find the value returned by a library function   assuming the value has mode MODE.  */#define LIBCALL_VALUE(MODE) \  function_value (NULL, NULL, MODE)/* 1 if N is a possible register number for a function value   as seen by the caller.  */#define FUNCTION_VALUE_REGNO_P(N)  \  ((N) == 0 || (N) == 1 || (N) == 32 || (N) == 33)/* 1 if N is a possible register number for function argument passing.   On Alpha, these are $16-$21 and $f16-$f21.  */#define FUNCTION_ARG_REGNO_P(N) \  (((N) >= 16 && (N) <= 21) || ((N) >= 16 + 32 && (N) <= 21 + 32))/* Define a data type for recording info about an argument list   during the scan of that argument list.  This data type should   hold all necessary information about the function itself   and about the args processed so far, enough to enable macros   such as FUNCTION_ARG to determine where the next arg should go.   On Alpha, this is a single integer, which is a number of words   of arguments scanned so far.   Thus 6 or more means all following args should go on the stack.  */#define CUMULATIVE_ARGS int/* Initialize a variable CUM of type CUMULATIVE_ARGS   for a call to a function whose data type is FNTYPE.   For a library call, FNTYPE is 0.  */#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \  (CUM) = 0/* Define intermediate macro to compute the size (in registers) of an argument   for the Alpha.  */#define ALPHA_ARG_SIZE(MODE, TYPE, NAMED)				\  ((MODE) == TFmode || (MODE) == TCmode ? 1				\   : (((MODE) == BLKmode ? int_size_in_bytes (TYPE) : GET_MODE_SIZE (MODE)) \      + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)/* Update the data in CUM to advance over an argument   of mode MODE and data type TYPE.   (TYPE is null for libcalls where that information may not be available.)  */#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)			\  ((CUM) += 								\   (targetm.calls.must_pass_in_stack (MODE, TYPE))			\    ? 6 : ALPHA_ARG_SIZE (MODE, TYPE, NAMED))/* Determine where to put an argument to a function.   Value is zero to push the argument on the stack,   or a hard register in which to store the argument.   MODE is the argument's machine mode.   TYPE is the data type of the argument (as a tree).    This is null for libcalls where that information may    not be available.   CUM is a variable of type CUMULATIVE_ARGS which gives info about    the preceding args and about the function being called.   NAMED is nonzero if this argument is a named parameter    (otherwise it is an extra parameter matching an ellipsis).   On Alpha the first 6 words of args are normally in registers   and the rest are pushed.  */#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED)	\  function_arg((CUM), (MODE), (TYPE), (NAMED))/* Try to output insns to set TARGET equal to the constant C if it can be   done in less than N insns.  Do all computations in MODE.  Returns the place   where the output has been placed if it can be done and the insns have been   emitted.  If it would take more than N insns, zero is returned and no   insns and emitted.  *//* Define the information needed to generate branch and scc insns.  This is   stored from the compare operation.  Note that we can't use "rtx" here   since it hasn't been defined!  */struct alpha_compare{  struct rtx_def *op0, *op1;  int fp_p;};extern struct alpha_compare alpha_compare;/* Make (or fake) .linkage entry for function call.   IS_LOCAL is 0 if name is used in call, 1 if name is used in definition.  *//* This macro defines the start of an assembly comment.  */#define ASM_COMMENT_START " #"/* This macro produces the initial definition of a function.  */#define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \  alpha_start_function(FILE,NAME,DECL);/* This macro closes up a function definition for the assembler.  */#define ASM_DECLARE_FUNCTION_SIZE(FILE,NAME,DECL) \  alpha_end_function(FILE,NAME,DECL)/* Output any profiling code before the prologue.  */#define PROFILE_BEFORE_PROLOGUE 1/* Never use profile counters.  */#define NO_PROFILE_COUNTERS 1/* Output assembler code to FILE to increment profiler label # LABELNO   for profiling a function entry.  Under OSF/1, profiling is enabled   by simply passing -pg to the assembler and linker.  */#define FUNCTION_PROFILER(FILE, LABELNO)/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,   the stack pointer does not matter.  The value is tested only in   functions that have frame pointers.   No definition is equivalent to always zero.  */#define EXIT_IGNORE_STACK 1/* Define registers used by the epilogue and return instruction.  */#define EPILOGUE_USES(REGNO)	((REGNO) == 26)/* Output assembler code for a block containing the constant parts   of a trampoline, leaving space for the variable parts.   The trampoline should set the static chain pointer to value placed   into the trampoline and should branch to the specified routine.   Note that $27 has been set to the address of the trampoline, so we can   use it for addressability of the two data items.  */#define TRAMPOLINE_TEMPLATE(FILE)		\do {						\  fprintf (FILE, "\tldq $1,24($27)\n");		\  fprintf (FILE, "\tldq $27,16($27)\n");	\  fprintf (FILE, "\tjmp $31,($27),0\n");	\  fprintf (FILE, "\tnop\n");			\  fprintf (FILE, "\t.quad 0,0\n");		\} while (0)/* Section in which to place the trampoline.  On Alpha, instructions   may only be placed in a text segment.  */#define TRAMPOLINE_SECTION text_section/* Length in units of the trampoline for entering a nested function.  */#define TRAMPOLINE_SIZE    32/* The alignment of a trampoline, in bits.  */#define TRAMPOLINE_ALIGNMENT  64/* Emit RTL insns to initialize the variable parts of a trampoline.   FNADDR is an RTX for the address of the function's pure code.   CXT is an RTX for the static chain value for the function.  */#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \  alpha_initialize_trampoline (TRAMP, FNADDR, CXT, 16, 24, 8)/* A C expression whose value is RTL representing the value of the return   address for the frame COUNT steps up from the current frame.   FRAMEADDR is the frame pointer of the COUNT frame, or the frame pointer of   the COUNT-1 frame if RETURN_ADDR_IN_PREVIOUS_FRAME is defined.  */#define RETURN_ADDR_RTX  alpha_return_addr/* Before the prologue, RA lives in $26.  */#define INCOMING_RETURN_ADDR_RTX  gen_rtx_REG (Pmode, 26)#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (26)#define DWARF_ALT_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (64)#define DWARF_ZERO_REG 31/* Describe how we implement __builtin_eh_return.  */#define EH_RETURN_DATA_REGNO(N)	((N) < 4 ? (N) + 16 : INVALID_REGNUM)#define EH_RETURN_STACKADJ_RTX	gen_rtx_REG (Pmode, 28)#define EH_RETURN_HANDLER_RTX \  gen_rtx_MEM (Pmode, plus_constant (stack_pointer_rtx, \				     current_function_outgoing_args_size))/* Addressing modes, and classification of registers for them.  *//* Macros to check register numbers against specific register classes.  *//* These assume that REGNO is a hard or pseudo reg number.   They give nonzero only if REGNO is a hard reg of the suitable class   or a pseudo reg currently allocated to a suitable hard reg.   Since they use reg_renumber, they are safe only once reg_renumber   has been allocated, which happens in local-alloc.c.  */#define REGNO_OK_FOR_INDEX_P(REGNO) 0#define REGNO_OK_FOR_BASE_P(REGNO) \((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32  \ || (REGNO) == 63 || reg_renumber[REGNO] == 63)/* Maximum number of registers that can appear in a valid memory address.  */#define MAX_REGS_PER_ADDRESS 1/* Recognize any constant value that is a valid address.  For the Alpha,   there are only constants none since we want to use LDA to load any   symbolic addresses into registers.  */#define CONSTANT_ADDRESS_P(X)   \  (GET_CODE (X) == CONST_INT	\   && (unsigned HOST_WIDE_INT) (INTVAL (X) + 0x8000) < 0x10000)/* Include all constant integers and constant doubles, but not   floating-point, except for floating-point zero.  */#define LEGITIMATE_CONSTANT_P  alpha_legitimate_constant_p/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx   and check its validity for a certain class.   We have two alternate definitions for each of them.   The usual definition accepts all pseudo regs; the other rejects   them unless they have been allocated suitable hard regs.   The symbol REG_OK_STRICT causes the latter definition to be used.   Most source files want to accept pseudo regs in the hope that   they will get allocated to the class that the insn wants them to be in.   Source files for reload pass need to be strict.   After reload, it makes no difference, since pseudo regs have   been eliminated by then.  *//* Nonzero if X is a hard reg that can be used as an index   or if it is a pseudo reg.  */#define REG_OK_FOR_INDEX_P(X) 0/* Nonzero if X is a hard reg that can be used as a base reg   or if it is a pseudo reg.  */#define NONSTRICT_REG_OK_FOR_BASE_P(X)  \  (REGNO (X) < 32 || REGNO (X) == 63 || REGNO (X) >= FIRST_PSEUDO_REGISTER)/* ??? Nonzero if X is the frame pointer, or some virtual register   that may eliminate to the frame pointer.  These will be allowed to   have offsets greater than 32K.  This is done because register   elimination offsets will change the hi/lo split, and if we split   before reload, we will require additional instructions.  */#define NONSTRICT_REG_OK_FP_BASE_P(X)		\  (REGNO (X) == 31 || REGNO (X) == 63		\   || (REGNO (X) >= FIRST_PSEUDO_REGISTER	\       && REGNO (X) < LAST_VIRTUAL_REGISTER))/* Nonzero if X is a hard reg that can be used as a base reg.  */#define STRICT_REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))#ifdef REG_OK_STRICT#define REG_OK_FOR_BASE_P(X)	STRICT_REG_OK_FOR_BASE_P (X)#else#define REG_OK_FOR_BASE_P(X)	NONSTRICT_REG_OK_FOR_BASE_P (X)#endif/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a   valid memory address for an instruction.  */#ifdef REG_OK_STRICT#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN)	\do {						\  if (alpha_legitimate_address_p (MODE, X, 1))	\    goto WIN;					\} while (0)#else#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN)	\do {						\  if (alpha_legitimate_address_p (MODE, X, 0))	\    goto WIN;					\} while (0)#endif/* Try machine-dependent ways of modifying an illegitimate address   to be legitimate.  If we find one, return the new, valid address.   This macro is used in only one place: `memory_address' in explow.c.  */#define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN)			\do {								\  rtx new_x = alpha_legitimize_address (X, NULL_RTX, MODE);	\  if (new_x)							\    {								\      X = new_x;						\      goto WIN;							\    }								\} while (0)/* Try a machine-dependent way of reloading an illegitimate address   operand.  If we find one, push the reload and jump to WIN.  This   macro is used in only one place: `find_reloads_address' in reload.c.  */#define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_L,WIN)		     \do {									     \  rtx new_x = alpha_legitimize_reload_address (X, MODE, OPNUM, TYPE, IND_L); \  if (new_x)								     \    {									     \      X = new_x;							     \      goto WIN;								     \    }									     \} while (0)/* Go to LABEL if ADDR (a legitimate address expression)   has an effect that depends on the machine mode it is used for.   On the Alpha this is true only for the unaligned modes.   We can   simplify this test since we know that the address must be valid.  */#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)  \{ if (GET_CODE (ADDR) == AND) goto LABEL; }/* Specify the machine mode that this machine uses   for the index in the tablejump instruction.  */#define CASE_VECTOR_MODE SImode/* Define as C expression which evaluates to nonzero if the tablejump   instruction expects the table to contain offsets from the address of the   table.   Do not define this if the table should contain absolute addresses.   On the Alpha, the table is really GP-relative, not relative to the PC   of the table, but we pretend that it is PC-relative; this should be OK,   but we should try to find some better way sometime.  */#define CASE_VECTOR_PC_RELATIVE 1/* Define this as 1 if `char' should by default be signed; else as 0.  */#define DEFAULT_SIGNED_CHAR 1/* Max number of bytes we can move to or from memory   in one reasonably fast instruction.  */#define MOVE_MAX 8/* If a memory-to-memory move would take MOVE_RATIO or more simple   move-instruction pairs, we will do a movmem or libcall instead.   Without byte/word accesses, we want no more than four instructions;   with, several single byte accesses are better.  */#define MOVE_RATIO  (TARGET_BWX ? 7 : 2)/* Largest number of bytes of an object that can be placed in a register.   On the Alpha we have plenty of registers, so use TImode.  */#define MAX_FIXED_MODE_SIZE	GET_MODE_BITSIZE (TImode)/* Nonzero if access to memory by bytes is no faster than for words.   Also nonzero if doing byte operations (specifically shifts) in registers   is undesirable.   On the Alpha, we want to not use the byte operation and instead use   masking operations to access fields; these will save instructions.  */#define SLOW_BYTE_ACCESS	1/* Define if operations between registers always perform the operation   on the full register even if a narrower mode is specified.  */#define WORD_REGISTER_OPERATIONS/* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD   will either zero-extend or sign-extend.  The value of this macro should   be the code that says which one of the two operations is implicitly   done, UNKNOWN if none.  */#define LOAD_EXTEND_OP(MODE) ((MODE) == SImode ? SIGN_EXTEND : ZERO_EXTEND)/* Define if loading short immediate values into registers sign extends.  */#define SHORT_IMMEDIATES_SIGN_EXTEND/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits

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