📄 predicates.md
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;; Predicate definitions for HP PA-RISC.;; Copyright (C) 2005 Free Software Foundation, Inc.;;;; This file is part of GCC.;;;; GCC is free software; you can redistribute it and/or modify;; it under the terms of the GNU General Public License as published by;; the Free Software Foundation; either version 2, or (at your option);; any later version.;;;; GCC is distributed in the hope that it will be useful,;; but WITHOUT ANY WARRANTY; without even the implied warranty of;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the;; GNU General Public License for more details.;;;; You should have received a copy of the GNU General Public License;; along with GCC; see the file COPYING. If not, write to;; the Free Software Foundation, 51 Franklin Street, Fifth Floor,;; Boston, MA 02110-1301, USA.;; Return nonzero only if OP is a register of mode MODE, or;; CONST0_RTX.(define_predicate "reg_or_0_operand" (match_code "subreg,reg,const_int,const_double"){ return (op == CONST0_RTX (mode) || register_operand (op, mode));});; Return nonzero if OP is suitable for use in a call to a named;; function.;;;; For 2.5 try to eliminate either call_operand_address or;; function_label_operand, they perform very similar functions.(define_predicate "call_operand_address" (match_code "label_ref,symbol_ref,const_int,const_double,const,high"){ return (GET_MODE (op) == word_mode && CONSTANT_P (op) && ! TARGET_PORTABLE_RUNTIME);});; Return 1 iff OP is an indexed memory operand.(define_predicate "indexed_memory_operand" (match_code "subreg,mem"){ if (GET_MODE (op) != mode) return 0; /* Before reload, a (SUBREG (MEM...)) forces reloading into a register. */ if (reload_completed && GET_CODE (op) == SUBREG) op = SUBREG_REG (op); if (GET_CODE (op) != MEM || symbolic_memory_operand (op, mode)) return 0; op = XEXP (op, 0); return (memory_address_p (mode, op) && IS_INDEX_ADDR_P (op));});; TODO: Add a comment.(define_predicate "symbolic_operand" (match_code "symbol_ref,label_ref,const"){ switch (GET_CODE (op)) { case SYMBOL_REF: return !SYMBOL_REF_TLS_MODEL (op); case LABEL_REF: return 1; case CONST: op = XEXP (op, 0); return (((GET_CODE (XEXP (op, 0)) == SYMBOL_REF && !SYMBOL_REF_TLS_MODEL (XEXP (op, 0))) || GET_CODE (XEXP (op, 0)) == LABEL_REF) && GET_CODE (XEXP (op, 1)) == CONST_INT); default: return 0; }});; Return truth value of statement that OP is a symbolic memory;; operand of mode MODE.(define_predicate "symbolic_memory_operand" (match_code "subreg,mem"){ if (GET_CODE (op) == SUBREG) op = SUBREG_REG (op); if (GET_CODE (op) != MEM) return 0; op = XEXP (op, 0); return ((GET_CODE (op) == SYMBOL_REF && !SYMBOL_REF_TLS_MODEL (op)) || GET_CODE (op) == CONST || GET_CODE (op) == HIGH || GET_CODE (op) == LABEL_REF);});; Return true if OP is a symbolic operand for the TLS Global Dynamic model.(define_predicate "tgd_symbolic_operand" (and (match_code "symbol_ref") (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_GLOBAL_DYNAMIC")));; Return true if OP is a symbolic operand for the TLS Local Dynamic model.(define_predicate "tld_symbolic_operand" (and (match_code "symbol_ref") (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_LOCAL_DYNAMIC")));; Return true if OP is a symbolic operand for the TLS Initial Exec model.(define_predicate "tie_symbolic_operand" (and (match_code "symbol_ref") (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_INITIAL_EXEC")));; Return true if OP is a symbolic operand for the TLS Local Exec model.(define_predicate "tle_symbolic_operand" (and (match_code "symbol_ref") (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_LOCAL_EXEC")));; Return 1 if the operand is a register operand or a non-symbolic;; memory operand after reload. This predicate is used for branch;; patterns that internally handle register reloading. We need to;; accept non-symbolic memory operands after reload to ensure that the;; pattern is still valid if reload didn't find a hard register for;; the operand.(define_predicate "reg_before_reload_operand" (match_code "reg,mem"){ /* Don't accept a SUBREG since it will need a reload. */ if (GET_CODE (op) == SUBREG) return 0; if (register_operand (op, mode)) return 1; if (reload_completed && memory_operand (op, mode) && !symbolic_memory_operand (op, mode)) return 1; return 0;});; Return 1 if the operand is either a register, zero, or a memory;; operand that is not symbolic.(define_predicate "reg_or_0_or_nonsymb_mem_operand" (match_code "subreg,reg,mem,const_int,const_double"){ if (register_operand (op, mode)) return 1; if (op == CONST0_RTX (mode)) return 1; if (GET_CODE (op) == SUBREG) op = SUBREG_REG (op); if (GET_CODE (op) != MEM) return 0; /* Until problems with management of the REG_POINTER flag are resolved, we need to delay creating move insns with unscaled indexed addresses until CSE is not expected. */ if (!TARGET_NO_SPACE_REGS && !cse_not_expected && GET_CODE (XEXP (op, 0)) == PLUS && REG_P (XEXP (XEXP (op, 0), 0)) && REG_P (XEXP (XEXP (op, 0), 1))) return 0; return (!symbolic_memory_operand (op, mode) && memory_address_p (mode, XEXP (op, 0)));});; Accept anything that can be used as a destination operand for a;; move instruction. We don't accept indexed memory operands since;; they are supported only for floating point stores.(define_predicate "move_dest_operand" (match_code "subreg,reg,mem"){ if (register_operand (op, mode)) return 1; if (GET_MODE (op) != mode) return 0; if (GET_CODE (op) == SUBREG) op = SUBREG_REG (op); if (GET_CODE (op) != MEM || symbolic_memory_operand (op, mode)) return 0; op = XEXP (op, 0); return (memory_address_p (mode, op) && !IS_INDEX_ADDR_P (op) && !IS_LO_SUM_DLT_ADDR_P (op));});; Accept anything that can be used as a source operand for a move;; instruction.(define_predicate "move_src_operand" (match_code "subreg,reg,const_int,mem"){ if (register_operand (op, mode)) return 1; if (GET_CODE (op) == CONST_INT) return cint_ok_for_move (INTVAL (op)); if (GET_MODE (op) != mode) return 0; if (GET_CODE (op) == SUBREG) op = SUBREG_REG (op); if (GET_CODE (op) != MEM) return 0; /* Until problems with management of the REG_POINTER flag are resolved, we need to delay creating move insns with unscaled indexed addresses until CSE is not expected. */ if (!TARGET_NO_SPACE_REGS && !cse_not_expected && GET_CODE (XEXP (op, 0)) == PLUS && REG_P (XEXP (XEXP (op, 0), 0)) && REG_P (XEXP (XEXP (op, 0), 1))) return 0; return memory_address_p (mode, XEXP (op, 0));});; Accept anything that can be used as the source operand for a;; prefetch instruction with a cache-control completer.(define_predicate "prefetch_cc_operand" (match_code "mem"){ if (GET_CODE (op) != MEM) return 0; op = XEXP (op, 0); /* We must reject virtual registers as we don't allow REG+D. */ if (op == virtual_incoming_args_rtx || op == virtual_stack_vars_rtx || op == virtual_stack_dynamic_rtx || op == virtual_outgoing_args_rtx || op == virtual_cfa_rtx) return 0; if (!REG_P (op) && !IS_INDEX_ADDR_P (op)) return 0; /* Until problems with management of the REG_POINTER flag are resolved, we need to delay creating prefetch insns with unscaled indexed addresses until CSE is not expected. */ if (!TARGET_NO_SPACE_REGS && !cse_not_expected && GET_CODE (op) == PLUS && REG_P (XEXP (op, 0))) return 0; return memory_address_p (mode, op);});; Accept anything that can be used as the source operand for a;; prefetch instruction with no cache-control completer.(define_predicate "prefetch_nocc_operand" (match_code "mem"){ if (GET_CODE (op) != MEM) return 0; op = XEXP (op, 0); /* Until problems with management of the REG_POINTER flag are resolved, we need to delay creating prefetch insns with unscaled indexed addresses until CSE is not expected. */ if (!TARGET_NO_SPACE_REGS && !cse_not_expected
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