pa.h

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#define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X))

#define VAL_U5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) < 0x20)
#define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X))

#define VAL_11_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x400 < 0x800)
#define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X))

#define VAL_14_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x2000 < 0x4000)
#define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X))

#if HOST_BITS_PER_WIDE_INT > 32
#define VAL_32_BITS_P(X) \
  ((unsigned HOST_WIDE_INT)(X) + ((unsigned HOST_WIDE_INT) 1 << 31)    \
   < (unsigned HOST_WIDE_INT) 2 << 31)
#else
#define VAL_32_BITS_P(X) 1
#endif
#define INT_32_BITS(X) VAL_32_BITS_P (INTVAL (X))

/* These are the modes that we allow for scaled indexing.  */
#define MODE_OK_FOR_SCALED_INDEXING_P(MODE) \
  ((TARGET_64BIT && (MODE) == DImode)					\
   || (MODE) == SImode							\
   || (MODE) == HImode							\
   || (!TARGET_SOFT_FLOAT && ((MODE) == DFmode || (MODE) == SFmode)))

/* These are the modes that we allow for unscaled indexing.  */
#define MODE_OK_FOR_UNSCALED_INDEXING_P(MODE) \
  ((TARGET_64BIT && (MODE) == DImode)					\
   || (MODE) == SImode							\
   || (MODE) == HImode							\
   || (MODE) == QImode							\
   || (!TARGET_SOFT_FLOAT && ((MODE) == DFmode || (MODE) == SFmode)))

#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
{									\
  if ((REG_P (X) && REG_OK_FOR_BASE_P (X))				\
      || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC		\
	   || GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC)	\
	  && REG_P (XEXP (X, 0))					\
	  && REG_OK_FOR_BASE_P (XEXP (X, 0))))				\
    goto ADDR;								\
  else if (GET_CODE (X) == PLUS)					\
    {									\
      rtx base = 0, index = 0;						\
      if (REG_P (XEXP (X, 1))						\
	  && REG_OK_FOR_BASE_P (XEXP (X, 1)))				\
	base = XEXP (X, 1), index = XEXP (X, 0);			\
      else if (REG_P (XEXP (X, 0))					\
	       && REG_OK_FOR_BASE_P (XEXP (X, 0)))			\
	base = XEXP (X, 0), index = XEXP (X, 1);			\
      if (base								\
	  && GET_CODE (index) == CONST_INT				\
	  && ((INT_14_BITS (index)					\
	       && (((MODE) != DImode					\
		    && (MODE) != SFmode					\
		    && (MODE) != DFmode)				\
		   /* The base register for DImode loads and stores	\
		      with long displacements must be aligned because	\
		      the lower three bits in the displacement are	\
		      assumed to be zero.  */				\
		   || ((MODE) == DImode					\
		       && (!TARGET_64BIT				\
			   || (INTVAL (index) % 8) == 0))		\
		   /* Similarly, the base register for SFmode/DFmode	\
		      loads and stores with long displacements must	\
		      be aligned.					\
									\
		      FIXME: the ELF32 linker clobbers the LSB of	\
		      the FP register number in PA 2.0 floating-point	\
		      insns with long displacements.  This is because	\
		      R_PARISC_DPREL14WR and other relocations like	\
		      it are not supported.  For now, we reject long	\
		      displacements on this target.  */			\
		   || (((MODE) == SFmode || (MODE) == DFmode)		\
		       && (TARGET_SOFT_FLOAT				\
			   || (TARGET_PA_20				\
			       && !TARGET_ELF32				\
			       && (INTVAL (index)			\
				   % GET_MODE_SIZE (MODE)) == 0)))))	\
	       || INT_5_BITS (index)))					\
	goto ADDR;							\
      if (!TARGET_DISABLE_INDEXING					\
	  /* Only accept the "canonical" INDEX+BASE operand order	\
	     on targets with non-equivalent space registers.  */	\
	  && (TARGET_NO_SPACE_REGS					\
	      ? (base && REG_P (index))					\
	      : (base == XEXP (X, 1) && REG_P (index)			\
		 && (reload_completed					\
		     || (reload_in_progress && HARD_REGISTER_P (base))	\
		     || REG_POINTER (base))				\
		 && (reload_completed					\
		     || (reload_in_progress && HARD_REGISTER_P (index))	\
		     || !REG_POINTER (index))))				\
	  && MODE_OK_FOR_UNSCALED_INDEXING_P (MODE)			\
	  && REG_OK_FOR_INDEX_P (index)					\
	  && borx_reg_operand (base, Pmode)				\
	  && borx_reg_operand (index, Pmode))				\
	goto ADDR;							\
      if (!TARGET_DISABLE_INDEXING					\
	  && base							\
	  && GET_CODE (index) == MULT					\
	  && MODE_OK_FOR_SCALED_INDEXING_P (MODE)			\
	  && REG_P (XEXP (index, 0))					\
	  && GET_MODE (XEXP (index, 0)) == Pmode			\
	  && REG_OK_FOR_INDEX_P (XEXP (index, 0))			\
	  && GET_CODE (XEXP (index, 1)) == CONST_INT			\
	  && INTVAL (XEXP (index, 1))					\
	     == (HOST_WIDE_INT) GET_MODE_SIZE (MODE)			\
	  && borx_reg_operand (base, Pmode))				\
	goto ADDR;							\
    }									\
  else if (GET_CODE (X) == LO_SUM					\
	   && GET_CODE (XEXP (X, 0)) == REG				\
	   && REG_OK_FOR_BASE_P (XEXP (X, 0))				\
	   && CONSTANT_P (XEXP (X, 1))					\
	   && (TARGET_SOFT_FLOAT					\
	       /* We can allow symbolic LO_SUM addresses for PA2.0.  */	\
	       || (TARGET_PA_20						\
		   && !TARGET_ELF32					\
	           && GET_CODE (XEXP (X, 1)) != CONST_INT)		\
	       || ((MODE) != SFmode					\
		   && (MODE) != DFmode)))				\
    goto ADDR;								\
  else if (GET_CODE (X) == LO_SUM					\
	   && GET_CODE (XEXP (X, 0)) == SUBREG				\
	   && GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG		\
	   && REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0)))		\
	   && CONSTANT_P (XEXP (X, 1))					\
	   && (TARGET_SOFT_FLOAT					\
	       /* We can allow symbolic LO_SUM addresses for PA2.0.  */	\
	       || (TARGET_PA_20						\
		   && !TARGET_ELF32					\
	           && GET_CODE (XEXP (X, 1)) != CONST_INT)		\
	       || ((MODE) != SFmode					\
		   && (MODE) != DFmode)))				\
    goto ADDR;								\
  else if (GET_CODE (X) == LABEL_REF					\
	   || (GET_CODE (X) == CONST_INT				\
	       && INT_5_BITS (X)))					\
    goto ADDR;								\
  /* Needed for -fPIC */						\
  else if (GET_CODE (X) == LO_SUM					\
	   && GET_CODE (XEXP (X, 0)) == REG             		\
	   && REG_OK_FOR_BASE_P (XEXP (X, 0))				\
	   && GET_CODE (XEXP (X, 1)) == UNSPEC				\
	   && (TARGET_SOFT_FLOAT					\
	       || (TARGET_PA_20	&& !TARGET_ELF32)			\
	       || ((MODE) != SFmode					\
		   && (MODE) != DFmode)))				\
    goto ADDR;								\
}

/* Look for machine dependent ways to make the invalid address AD a
   valid address.

   For the PA, transform:

        memory(X + <large int>)

   into:

        if (<large int> & mask) >= 16
          Y = (<large int> & ~mask) + mask + 1  Round up.
        else
          Y = (<large int> & ~mask)             Round down.
        Z = X + Y
        memory (Z + (<large int> - Y));

   This makes reload inheritance and reload_cse work better since Z
   can be reused.

   There may be more opportunities to improve code with this hook.  */
#define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND, WIN) 	\
do { 									\
  long offset, newoffset, mask;						\
  rtx new, temp = NULL_RTX;						\
									\
  mask = (GET_MODE_CLASS (MODE) == MODE_FLOAT				\
	  ? (TARGET_PA_20 && !TARGET_ELF32 ? 0x3fff : 0x1f) : 0x3fff);	\
									\
  if (optimize && GET_CODE (AD) == PLUS)				\
    temp = simplify_binary_operation (PLUS, Pmode,			\
				      XEXP (AD, 0), XEXP (AD, 1));	\
									\
  new = temp ? temp : AD;						\
									\
  if (optimize								\
      && GET_CODE (new) == PLUS						\
      && GET_CODE (XEXP (new, 0)) == REG				\
      && GET_CODE (XEXP (new, 1)) == CONST_INT)				\
    {									\
      offset = INTVAL (XEXP ((new), 1));				\
									\
      /* Choose rounding direction.  Round up if we are >= halfway.  */	\
      if ((offset & mask) >= ((mask + 1) / 2))				\
	newoffset = (offset & ~mask) + mask + 1;			\
      else								\
	newoffset = offset & ~mask;					\
									\
      /* Ensure that long displacements are aligned.  */		\
      if (!VAL_5_BITS_P (newoffset)					\
	  && GET_MODE_CLASS (MODE) == MODE_FLOAT)			\
	newoffset &= ~(GET_MODE_SIZE (MODE) -1);			\
									\
      if (newoffset != 0 && VAL_14_BITS_P (newoffset))			\
	{								\
	  temp = gen_rtx_PLUS (Pmode, XEXP (new, 0),			\
			       GEN_INT (newoffset));			\
	  AD = gen_rtx_PLUS (Pmode, temp, GEN_INT (offset - newoffset));\
	  push_reload (XEXP (AD, 0), 0, &XEXP (AD, 0), 0,		\
		       BASE_REG_CLASS, Pmode, VOIDmode, 0, 0,		\
		       (OPNUM), (TYPE));				\
	  goto WIN;							\
	}								\
    }									\
} while (0)




/* Try machine-dependent ways of modifying an illegitimate address
   to be legitimate.  If we find one, return the new, valid address.
   This macro is used in only one place: `memory_address' in explow.c.

   OLDX is the address as it was before break_out_memory_refs was called.
   In some cases it is useful to look at this to decide what needs to be done.

   MODE and WIN are passed so that this macro can use
   GO_IF_LEGITIMATE_ADDRESS.

   It is always safe for this macro to do nothing.  It exists to recognize
   opportunities to optimize the output.  */

#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)	\
{ rtx orig_x = (X);				\
  (X) = hppa_legitimize_address (X, OLDX, MODE);	\
  if ((X) != orig_x && memory_address_p (MODE, X)) \
    goto WIN; }

/* Go to LABEL if ADDR (a legitimate address expression)
   has an effect that depends on the machine mode it is used for.  */

#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)	\
  if (GET_CODE (ADDR) == PRE_DEC	\
      || GET_CODE (ADDR) == POST_DEC	\
      || GET_CODE (ADDR) == PRE_INC	\
      || GET_CODE (ADDR) == POST_INC)	\
    goto LABEL

#define TARGET_ASM_SELECT_SECTION  pa_select_section

/* Return a nonzero value if DECL has a section attribute.  */
#define IN_NAMED_SECTION_P(DECL) \
  ((TREE_CODE (DECL) == FUNCTION_DECL || TREE_CODE (DECL) == VAR_DECL) \
   && DECL_SECTION_NAME (DECL) != NULL_TREE)

/* The following extra sections and extra section functions are only used
   for SOM, but they must be provided unconditionally because pa.c's calls
   to the functions might not get optimized out when other object formats
   are in use.  */

#define EXTRA_SECTIONS							\
  in_som_readonly_data,							\
  in_som_one_only_readonly_data,					\
  in_som_one_only_data

#define EXTRA_SECTION_FUNCTIONS						\
  SOM_READONLY_DATA_SECTION_FUNCTION					\
  SOM_ONE_ONLY_READONLY_DATA_SECTION_FUNCTION				\
  SOM_ONE_ONLY_DATA_SECTION_FUNCTION					\
  FORGET_SECTION_FUNCTION

/* SOM puts readonly data in the default $LIT$ subspace when PIC code
   is not being generated.  */
#define SOM_READONLY_DATA_SECTION_FUNCTION				\
void									\
som_readonly_data_section (void)					\
{									\
  if (!TARGET_SOM)							\
    return;								\
  if (in_section != in_som_readonly_data)				\
    {									\
      in_section = in_som_readonly_data;				\
      fputs ("\t.SPACE $TEXT$\n\t.SUBSPA $LIT$\n", asm_out_file);	\
    }									\
}

/* When secondary definitions are not supported, SOM makes readonly data one
   only by creating a new $LIT$ subspace in $TEXT$ with the comdat flag.  */
#define SOM_ONE_ONLY_READONLY_DATA_SECTION_FUNCTION			\
void									\
som_one_only_readonly_data_section (void)				\
{									\
  if (!TARGET_SOM)							\
    return;								\
  in_section = in_som_one_only_readonly_data;				\
  fputs ("\t.SPACE $TEXT$\n"						\
	 "\t.NSUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=0x2c,SORT=16,COMDAT\n",\
	 asm_out_file);							\
}

/* When secondary definitions are not supported, SOM makes data one only by
   creating a new $DATA$ subspace in $PRIVATE$ with the comdat flag.  */
#define SOM_ONE_ONLY_DATA_SECTION_FUNCTION				\
void									\
som_one_only_data_section (void)					\
{									\
  if (!TARGET_SOM)							\
    return;								\
  in_section = in_som_one_only_data;					\
  fputs ("\t.SPACE $PRIVATE$\n"						\
	 "\t.NSUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31,SORT=24,COMDAT\n",	\
	 asm_out_file);							\
}

#define FORGET_SECTION_FUNCTION						\
void									\
forget_section (void)							\
{									\
  in_section = no_section;						\
}

/* Define this macro if references to a symbol must be treated
   differently depending on something about the variable or
   function named by the symbol (such as what section it is in).

   The macro definition, if any, is executed immediately after the
   rtl for DECL or ot