crx.md

linux下编程用 编译软件

  [(set (match_operand:SHORT 0 "register_operand" "=r, r")
	(match_operand:SHORT 1 "nonmemory_operand" "r, i"))]
  ""
  "mov<tIsa>\t%1, %0"
  [(set_attr "length" "2,<lImmArith>")]
)

(define_insn "mov<mode>_load"
  [(set (match_operand:CRXMM 0 "register_operand" "=r")
	(match_operand:CRXMM 1 "memory_operand" "m"))]
  ""
  "load<tIsa>\t%1, %0"
  [(set_attr "length" "6")]
)

(define_insn "mov<mode>_load"
  [(set (match_operand:DIDFM 0 "register_operand" "=r")
	(match_operand:DIDFM 1 "memory_operand" "m"))]
  ""
  {
    rtx first_dest_reg = gen_rtx_REG (SImode, REGNO (operands[0]));
    if (reg_overlap_mentioned_p (first_dest_reg, operands[1]))
      return "loadd\t%H1, %H0\;loadd\t%L1, %L0";
    return "loadd\t%L1, %L0\;loadd\t%H1, %H0";
  }
  [(set_attr "length" "12")]
)

(define_insn "mov<mode>_store"
  [(set (match_operand:CRXMM 0 "store_operand" "=m, m")
	(match_operand:CRXMM 1 "reg_or_u4bits_operand" "r, <JG>"))]
  ""
  "stor<tIsa>\t%1, %0"
  [(set_attr "length" "6")]
)

(define_insn "mov<mode>_store"
  [(set (match_operand:DIDFM 0 "store_operand" "=m, m")
	(match_operand:DIDFM 1 "reg_or_u4bits_operand" "r, <JG>"))]
  ""
  "stord\t%H1, %H0\;stord\t%L1, %L0"
  [(set_attr "length" "12")]
)

;;  Movmem Instruction

(define_expand "movmemsi"
  [(use (match_operand:BLK 0 "memory_operand" ""))
   (use (match_operand:BLK 1 "memory_operand" ""))
   (use (match_operand:SI 2 "nonmemory_operand" ""))
   (use (match_operand:SI 3 "const_int_operand" ""))]
  ""
  {
    if (crx_expand_movmem (operands[0], operands[1], operands[2], operands[3]))
      DONE;
    else
      FAIL;
  }
)

;;  Compare and Branch Instructions

(define_insn "cbranch<mode>4"
  [(set (pc)
	(if_then_else (match_operator 0 "comparison_operator"
			[(match_operand:CRXIM 1 "register_operand" "r")
			 (match_operand:CRXIM 2 "reg_or_cst4_operand" "rL")])
		      (label_ref (match_operand 3 "" ""))
		      (pc)))
   (clobber (reg:CC CC_REGNUM))]
  ""
  "cmpb%d0<tIsa>\t%2, %1, %l3"
  [(set_attr "length" "6")]
)

;;  Compare Instructions

(define_expand "cmp<mode>"
  [(set (reg:CC CC_REGNUM)
	(compare:CC (match_operand:CRXIM 0 "register_operand" "")
		    (match_operand:CRXIM 1 "nonmemory_operand" "")))]
  ""
  {
    crx_compare_op0 = operands[0];
    crx_compare_op1 = operands[1];
    DONE;
  }
)

(define_insn "cmp<mode>_internal"
  [(set (reg:CC CC_REGNUM)
	(compare:CC (match_operand:CRXIM 0 "register_operand" "r,r")
		    (match_operand:CRXIM 1 "nonmemory_operand" "r,i")))]
  ""
  "cmp<tIsa>\t%1, %0"
  [(set_attr "length" "2,<lImmArith>")]
)

;;  Conditional Branch Instructions

(define_expand "b<code>"
  [(set (pc)
	(if_then_else (any_cond (reg:CC CC_REGNUM)
				(const_int 0))
		      (label_ref (match_operand 0 ""))
		      (pc)))]
  ""
  {
    crx_expand_branch (<CODE>, operands[0]);
    DONE;
  }
)

(define_insn "bCOND_internal"
  [(set (pc)
	(if_then_else (match_operator 0 "comparison_operator"
			[(reg:CC CC_REGNUM)
			 (const_int 0)])
		      (label_ref (match_operand 1 ""))
		      (pc)))]
  ""
  "b%d0\t%l1"
  [(set_attr "length" "6")]
)

;;  Scond Instructions

(define_expand "s<code>"
  [(set (match_operand:SI 0 "register_operand")
  	(any_cond:SI (reg:CC CC_REGNUM) (const_int 0)))]
  ""
  {
    crx_expand_scond (<CODE>, operands[0]);
    DONE;
  }
)

(define_insn "sCOND_internal"
  [(set (match_operand:SI 0 "register_operand" "=r")
	(match_operator:SI 1 "comparison_operator"
	  [(reg:CC CC_REGNUM) (const_int 0)]))]
  ""
  "s%d1\t%0"
  [(set_attr "length" "2")]
)

;;  Jumps and Branches

(define_insn "indirect_jump_return"
  [(parallel
    [(set (pc)
	  (reg:SI RA_REGNUM))
     (return)])
  ]
  "reload_completed"
  "jump\tra"
  [(set_attr "length" "2")]
)

(define_insn "indirect_jump"
  [(set (pc)
	(match_operand:SI 0 "reg_or_sym_operand" "r,i"))]
  ""
  "@
  jump\t%0
  br\t%a0"
  [(set_attr "length" "2,6")]
)

(define_insn "interrupt_return"
  [(parallel
    [(unspec_volatile [(const_int 0)] 0)
     (return)])]
  ""
  {
    return crx_prepare_push_pop_string (1);
  }
  [(set_attr "length" "14")]
)

(define_insn "jump_to_imm"
  [(set (pc)
	(match_operand 0 "immediate_operand" "i"))]
  ""
  "br\t%c0"
  [(set_attr "length" "6")]
)

(define_insn "jump"
  [(set (pc)
	(label_ref (match_operand 0 "" "")))]
  ""
  "br\t%l0"
  [(set_attr "length" "6")]
)

;;  Function Prologue and Epilogue

(define_expand "prologue"
  [(const_int 0)]
  ""
  {
    crx_expand_prologue ();
    DONE;
  }
)

(define_insn "push_for_prologue"
  [(parallel
    [(set (reg:SI SP_REGNUM)
	  (minus:SI (reg:SI SP_REGNUM)
		    (match_operand:SI 0 "immediate_operand" "i")))])]
  "reload_completed"
  {
    return crx_prepare_push_pop_string (0);
  }
  [(set_attr "length" "4")]
)

(define_expand "epilogue"
  [(return)]
  ""
  {
    crx_expand_epilogue ();
    DONE;
  }
)

(define_insn "pop_and_popret_return"
  [(parallel
    [(set (reg:SI SP_REGNUM)
	  (plus:SI (reg:SI SP_REGNUM)
		   (match_operand:SI 0 "immediate_operand" "i")))
     (use (reg:SI RA_REGNUM))
     (return)])
  ]
  "reload_completed"
  {
    return crx_prepare_push_pop_string (1);
  }
  [(set_attr "length" "4")]
)

(define_insn "popret_RA_return"
  [(parallel
    [(use (reg:SI RA_REGNUM))
     (return)])
  ]
  "reload_completed"
  "popret\tra"
  [(set_attr "length" "2")]
)

;;  Table Jump

(define_insn "tablejump"
  [(set (pc)
	(match_operand:SI 0 "register_operand" "r"))
	(use (label_ref:SI (match_operand 1 "" "" )))]
  ""
  "jump\t%0"
  [(set_attr "length" "2")]
)

;;  Call Instructions

(define_expand "call"
  [(call (match_operand:QI 0 "memory_operand" "")
	 (match_operand 1 "" ""))]
  ""
  {
    emit_call_insn (gen_crx_call (operands[0], operands[1]));
    DONE;
  }
)

(define_expand "crx_call"
  [(parallel
    [(call (match_operand:QI 0 "memory_operand" "")
	   (match_operand 1 "" ""))
     (clobber (reg:SI RA_REGNUM))])]
  ""
  ""
)

(define_insn "crx_call_insn_branch"
  [(call (mem:QI (match_operand:SI 0 "immediate_operand" "i"))
	 (match_operand 1 "" ""))
   (clobber (match_operand:SI 2 "register_operand" "+r"))]
  ""
  "bal\tra, %a0"
  [(set_attr "length" "6")]
)

(define_insn "crx_call_insn_jump"
  [(call (mem:QI (match_operand:SI 0 "register_operand" "r"))
	 (match_operand 1 "" ""))
   (clobber (match_operand:SI 2 "register_operand" "+r"))]
  ""
  "jal\t%0"
  [(set_attr "length" "2")]
)

(define_insn "crx_call_insn_jalid"
  [(call (mem:QI (mem:SI (plus:SI
			   (match_operand:SI 0 "register_operand" "r")
			   (match_operand:SI 1 "register_operand" "r"))))
	 (match_operand 2 "" ""))
   (clobber (match_operand:SI 3 "register_operand" "+r"))]
  ""
  "jalid\t%0, %1"
  [(set_attr "length" "4")]
)

;;  Call Value Instructions

(define_expand "call_value"
  [(set (match_operand 0 "general_operand" "")
	(call (match_operand:QI 1 "memory_operand" "")
	      (match_operand 2 "" "")))]
  ""
  {
    emit_call_insn (gen_crx_call_value (operands[0], operands[1], operands[2]));
    DONE;
  }
)

(define_expand "crx_call_value"
  [(parallel
    [(set (match_operand 0 "general_operand" "")
	  (call (match_operand 1 "memory_operand" "")
		(match_operand 2 "" "")))
     (clobber (reg:SI RA_REGNUM))])]
  ""
  ""
)

(define_insn "crx_call_value_insn_branch"
  [(set (match_operand 0 "" "=g")
	(call (mem:QI (match_operand:SI 1 "immediate_operand" "i"))
	      (match_operand 2 "" "")))
   (clobber (match_operand:SI 3 "register_operand" "+r"))]
  ""
  "bal\tra, %a1"
  [(set_attr "length" "6")]
)

(define_insn "crx_call_value_insn_jump"
  [(set (match_operand 0 "" "=g")
	(call (mem:QI (match_operand:SI 1 "register_operand" "r"))
	      (match_operand 2 "" "")))
   (clobber (match_operand:SI 3 "register_operand" "+r"))]
  ""
  "jal\t%1"
  [(set_attr "length" "2")]
)

(define_insn "crx_call_value_insn_jalid"
  [(set (match_operand 0 "" "=g")
	(call (mem:QI (mem:SI (plus:SI
				(match_operand:SI 1 "register_operand" "r")
				(match_operand:SI 2 "register_operand" "r"))))
	      (match_operand 3 "" "")))
   (clobber (match_operand:SI 4 "register_operand" "+r"))]
  ""
  "jalid\t%0, %1"
  [(set_attr "length" "4")]
)

;;  Nop

(define_insn "nop"
  [(const_int 0)]
  ""
  ""
)

;;  Multiply and Accumulate Instructions

(define_insn "<sPat>madsidi3"
  [(set (match_operand:DI 0 "register_operand" "+k")
	(plus:DI
	  (mult:DI (sz_xtnd:DI (match_operand:SI 1 "register_operand" "%r"))
		   (sz_xtnd:DI (match_operand:SI 2 "register_operand" "r")))
	  (match_dup 0)))
   (clobber (reg:CC CC_REGNUM))]
  "TARGET_MAC"
  "mac<sPat>d\t%2, %1"
  [(set_attr "length" "4")]
)

(define_insn "<sPat>madhisi3"
  [(set (match_operand:SI 0 "register_operand" "+l")
	(plus:SI
	  (mult:SI (sz_xtnd:SI (match_operand:HI 1 "register_operand" "%r"))
		   (sz_xtnd:SI (match_operand:HI 2 "register_operand" "r")))
	  (match_dup 0)))
   (clobber (reg:CC CC_REGNUM))]
  "TARGET_MAC"
  "mac<sPat>w\t%2, %1"
  [(set_attr "length" "4")]
)

(define_insn "<sPat>madqihi3"
  [(set (match_operand:HI 0 "register_operand" "+l")
	(plus:HI
	  (mult:HI (sz_xtnd:HI (match_operand:QI 1 "register_operand" "%r"))
		   (sz_xtnd:HI (match_operand:QI 2 "register_operand" "r")))
	  (match_dup 0)))
   (clobber (reg:CC CC_REGNUM))]
  "TARGET_MAC"
  "mac<sPat>b\t%2, %1"
  [(set_attr "length" "4")]
)

;;  Loop Instructions

(define_expand "doloop_end"
  [(use (match_operand 0 "" ""))	; loop pseudo
   (use (match_operand 1 "" ""))	; iterations; zero if unknown
   (use (match_operand 2 "" ""))	; max iterations
   (use (match_operand 3 "" ""))	; loop level
   (use (match_operand 4 "" ""))]       ; label
  ""
  {
    if (INTVAL (operands[3]) > crx_loop_nesting)
      FAIL;
    switch (GET_MODE (operands[0]))
      {
      case SImode:
	emit_jump_insn (gen_doloop_end_si (operands[4], operands[0]));
	break;
      case HImode:
	emit_jump_insn (gen_doloop_end_hi (operands[4], operands[0]));
	break;
      case QImode:
	emit_jump_insn (gen_doloop_end_qi (operands[4], operands[0]));
	break;
      default:
	FAIL;
      }
    DONE;
  }
)

;   CRX dbnz[bwd] used explicitly (see above) but also by the combiner.

(define_insn "doloop_end_<mode>"
  [(set (pc)
	(if_then_else (ne (match_operand:CRXIM 1 "register_operand" "+r,!m")
			  (const_int 1))
		      (label_ref (match_operand 0 "" ""))
		      (pc)))
   (set (match_dup 1) (plus:CRXIM (match_dup 1) (const_int -1)))
   (clobber (match_scratch:CRXIM 2 "=X,r"))
   (clobber (reg:CC CC_REGNUM))]
  ""
  "@
  dbnz<tIsa>\t%1, %l0
  load<tIsa>\t%1, %2\;add<tIsa>\t$-1, %2\;stor<tIsa>\t%2, %1\;bne\t%l0"
  [(set_attr "length" "6, 12")]
)