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📄 mcore.h

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   If there is more than one class, another class must be named NO_REGS   and contain no registers.   The name GENERAL_REGS must be the name of a class (or an alias for   another name such as ALL_REGS).  This is the class of registers   that is allowed by "g" or "r" in a register constraint.   Also, registers outside this class are allocated only when   instructions express preferences for them.   The classes must be numbered in nondecreasing order; that is,   a larger-numbered class must never be contained completely   in a smaller-numbered class.   For any two classes, it is very desirable that there be another   class that represents their union.  *//* The MCore has only general registers. There are   also some special purpose registers: the T bit register, the   procedure Link and the Count Registers.  */enum reg_class{  NO_REGS,  ONLYR1_REGS,  LRW_REGS,  GENERAL_REGS,  C_REGS,  ALL_REGS,  LIM_REG_CLASSES};#define N_REG_CLASSES  (int) LIM_REG_CLASSES/* Give names of register classes as strings for dump file.  */#define REG_CLASS_NAMES  \{			\  "NO_REGS",		\  "ONLYR1_REGS",	\  "LRW_REGS",		\  "GENERAL_REGS",	\  "C_REGS",		\  "ALL_REGS",		\}/* Define which registers fit in which classes.   This is an initializer for a vector of HARD_REG_SET   of length N_REG_CLASSES.  *//* ??? STACK_POINTER_REGNUM should be excluded from LRW_REGS.  */#define REG_CLASS_CONTENTS      	\{					\  {0x000000},  /* NO_REGS       */	\  {0x000002},  /* ONLYR1_REGS   */	\  {0x007FFE},  /* LRW_REGS      */	\  {0x01FFFF},  /* GENERAL_REGS  */	\  {0x020000},  /* C_REGS        */	\  {0x0FFFFF}   /* ALL_REGS      */	\}/* The same information, inverted:   Return the class number of the smallest class containing   reg number REGNO.  This could be a conditional expression   or could index an array.  */extern const int regno_reg_class[FIRST_PSEUDO_REGISTER];#define REGNO_REG_CLASS(REGNO) regno_reg_class[REGNO]/* When defined, the compiler allows registers explicitly used in the   rtl to be used as spill registers but prevents the compiler from   extending the lifetime of these registers.  */#define SMALL_REGISTER_CLASSES 1 /* The class value for index registers, and the one for base regs.  */#define INDEX_REG_CLASS  NO_REGS#define BASE_REG_CLASS	 GENERAL_REGS/* Get reg_class from a letter such as appears in the machine    description.  */extern const enum reg_class reg_class_from_letter[];#define REG_CLASS_FROM_LETTER(C) \   (ISLOWER (C) ? reg_class_from_letter[(C) - 'a'] : NO_REGS)/* The letters I, J, K, L, M, N, O, and P in a register constraint string   can be used to stand for particular ranges of immediate operands.   This macro defines what the ranges are.   C is the letter, and VALUE is a constant value.   Return 1 if VALUE is in the range specified by C.	I: loadable by movi (0..127)	J: arithmetic operand 1..32	K: shift operand 0..31	L: negative arithmetic operand -1..-32	M: powers of two, constants loadable by bgeni	N: powers of two minus 1, constants loadable by bmaski, including -1        O: allowed by cmov with two constants +/- 1 of each other        P: values we will generate 'inline' -- without an 'lrw'   Others defined for use after reload        Q: constant 1	R: a label        S: 0/1/2 cleared bits out of 32	[for bclri's]        T: 2 set bits out of 32	[for bseti's]        U: constant 0        xxxS: 1 cleared bit out of 32 (complement of power of 2). for bclri        xxxT: 2 cleared bits out of 32. for pairs of bclris.  */#define CONST_OK_FOR_I(VALUE) (((int)(VALUE)) >= 0 && ((int)(VALUE)) <= 0x7f)#define CONST_OK_FOR_J(VALUE) (((int)(VALUE)) >  0 && ((int)(VALUE)) <= 32)#define CONST_OK_FOR_L(VALUE) (((int)(VALUE)) <  0 && ((int)(VALUE)) >= -32)#define CONST_OK_FOR_K(VALUE) (((int)(VALUE)) >= 0 && ((int)(VALUE)) <= 31)#define CONST_OK_FOR_M(VALUE) (exact_log2 (VALUE) >= 0)#define CONST_OK_FOR_N(VALUE) (((int)(VALUE)) == -1 || exact_log2 ((VALUE) + 1) >= 0)#define CONST_OK_FOR_O(VALUE) (CONST_OK_FOR_I(VALUE) || \                               CONST_OK_FOR_M(VALUE) || \                               CONST_OK_FOR_N(VALUE) || \                               CONST_OK_FOR_M((int)(VALUE) - 1) || \                               CONST_OK_FOR_N((int)(VALUE) + 1))#define CONST_OK_FOR_P(VALUE) (mcore_const_ok_for_inline (VALUE)) #define CONST_OK_FOR_LETTER_P(VALUE, C)     \     ((C) == 'I' ? CONST_OK_FOR_I (VALUE)   \    : (C) == 'J' ? CONST_OK_FOR_J (VALUE)   \    : (C) == 'L' ? CONST_OK_FOR_L (VALUE)   \    : (C) == 'K' ? CONST_OK_FOR_K (VALUE)   \    : (C) == 'M' ? CONST_OK_FOR_M (VALUE)   \    : (C) == 'N' ? CONST_OK_FOR_N (VALUE)   \    : (C) == 'P' ? CONST_OK_FOR_P (VALUE)   \    : (C) == 'O' ? CONST_OK_FOR_O (VALUE)   \    : 0)/* Similar, but for floating constants, and defining letters G and H.   Here VALUE is the CONST_DOUBLE rtx itself.  */#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \   ((C) == 'G' ? CONST_OK_FOR_I (CONST_DOUBLE_HIGH (VALUE)) \	      && CONST_OK_FOR_I (CONST_DOUBLE_LOW (VALUE))  \    : 0)/* Letters in the range `Q' through `U' in a register constraint string   may be defined in a machine-dependent fashion to stand for arbitrary   operand types.  */#define EXTRA_CONSTRAINT(OP, C)				\  ((C) == 'R' ? (GET_CODE (OP) == MEM			\		 && GET_CODE (XEXP (OP, 0)) == LABEL_REF) \   : (C) == 'S' ? (GET_CODE (OP) == CONST_INT \                   && mcore_num_zeros (INTVAL (OP)) <= 2) \   : (C) == 'T' ? (GET_CODE (OP) == CONST_INT \                   && mcore_num_ones (INTVAL (OP)) == 2) \   : (C) == 'Q' ? (GET_CODE (OP) == CONST_INT \                   && INTVAL(OP) == 1) \   : (C) == 'U' ? (GET_CODE (OP) == CONST_INT \                   && INTVAL(OP) == 0) \   : 0)/* Given an rtx X being reloaded into a reg required to be   in class CLASS, return the class of reg to actually use.   In general this is just CLASS; but on some machines   in some cases it is preferable to use a more restrictive class.  */#define PREFERRED_RELOAD_CLASS(X, CLASS) mcore_reload_class (X, CLASS)/* Return the register class of a scratch register needed to copy IN into   or out of a register in CLASS in MODE.  If it can be done directly,   NO_REGS is returned.  */#define SECONDARY_RELOAD_CLASS(CLASS, MODE, X) \  mcore_secondary_reload_class (CLASS, MODE, X)/* Return the maximum number of consecutive registers   needed to represent mode MODE in a register of class CLASS.    On MCore this is the size of MODE in words.  */#define CLASS_MAX_NREGS(CLASS, MODE)  \     (ROUND_ADVANCE (GET_MODE_SIZE (MODE)))/* Stack layout; function entry, exit and calling.  *//* Define the number of register that can hold parameters.   These two macros are used only in other macro definitions below.  */#define NPARM_REGS 6#define FIRST_PARM_REG 2#define FIRST_RET_REG 2/* Define this if pushing a word on the stack   makes the stack pointer a smaller address.  */#define STACK_GROWS_DOWNWARD  /* Offset within stack frame to start allocating local variables at.   If FRAME_GROWS_DOWNWARD, this is the offset to the END of the   first local allocated.  Otherwise, it is the offset to the BEGINNING   of the first local allocated.  */#define STARTING_FRAME_OFFSET  0/* If defined, the maximum amount of space required for outgoing arguments   will be computed and placed into the variable   `current_function_outgoing_args_size'.  No space will be pushed   onto the stack for each call; instead, the function prologue should   increase the stack frame size by this amount.  */#define ACCUMULATE_OUTGOING_ARGS 1/* Offset of first parameter from the argument pointer register value.  */#define FIRST_PARM_OFFSET(FNDECL)  0/* Value is the number of byte of arguments automatically   popped when returning from a subroutine call.   FUNTYPE is the data type of the function (as a tree),   or for a library call it is an identifier node for the subroutine name.   SIZE is the number of bytes of arguments passed on the stack.   On the MCore, the callee does not pop any of its arguments that were passed   on the stack.  */#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0/* Define how to find the value returned by a function.   VALTYPE is the data type of the value (as a tree).   If the precise function being called is known, FUNC is its FUNCTION_DECL;   otherwise, FUNC is 0.  */#define FUNCTION_VALUE(VALTYPE, FUNC)  mcore_function_value (VALTYPE, FUNC)/* Don't default to pcc-struct-return, because gcc is the only compiler, and   we want to retain compatibility with older gcc versions.  */#define DEFAULT_PCC_STRUCT_RETURN 0/* Define how to find the value returned by a library function   assuming the value has mode MODE.  */#define LIBCALL_VALUE(MODE)  gen_rtx_REG (MODE, FIRST_RET_REG)/* 1 if N is a possible register number for a function value.   On the MCore, only r4 can return results.  */#define FUNCTION_VALUE_REGNO_P(REGNO)  ((REGNO) == FIRST_RET_REG)/* 1 if N is a possible register number for function argument passing.  */#define FUNCTION_ARG_REGNO_P(REGNO)  \  ((REGNO) >= FIRST_PARM_REG && (REGNO) < (NPARM_REGS + FIRST_PARM_REG))/* Define a data type for recording info about an argument list   during the scan of that argument list.  This data type should   hold all necessary information about the function itself   and about the args processed so far, enough to enable macros   such as FUNCTION_ARG to determine where the next arg should go.   On MCore, this is a single integer, which is a number of words   of arguments scanned so far (including the invisible argument,   if any, which holds the structure-value-address).   Thus NARGREGS or more means all following args should go on the stack.  */#define CUMULATIVE_ARGS  int#define ROUND_ADVANCE(SIZE)	\  ((SIZE + UNITS_PER_WORD - 1) / UNITS_PER_WORD)/* Round a register number up to a proper boundary for an arg of mode    MODE.       We round to an even reg for things larger than a word.  */#define ROUND_REG(X, MODE) 				\  ((TARGET_8ALIGN 					\   && GET_MODE_UNIT_SIZE ((MODE)) > UNITS_PER_WORD) 	\   ? ((X) + ((X) & 1)) : (X))/* Initialize a variable CUM of type CUMULATIVE_ARGS   for a call to a function whose data type is FNTYPE.   For a library call, FNTYPE is 0.   On MCore, the offset always starts at 0: the first parm reg is always   the same reg.  */#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \  ((CUM) = 0)/* Update the data in CUM to advance over an argument   of mode MODE and data type TYPE.   (TYPE is null for libcalls where that information may not be   available.)  */#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)	   \ ((CUM) = (ROUND_REG ((CUM), (MODE))			   \	   + ((NAMED) * mcore_num_arg_regs (MODE, TYPE)))) \/* Define where to put the arguments to a function.  */#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \  mcore_function_arg (CUM, MODE, TYPE, NAMED)/* Call the function profiler with a given profile label.  */#define FUNCTION_PROFILER(STREAM,LABELNO)		\{							\  fprintf (STREAM, "	trap	1\n");			\  fprintf (STREAM, "	.align	2\n");			\  fprintf (STREAM, "	.long	LP%d\n", (LABELNO));	\}/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,   the stack pointer does not matter.  The value is tested only in   functions that have frame pointers.   No definition is equivalent to always zero.  */#define EXIT_IGNORE_STACK 0/* Output assembler code for a block containing the constant parts   of a trampoline, leaving space for the variable parts.   On the MCore, the trampoline looks like:   	lrw	r1,  function     	lrw	r13, area   	jmp	r13   	or	r0, r0    .literals                                                */#define TRAMPOLINE_TEMPLATE(FILE)  		\{						\  fprintf ((FILE), "	.short	0x7102\n");	\  fprintf ((FILE), "	.short	0x7d02\n");	\  fprintf ((FILE), "	.short	0x00cd\n");     \  fprintf ((FILE), "	.short	0x1e00\n");	\  fprintf ((FILE), "	.long	0\n");		\  fprintf ((FILE), "	.long	0\n");		\}/* Length in units of the trampoline for entering a nested function.  */#define TRAMPOLINE_SIZE  12/* Alignment required for a trampoline in bits.  */#define TRAMPOLINE_ALIGNMENT  32/* Emit RTL insns to initialize the variable parts of a trampoline.   FNADDR is an RTX for the address of the function's pure code.   CXT is an RTX for the static chain value for the function.  */#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT)  \{									\  emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 8)),	\		  (CXT));						\  emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 12)),	\		  (FNADDR));						\}/* Macros to check register numbers against specific register classes.  *//* These assume that REGNO is a hard or pseudo reg number.   They give nonzero only if REGNO is a hard reg of the suitable class   or a pseudo reg currently allocated to a suitable hard reg.   Since they use reg_renumber, they are safe only once reg_renumber   has been allocated, which happens in local-alloc.c.  */#define REGNO_OK_FOR_BASE_P(REGNO)  \  ((REGNO) < AP_REG || (unsigned) reg_renumber[(REGNO)] < AP_REG)#define REGNO_OK_FOR_INDEX_P(REGNO)   0/* Maximum number of registers that can appear in a valid memory    address.  */#define MAX_REGS_PER_ADDRESS 1/* Recognize any constant value that is a valid address.  */#define CONSTANT_ADDRESS_P(X) 	 (GET_CODE (X) == LABEL_REF)/* Nonzero if the constant value X is a legitimate general operand.   It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.   On the MCore, allow anything but a double.  */

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