m32c.h

linux下编程用 编译软件

"HL_REGS", \
"QI_REGS", \
"R23_REGS", \
"R03_REGS", \
"DI_REGS", \
"A_REGS", \
"AD_REGS", \
"PS_REGS", \
"SI_REGS", \
"HI_REGS", \
"RA_REGS", \
"GENERAL_REGS", \
"FLG_REGS", \
"HC_REGS", \
"MEM_REGS", \
"R02_A_MEM_REGS", \
"A_HL_MEM_REGS", \
"R1_R3_A_MEM_REGS", \
"R03_MEM_REGS", \
"A_HI_MEM_REGS", \
"A_AD_CR_MEM_SI_REGS", \
"ALL_REGS", \
}

#define REGNO_REG_CLASS(R) m32c_regno_reg_class (R)

/* We support simple displacements off address registers, nothing else.  */
#define BASE_REG_CLASS A_REGS
#define INDEX_REG_CLASS NO_REGS

/* We primarily use the new "long" constraint names, with the initial
   letter classifying the constraint type and following letters
   specifying which.  The types are:

   I - integer values
   R - register classes
   S - memory references (M was used)
   A - addresses (currently unused)
*/

#define CONSTRAINT_LEN(CHAR,STR) \
	((CHAR) == 'I' ? 3 \
	 : (CHAR) == 'R' ? 3 \
	 : (CHAR) == 'S' ? 2 \
	 : (CHAR) == 'A' ? 2 \
	 : DEFAULT_CONSTRAINT_LEN(CHAR,STR))
#define REG_CLASS_FROM_CONSTRAINT(CHAR,STR) \
	m32c_reg_class_from_constraint (CHAR, STR)

#define REGNO_OK_FOR_BASE_P(NUM) m32c_regno_ok_for_base_p (NUM)
#define REGNO_OK_FOR_INDEX_P(NUM) 0

#define PREFERRED_RELOAD_CLASS(X,CLASS) m32c_preferred_reload_class (X, CLASS)
#define PREFERRED_OUTPUT_RELOAD_CLASS(X,CLASS) m32c_preferred_output_reload_class (X, CLASS)
#define LIMIT_RELOAD_CLASS(MODE,CLASS) m32c_limit_reload_class (MODE, CLASS)

#define SECONDARY_RELOAD_CLASS(CLASS,MODE,X) m32c_secondary_reload_class (CLASS, MODE, X)

#define SMALL_REGISTER_CLASSES 1

#define CLASS_LIKELY_SPILLED_P(C) m32c_class_likely_spilled_p (C)

#define CLASS_MAX_NREGS(C,M) m32c_class_max_nregs (C, M)

#define CANNOT_CHANGE_MODE_CLASS(F,T,C) m32c_cannot_change_mode_class(F,T,C)

#define CONST_OK_FOR_CONSTRAINT_P(VALUE,C,STR) \
	m32c_const_ok_for_constraint_p (VALUE, C, STR)
#define CONST_DOUBLE_OK_FOR_CONSTRAINT_P(VALUE,C,STR) 0
#define EXTRA_CONSTRAINT_STR(VALUE,C,STR) \
	m32c_extra_constraint_p (VALUE, C, STR)
#define EXTRA_MEMORY_CONSTRAINT(C,STR) \
	m32c_extra_memory_constraint (C, STR)
#define EXTRA_ADDRESS_CONSTRAINT(C,STR) \
	m32c_extra_address_constraint (C, STR)

/* STACK AND CALLING */

/* Frame Layout */

/* Standard push/pop stack, no surprises here.  */

#define STACK_GROWS_DOWNWARD 1
#define STACK_PUSH_CODE PRE_DEC
#define FRAME_GROWS_DOWNWARD 1

#define STARTING_FRAME_OFFSET 0
#define FIRST_PARM_OFFSET(F) 0

#define RETURN_ADDR_RTX(COUNT,FA) m32c_return_addr_rtx (COUNT)

#define INCOMING_RETURN_ADDR_RTX m32c_incoming_return_addr_rtx()
#define INCOMING_FRAME_SP_OFFSET 3

/* Exception Handling Support */

#define EH_RETURN_DATA_REGNO(N) m32c_eh_return_data_regno (N)
#define EH_RETURN_STACKADJ_RTX m32c_eh_return_stackadj_rtx ()

/* Registers That Address the Stack Frame */

#ifndef FP_REGNO
#define FP_REGNO 7
#endif
#ifndef SP_REGNO
#define SP_REGNO 8
#endif
#define AP_REGNO 11

#define STACK_POINTER_REGNUM	SP_REGNO
#define FRAME_POINTER_REGNUM	FP_REGNO
#define ARG_POINTER_REGNUM	AP_REGNO

/* The static chain must be pointer-capable.  */
#define STATIC_CHAIN_REGNUM A0_REGNO

#define DWARF_FRAME_REGISTERS 20
#define DWARF_FRAME_REGNUM(N) m32c_dwarf_frame_regnum (N)
#define DBX_REGISTER_NUMBER(N) m32c_dwarf_frame_regnum (N)

/* Eliminating Frame Pointer and Arg Pointer */

/* If the frame pointer isn't used, we detect it manually.  But the
   stack pointer doesn't have as flexible addressing as the frame
   pointer, so we always assume we have it.  */
#define FRAME_POINTER_REQUIRED 1

#define ELIMINABLE_REGS \
  {{AP_REGNO, SP_REGNO}, \
   {AP_REGNO, FB_REGNO}, \
   {FB_REGNO, SP_REGNO}}

#define CAN_ELIMINATE(FROM,TO) 1
#define INITIAL_ELIMINATION_OFFSET(FROM,TO,VAR) \
	(VAR) = m32c_initial_elimination_offset(FROM,TO)

/* Passing Function Arguments on the Stack */

#define PUSH_ARGS 1
#define PUSH_ROUNDING(N) m32c_push_rounding (N)
#define RETURN_POPS_ARGS(D,T,S) 0
#define CALL_POPS_ARGS(C) 0

/* Passing Arguments in Registers */

#define FUNCTION_ARG(CA,MODE,TYPE,NAMED) \
	m32c_function_arg (&(CA),MODE,TYPE,NAMED)

typedef struct m32c_cumulative_args
{
  /* For address of return value buffer (structures are returned by
     passing the address of a buffer as an invisible first argument.
     This identifies it).  If set, the current parameter will be put
     on the stack, regardless of type.  */
  int force_mem;
  /* First parm is 1, parm 0 is hidden pointer for returning
     aggregates.  */
  int parm_num;
} m32c_cumulative_args;

#define CUMULATIVE_ARGS m32c_cumulative_args
#define INIT_CUMULATIVE_ARGS(CA,FNTYPE,LIBNAME,FNDECL,N_NAMED_ARGS) \
	m32c_init_cumulative_args (&(CA),FNTYPE,LIBNAME,FNDECL,N_NAMED_ARGS)
#define FUNCTION_ARG_ADVANCE(CA,MODE,TYPE,NAMED) \
	m32c_function_arg_advance (&(CA),MODE,TYPE,NAMED)
#define FUNCTION_ARG_BOUNDARY(MODE,TYPE) (TARGET_A16 ? 8 : 16)
#define FUNCTION_ARG_REGNO_P(r) m32c_function_arg_regno_p (r)

/* How Scalar Function Values Are Returned */

#define FUNCTION_VALUE(VT,F) m32c_function_value (VT, F)
#define LIBCALL_VALUE(MODE) m32c_libcall_value (MODE)

#define FUNCTION_VALUE_REGNO_P(r) ((r) == R0_REGNO || (r) == MEM0_REGNO)

/* How Large Values Are Returned */

#define DEFAULT_PCC_STRUCT_RETURN 1

/* Function Entry and Exit */

#define EXIT_IGNORE_STACK 0
#define EPILOGUE_USES(REGNO) m32c_epilogue_uses(REGNO)
#define EH_USES(REGNO) 0	/* FIXME */

/* Generating Code for Profiling */

#define FUNCTION_PROFILER(FILE,LABELNO)

/* Implementing the Varargs Macros */

/* Trampolines for Nested Functions */

#define TRAMPOLINE_SIZE m32c_trampoline_size ()
#define TRAMPOLINE_ALIGNMENT m32c_trampoline_alignment ()
#define INITIALIZE_TRAMPOLINE(a,fn,sc) m32c_initialize_trampoline (a, fn, sc)

/* Addressing Modes */

#define HAVE_PRE_DECREMENT 1
#define HAVE_POST_INCREMENT 1
#define CONSTANT_ADDRESS_P(X) CONSTANT_P(X)
#define MAX_REGS_PER_ADDRESS 1

/* This is passed to the macros below, so that they can be implemented
   in m32c.c.  */
#ifdef REG_OK_STRICT
#define REG_OK_STRICT_V 1
#else
#define REG_OK_STRICT_V 0
#endif

#define GO_IF_LEGITIMATE_ADDRESS(MODE,X,LABEL) \
	if (m32c_legitimate_address_p (MODE, X, REG_OK_STRICT_V)) \
	  goto LABEL;

#define REG_OK_FOR_BASE_P(X) m32c_reg_ok_for_base_p (X, REG_OK_STRICT_V)
#define REG_OK_FOR_INDEX_P(X) 0

/* #define FIND_BASE_TERM(X) when we do unspecs for symrefs */

#define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
	if (m32c_legitimize_address(&(X),OLDX,MODE)) \
	  goto win;

#define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_LEVELS,WIN) \
	if (m32c_legitimize_reload_address(&(X),MODE,OPNUM,TYPE,IND_LEVELS)) \
	  goto win;

#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
	if (m32c_mode_dependent_address (ADDR)) \
	  goto LABEL;

#define LEGITIMATE_CONSTANT_P(X) m32c_legitimate_constant_p (X)

/* Condition Code Status */

#define REVERSIBLE_CC_MODE(MODE) 1

/* Describing Relative Costs of Operations */

#define REGISTER_MOVE_COST(MODE,FROM,TO) \
	m32c_register_move_cost (MODE, FROM, TO)
#define MEMORY_MOVE_COST(MODE,CLASS,IN) \
	m32c_memory_move_cost (MODE, CLASS, IN)

/* Dividing the Output into Sections (Texts, Data, ...) */

#define TEXT_SECTION_ASM_OP ".text"
#define DATA_SECTION_ASM_OP ".data"
#define BSS_SECTION_ASM_OP ".bss"

/* The Overall Framework of an Assembler File */

#define ASM_COMMENT_START ";"
#define ASM_APP_ON ""
#define ASM_APP_OFF ""

/* Output and Generation of Labels */

#define GLOBAL_ASM_OP "\t.global\t"

/* Output of Assembler Instructions */

#define REGISTER_NAMES {	\
  "r0", "r2", "r1", "r3", \
  "a0", "a1", "sb", "fb", "sp", \
  "pc", "flg", "argp", \
  "mem0",  "mem2",  "mem4",  "mem6",  "mem8",  "mem10",  "mem12",  "mem14", \
}

#define ADDITIONAL_REGISTER_NAMES { \
  {"r0l", 0}, \
  {"r1l", 2}, \
  {"r0r2", 0}, \
  {"r1r3", 2}, \
  {"a0a1", 4}, \
  {"r0r2r1r3", 0} }

#define PRINT_OPERAND(S,X,C) m32c_print_operand (S, X, C)
#define PRINT_OPERAND_PUNCT_VALID_P(C) m32c_print_operand_punct_valid_p (C)
#define PRINT_OPERAND_ADDRESS(S,X) m32c_print_operand_address (S, X)

#undef USER_LABEL_PREFIX
#define USER_LABEL_PREFIX "_"

#define ASM_OUTPUT_REG_PUSH(S,R) m32c_output_reg_push (S, R)
#define ASM_OUTPUT_REG_POP(S,R) m32c_output_reg_pop (S, R)

/* Output of Dispatch Tables */

#define ASM_OUTPUT_ADDR_VEC_ELT(S,V) \
	fprintf (S, "\t.word L%d\n", V)

/* Assembler Commands for Exception Regions */

#define DWARF_CIE_DATA_ALIGNMENT -1

/* Assembler Commands for Alignment */

#define ASM_OUTPUT_ALIGN(STREAM,POWER) \
	fprintf (STREAM, "\t.p2align\t%d\n", POWER);

/* Controlling Debugging Information Format */

#define DWARF2_ADDR_SIZE	4

/* Miscellaneous Parameters */

#define HAS_LONG_COND_BRANCH false
#define HAS_LONG_UNCOND_BRANCH true
#define CASE_VECTOR_MODE SImode
#define LOAD_EXTEND_OP(MEM) ZERO_EXTEND

#define MOVE_MAX 4
#define TRULY_NOOP_TRUNCATION(op,ip) 1

/* 16 or 24 bit pointers */
#define Pmode (TARGET_A16 ? HImode : PSImode)
#define FUNCTION_MODE QImode

#define REGISTER_TARGET_PRAGMAS() m32c_register_pragmas()

#endif