predicates.md

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	return FALSE;

      addr_reg = addr0;
    }

  else
    return FALSE;

  if (addr_reg == frame_pointer_rtx || addr_reg == stack_pointer_rtx)
    return TRUE;

  return FALSE;
})

;; Return true if operand is a 2 word memory address that needs to use
;; two instructions to load or store.

(define_predicate "dbl_memory_two_insn_operand"
  (match_code "mem")
{
  if (GET_CODE (op) != MEM)
    return FALSE;

  if (mode != VOIDmode && GET_MODE_SIZE (mode) != 2*UNITS_PER_WORD)
    return FALSE;

  if (! TARGET_DWORD)
    return TRUE;

  return ! dbl_memory_one_insn_operand (op, mode);
})

;; Return true if operand is a memory reference suitable for a call.

(define_predicate "call_operand"
  (match_code "reg,subreg,const_int,const,symbol_ref")
{
  if (GET_MODE (op) != mode && mode != VOIDmode && GET_CODE (op) != CONST_INT)
    return FALSE;

  if (GET_CODE (op) == SYMBOL_REF)
    return !TARGET_LONG_CALLS || SYMBOL_REF_LOCAL_P (op);

  /* Note this doesn't allow reg+reg or reg+imm12 addressing (which should
     never occur anyway), but prevents reload from not handling the case
     properly of a call through a pointer on a function that calls
     vfork/setjmp, etc. due to the need to flush all of the registers to stack.  */
  return gpr_or_int12_operand (op, mode);
})

;; Return true if operand is a memory reference suitable for a
;; sibcall.

(define_predicate "sibcall_operand"
  (match_code "reg,subreg,const_int,const")
{
  if (GET_MODE (op) != mode && mode != VOIDmode && GET_CODE (op) != CONST_INT)
    return FALSE;

  /* Note this doesn't allow reg+reg or reg+imm12 addressing (which should
     never occur anyway), but prevents reload from not handling the case
     properly of a call through a pointer on a function that calls
     vfork/setjmp, etc. due to the need to flush all of the registers to stack.  */
  return gpr_or_int12_operand (op, mode);
})

;; Return 1 if operand is an integer constant with the bottom 16 bits
;; clear.

(define_predicate "upper_int16_operand"
  (match_code "const_int")
{
  if (GET_CODE (op) != CONST_INT)
    return FALSE;

  return ((INTVAL (op) & 0xffff) == 0);
})

;; Return 1 if operand is a 16 bit unsigned immediate.

(define_predicate "uint16_operand"
  (match_code "const_int")
{
  if (GET_CODE (op) != CONST_INT)
    return FALSE;

  return IN_RANGE_P (INTVAL (op), 0, 0xffff);
})

;; Returns 1 if OP is either a SYMBOL_REF or a constant.

(define_predicate "symbolic_operand"
  (match_code "symbol_ref,const_int")
{
  enum rtx_code c = GET_CODE (op);

  if (c == CONST)
    {
      /* Allow (const:SI (plus:SI (symbol_ref) (const_int))).  */
      return GET_MODE (op) == SImode
	&& GET_CODE (XEXP (op, 0)) == PLUS
	&& GET_CODE (XEXP (XEXP (op, 0), 0)) == SYMBOL_REF
	&& GET_CODE (XEXP (XEXP (op, 0), 1)) == CONST_INT;
    }

  return c == SYMBOL_REF || c == CONST_INT;
})

;; Return true if operator is a kind of relational operator.

(define_predicate "relational_operator"
  (match_code "eq,ne,le,lt,ge,gt,leu,ltu,geu,gtu")
{
  return (integer_relational_operator (op, mode)
	  || float_relational_operator (op, mode));
})

;; Return true if OP is a relational operator suitable for CCmode,
;; CC_UNSmode or CC_NZmode.

(define_predicate "integer_relational_operator"
  (match_code "eq,ne,le,lt,ge,gt,leu,ltu,geu,gtu")
{
  if (mode != VOIDmode && mode != GET_MODE (op))
    return FALSE;

  /* The allowable relations depend on the mode of the ICC register.  */
  switch (GET_CODE (op))
    {
    default:
      return FALSE;

    case EQ:
    case NE:
    case LT:
    case GE:
      return (GET_MODE (XEXP (op, 0)) == CC_NZmode
	      || GET_MODE (XEXP (op, 0)) == CCmode);

    case LE:
    case GT:
      return GET_MODE (XEXP (op, 0)) == CCmode;

    case GTU:
    case GEU:
    case LTU:
    case LEU:
      return (GET_MODE (XEXP (op, 0)) == CC_NZmode
	      || GET_MODE (XEXP (op, 0)) == CC_UNSmode);
    }
})

;; Return true if operator is a floating point relational operator.

(define_predicate "float_relational_operator"
  (match_code "eq,ne,le,lt,ge,gt")
{
  if (mode != VOIDmode && mode != GET_MODE (op))
    return FALSE;

  switch (GET_CODE (op))
    {
    default:
      return FALSE;

    case EQ: case NE:
    case LE: case LT:
    case GE: case GT:
#if 0
    case UEQ: case UNE:
    case ULE: case ULT:
    case UGE: case UGT:
    case ORDERED:
    case UNORDERED:
#endif
      return GET_MODE (XEXP (op, 0)) == CC_FPmode;
    }
})

;; Return true if operator is EQ/NE of a conditional execution
;; register.

(define_predicate "ccr_eqne_operator"
  (match_code "eq,ne")
{
  enum machine_mode op_mode = GET_MODE (op);
  rtx op0;
  rtx op1;
  int regno;

  if (mode != VOIDmode && op_mode != mode)
    return FALSE;

  switch (GET_CODE (op))
    {
    default:
      return FALSE;

    case EQ:
    case NE:
      break;
    }

  op1 = XEXP (op, 1);
  if (op1 != const0_rtx)
    return FALSE;

  op0 = XEXP (op, 0);
  if (GET_CODE (op0) != REG)
    return FALSE;

  regno = REGNO (op0);
  if (op_mode == CC_CCRmode && CR_OR_PSEUDO_P (regno))
    return TRUE;

  return FALSE;
})

;; Return true if operator is a minimum or maximum operator (both
;; signed and unsigned).

(define_predicate "minmax_operator"
  (match_code "smin,smax,umin,umax")
{
  if (mode != VOIDmode && mode != GET_MODE (op))
    return FALSE;

  switch (GET_CODE (op))
    {
    default:
      return FALSE;

    case SMIN:
    case SMAX:
    case UMIN:
    case UMAX:
      break;
    }

  if (! integer_register_operand (XEXP (op, 0), mode))
    return FALSE;

  if (! gpr_or_int10_operand (XEXP (op, 1), mode))
    return FALSE;

  return TRUE;
})

;; Return true if operator is an integer binary operator that can
;; executed conditionally and takes 1 cycle.

(define_predicate "condexec_si_binary_operator"
  (match_code "plus,minus,and,ior,xor,ashift,ashiftrt,lshiftrt")
{
  enum machine_mode op_mode = GET_MODE (op);

  if (mode != VOIDmode && op_mode != mode)
    return FALSE;

  switch (GET_CODE (op))
    {
    default:
      return FALSE;

    case PLUS:
    case MINUS:
    case AND:
    case IOR:
    case XOR:
    case ASHIFT:
    case ASHIFTRT:
    case LSHIFTRT:
      return TRUE;
    }
})

;; Return true if operator is an integer binary operator that can be
;; executed conditionally by a media instruction.

(define_predicate "condexec_si_media_operator"
  (match_code "and,ior,xor")
{
  enum machine_mode op_mode = GET_MODE (op);

  if (mode != VOIDmode && op_mode != mode)
    return FALSE;

  switch (GET_CODE (op))
    {
    default:
      return FALSE;

    case AND:
    case IOR:
    case XOR:
      return TRUE;
    }
})

;; Return true if operator is an integer division operator that can
;; executed conditionally.

(define_predicate "condexec_si_divide_operator"
  (match_code "div,udiv")
{
  enum machine_mode op_mode = GET_MODE (op);

  if (mode != VOIDmode && op_mode != mode)
    return FALSE;

  switch (GET_CODE (op))
    {
    default:
      return FALSE;

    case DIV:
    case UDIV:
      return TRUE;
    }
})

;; Return true if operator is an integer unary operator that can
;; executed conditionally.

(define_predicate "condexec_si_unary_operator"
  (match_code "not,neg")
{
  enum machine_mode op_mode = GET_MODE (op);

  if (mode != VOIDmode && op_mode != mode)
    return FALSE;

  switch (GET_CODE (op))
    {
    default:
      return FALSE;

    case NEG:
    case NOT:
      return TRUE;
    }
})

;; Return true if operator is an addition or subtraction
;; expression. Such expressions can be evaluated conditionally by
;; floating-point instructions.

(define_predicate "condexec_sf_add_operator"
  (match_code "plus,minus")
{
  enum machine_mode op_mode = GET_MODE (op);

  if (mode != VOIDmode && op_mode != mode)
    return FALSE;

  switch (GET_CODE (op))
    {
    default:
      return FALSE;

    case PLUS:
    case MINUS:
      return TRUE;
    }
})

;; Return true if operator is a conversion-type expression that can be
;; evaluated conditionally by floating-point instructions.

(define_predicate "condexec_sf_conv_operator"
  (match_code "abs,neg")
{
  enum machine_mode op_mode = GET_MODE (op);

  if (mode != VOIDmode && op_mode != mode)
    return FALSE;

  switch (GET_CODE (op))
    {
    default:
      return FALSE;

    case NEG:
    case ABS:
      return TRUE;
    }
})

;; Return true if OP is an integer binary operator that can be
;; combined with a (set ... (compare:CC_NZ ...)) pattern.

(define_predicate "intop_compare_operator"
  (match_code "plus,minus,and,ior,xor,ashift,ashiftrt,lshiftrt")
{
  if (mode != VOIDmode && GET_MODE (op) != mode)
    return FALSE;

  switch (GET_CODE (op))
    {
    default:
      return FALSE;

    case PLUS:
    case MINUS:
    case AND:
    case IOR:
    case XOR:
    case ASHIFTRT:
    case LSHIFTRT:
      return GET_MODE (op) == SImode;
    }
})

;; Return 1 if operand is a register or 6 bit signed immediate.

(define_predicate "fpr_or_int6_operand"
  (match_code "reg,subreg,const_int")
{
  if (GET_CODE (op) == CONST_INT)
    return IN_RANGE_P (INTVAL (op), -32, 31);

  if (GET_MODE (op) != mode && mode != VOIDmode)
    return FALSE;

  if (GET_CODE (op) == SUBREG)
    {
      if (GET_CODE (SUBREG_REG (op)) != REG)
	return register_operand (op, mode);

      op = SUBREG_REG (op);
    }

  if (GET_CODE (op) != REG)
    return FALSE;

  return FPR_OR_PSEUDO_P (REGNO (op));
})

;; Return 1 if operand is a 6 bit signed immediate.

(define_predicate "int6_operand"
  (match_code "const_int")
{
  if (GET_CODE (op) != CONST_INT)
    return FALSE;

  return IN_RANGE_P (INTVAL (op), -32, 31);
})

;; Return 1 if operand is a 5 bit signed immediate.

(define_predicate "int5_operand"
  (match_code "const_int")
{
  return GET_CODE (op) == CONST_INT && IN_RANGE_P (INTVAL (op), -16, 15);
})

;; Return 1 if operand is a 5 bit unsigned immediate.

(define_predicate "uint5_operand"
  (match_code "const_int")
{
  return GET_CODE (op) == CONST_INT && IN_RANGE_P (INTVAL (op), 0, 31);
})

;; Return 1 if operand is a 4 bit unsigned immediate.

(define_predicate "uint4_operand"
  (match_code "const_int")
{
  return GET_CODE (op) == CONST_INT && IN_RANGE_P (INTVAL (op), 0, 15);
})

;; Return 1 if operand is a 1 bit unsigned immediate (0 or 1).

(define_predicate "uint1_operand"
  (match_code "const_int")
{
  return GET_CODE (op) == CONST_INT && IN_RANGE_P (INTVAL (op), 0, 1);
})

;; Return 1 if operand is a valid ACC register number.

(define_predicate "acc_operand"
  (match_code "reg,subreg")
{
  return ((mode == VOIDmode || mode == GET_MODE (op))
	  && REG_P (op) && ACC_P (REGNO (op))
	  && ((REGNO (op) - ACC_FIRST) & ~ACC_MASK) == 0);
})

;; Return 1 if operand is a valid even ACC register number.

(define_predicate "even_acc_operand"
  (match_code "reg,subreg")
{
  return acc_operand (op, mode) && ((REGNO (op) - ACC_FIRST) & 1) == 0;
})

;; Return 1 if operand is zero or four.

(define_predicate "quad_acc_operand"
  (match_code "reg,subreg")
{
  return acc_operand (op, mode) && ((REGNO (op) - ACC_FIRST) & 3) == 0;
})

;; Return 1 if operand is a valid ACCG register number.

(define_predicate "accg_operand"
  (match_code "reg,subreg")
{
  return ((mode == VOIDmode || mode == GET_MODE (op))
	  && REG_P (op) && ACCG_P (REGNO (op))
	  && ((REGNO (op) - ACCG_FIRST) & ~ACC_MASK) == 0);
})