predicates.md

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	return FALSE;
      
      return (flag_pic == 0);

    case CONST:
      if (flag_pic || TARGET_FDPIC)
	return FALSE;

      op = XEXP (op, 0);
      if (GET_CODE (op) == PLUS && GET_CODE (XEXP (op, 1)) == CONST_INT)
	op = XEXP (op, 0);
      return GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF;

    case SYMBOL_REF:
      if (TARGET_FDPIC)
	return FALSE;
      
      /* small data references are already 1 word */
      return (flag_pic == 0) && (! SYMBOL_REF_SMALL_P (op));

    case CONST_INT:
      return ! IN_RANGE_P (INTVAL (op), -32768, 32767);

    case CONST_DOUBLE:
      if (GET_MODE (op) == SFmode)
	{
	  REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
	  REAL_VALUE_TO_TARGET_SINGLE (rv, l);
	  value = l;
	  return ! IN_RANGE_P (value, -32768, 32767);
	}
      else if (GET_MODE (op) == VOIDmode)
	{
	  value = CONST_DOUBLE_LOW (op);
	  return ! IN_RANGE_P (value, -32768, 32767);
	}
      break;
    }

  return FALSE;
})

;; Return true if operand is the uClinux PIC register.

(define_predicate "fdpic_operand"
  (match_code "reg")
{
  if (!TARGET_FDPIC)
    return FALSE;

  if (GET_CODE (op) != REG)
    return FALSE;

  if (GET_MODE (op) != mode && mode != VOIDmode)
    return FALSE;

  if (REGNO (op) != FDPIC_REGNO && REGNO (op) < FIRST_PSEUDO_REGISTER)
    return FALSE;

  return TRUE;
})

;; TODO: Add a comment here.

(define_predicate "fdpic_fptr_operand"
  (match_code "reg")
{
  if (GET_MODE (op) != mode && mode != VOIDmode)
    return FALSE;
  if (GET_CODE (op) != REG)
    return FALSE;
  if (REGNO (op) != FDPIC_FPTR_REGNO && REGNO (op) < FIRST_PSEUDO_REGISTER)
    return FALSE;
  return TRUE;
})

;; An address operand that may use a pair of registers, an addressing
;; mode that we reject in general.

(define_predicate "ldd_address_operand"
  (match_code "reg,subreg,plus")
{
  if (GET_MODE (op) != mode && GET_MODE (op) != VOIDmode)
    return FALSE;

  return frv_legitimate_address_p (DImode, op, reload_completed, FALSE, TRUE);
})

;; TODO: Add a comment here.

(define_predicate "got12_operand"
  (match_code "const")
{
  struct frv_unspec unspec;

  if (frv_const_unspec_p (op, &unspec))
    switch (unspec.reloc)
      {
      case R_FRV_GOT12:
      case R_FRV_GOTOFF12:
      case R_FRV_FUNCDESC_GOT12:
      case R_FRV_FUNCDESC_GOTOFF12:
      case R_FRV_GPREL12:
      case R_FRV_TLSMOFF12:
	return true;
      }
  return false;
})

;; Return true if OP is a valid const-unspec expression.

(define_predicate "const_unspec_operand"
  (match_code "const")
{
  struct frv_unspec unspec;

  return frv_const_unspec_p (op, &unspec);
})

;; Return true if operand is an icc register.

(define_predicate "icc_operand"
  (match_code "reg")
{
  int regno;

  if (GET_MODE (op) != mode && mode != VOIDmode)
    return FALSE;

  if (GET_CODE (op) != REG)
    return FALSE;

  regno = REGNO (op);
  return ICC_OR_PSEUDO_P (regno);
})

;; Return true if operand is an fcc register.

(define_predicate "fcc_operand"
  (match_code "reg")
{
  int regno;

  if (GET_MODE (op) != mode && mode != VOIDmode)
    return FALSE;

  if (GET_CODE (op) != REG)
    return FALSE;

  regno = REGNO (op);
  return FCC_OR_PSEUDO_P (regno);
})

;; Return true if operand is either an fcc or icc register.

(define_predicate "cc_operand"
  (match_code "reg")
{
  int regno;

  if (GET_MODE (op) != mode && mode != VOIDmode)
    return FALSE;

  if (GET_CODE (op) != REG)
    return FALSE;

  regno = REGNO (op);
  if (CC_OR_PSEUDO_P (regno))
    return TRUE;

  return FALSE;
})

;; Return true if operand is an integer CCR register.

(define_predicate "icr_operand"
  (match_code "reg")
{
  int regno;

  if (GET_MODE (op) != mode && mode != VOIDmode)
    return FALSE;

  if (GET_CODE (op) != REG)
    return FALSE;

  regno = REGNO (op);
  return ICR_OR_PSEUDO_P (regno);
})

;; Return true if operand is an fcc register.

(define_predicate "fcr_operand"
  (match_code "reg")
{
  int regno;

  if (GET_MODE (op) != mode && mode != VOIDmode)
    return FALSE;

  if (GET_CODE (op) != REG)
    return FALSE;

  regno = REGNO (op);
  return FCR_OR_PSEUDO_P (regno);
})

;; Return true if operand is either an fcc or icc register.

(define_predicate "cr_operand"
  (match_code "reg")
{
  int regno;

  if (GET_MODE (op) != mode && mode != VOIDmode)
    return FALSE;

  if (GET_CODE (op) != REG)
    return FALSE;

  regno = REGNO (op);
  if (CR_OR_PSEUDO_P (regno))
    return TRUE;

  return FALSE;
})

;; Return true if operand is a FPR register.

(define_predicate "fpr_operand"
  (match_code "reg,subreg")
{
  if (GET_MODE (op) != mode && mode != VOIDmode)
    return FALSE;

  if (GET_CODE (op) == SUBREG)
    {
      if (GET_CODE (SUBREG_REG (op)) != REG)
        return register_operand (op, mode);

      op = SUBREG_REG (op);
    }

  if (GET_CODE (op) != REG)
    return FALSE;

  return FPR_OR_PSEUDO_P (REGNO (op));
})

;; Return true if operand is an even GPR or FPR register.

(define_predicate "even_reg_operand"
  (match_code "reg,subreg")
{
  int regno;

  if (GET_MODE (op) != mode && mode != VOIDmode)
    return FALSE;

  if (GET_CODE (op) == SUBREG)
    {
      if (GET_CODE (SUBREG_REG (op)) != REG)
        return register_operand (op, mode);

      op = SUBREG_REG (op);
    }

  if (GET_CODE (op) != REG)
    return FALSE;

  regno = REGNO (op);
  if (regno >= FIRST_PSEUDO_REGISTER)
    return TRUE;

  if (GPR_P (regno))
    return (((regno - GPR_FIRST) & 1) == 0);

  if (FPR_P (regno))
    return (((regno - FPR_FIRST) & 1) == 0);

  return FALSE;
})

;; Return true if operand is an odd GPR register.

(define_predicate "odd_reg_operand"
  (match_code "reg,subreg")
{
  int regno;

  if (GET_MODE (op) != mode && mode != VOIDmode)
    return FALSE;

  if (GET_CODE (op) == SUBREG)
    {
      if (GET_CODE (SUBREG_REG (op)) != REG)
        return register_operand (op, mode);

      op = SUBREG_REG (op);
    }

  if (GET_CODE (op) != REG)
    return FALSE;

  regno = REGNO (op);
  /* Assume that reload will give us an even register.  */
  if (regno >= FIRST_PSEUDO_REGISTER)
    return FALSE;

  if (GPR_P (regno))
    return (((regno - GPR_FIRST) & 1) != 0);

  if (FPR_P (regno))
    return (((regno - FPR_FIRST) & 1) != 0);

  return FALSE;
})

;; Return true if operand is an even GPR register.

(define_predicate "even_gpr_operand"
  (match_code "reg,subreg")
{
  int regno;

  if (GET_MODE (op) != mode && mode != VOIDmode)
    return FALSE;

  if (GET_CODE (op) == SUBREG)
    {
      if (GET_CODE (SUBREG_REG (op)) != REG)
        return register_operand (op, mode);

      op = SUBREG_REG (op);
    }

  if (GET_CODE (op) != REG)
    return FALSE;

  regno = REGNO (op);
  if (regno >= FIRST_PSEUDO_REGISTER)
    return TRUE;

  if (! GPR_P (regno))
    return FALSE;

  return (((regno - GPR_FIRST) & 1) == 0);
})

;; Return true if operand is an odd GPR register.

(define_predicate "odd_gpr_operand"
  (match_code "reg,subreg")
{
  int regno;

  if (GET_MODE (op) != mode && mode != VOIDmode)
    return FALSE;

  if (GET_CODE (op) == SUBREG)
    {
      if (GET_CODE (SUBREG_REG (op)) != REG)
        return register_operand (op, mode);

      op = SUBREG_REG (op);
    }

  if (GET_CODE (op) != REG)
    return FALSE;

  regno = REGNO (op);
  /* Assume that reload will give us an even register.  */
  if (regno >= FIRST_PSEUDO_REGISTER)
    return FALSE;

  if (! GPR_P (regno))
    return FALSE;

  return (((regno - GPR_FIRST) & 1) != 0);
})

;; Return true if operand is a quad aligned FPR register.

(define_predicate "quad_fpr_operand"
  (match_code "reg,subreg")
{
  int regno;

  if (GET_MODE (op) != mode && mode != VOIDmode)
    return FALSE;

  if (GET_CODE (op) == SUBREG)
    {
      if (GET_CODE (SUBREG_REG (op)) != REG)
        return register_operand (op, mode);

      op = SUBREG_REG (op);
    }

  if (GET_CODE (op) != REG)
    return FALSE;

  regno = REGNO (op);
  if (regno >= FIRST_PSEUDO_REGISTER)
    return TRUE;

  if (! FPR_P (regno))
    return FALSE;

  return (((regno - FPR_FIRST) & 3) == 0);
})

;; Return true if operand is an even FPR register.

(define_predicate "even_fpr_operand"
  (match_code "reg,subreg")
{
  int regno;

  if (GET_MODE (op) != mode && mode != VOIDmode)
    return FALSE;

  if (GET_CODE (op) == SUBREG)
    {
      if (GET_CODE (SUBREG_REG (op)) != REG)
        return register_operand (op, mode);

      op = SUBREG_REG (op);
    }

  if (GET_CODE (op) != REG)
    return FALSE;

  regno = REGNO (op);
  if (regno >= FIRST_PSEUDO_REGISTER)
    return TRUE;

  if (! FPR_P (regno))
    return FALSE;

  return (((regno - FPR_FIRST) & 1) == 0);
})

;; Return true if operand is an odd FPR register.

(define_predicate "odd_fpr_operand"
  (match_code "reg,subreg")
{
  int regno;

  if (GET_MODE (op) != mode && mode != VOIDmode)
    return FALSE;

  if (GET_CODE (op) == SUBREG)
    {
      if (GET_CODE (SUBREG_REG (op)) != REG)
        return register_operand (op, mode);

      op = SUBREG_REG (op);
    }

  if (GET_CODE (op) != REG)
    return FALSE;

  regno = REGNO (op);
  /* Assume that reload will give us an even register.  */
  if (regno >= FIRST_PSEUDO_REGISTER)
    return FALSE;

  if (! FPR_P (regno))
    return FALSE;

  return (((regno - FPR_FIRST) & 1) != 0);
})

;; Return true if operand is a 2 word memory address that can be
;; loaded in one instruction to load or store.  We assume the stack
;; and frame pointers are suitably aligned, and variables in the small
;; data area.  FIXME -- at some we should recognize other globals and
;; statics. We can't assume that any old pointer is aligned, given
;; that arguments could be passed on an odd word on the stack and the
;; address taken and passed through to another function.

(define_predicate "dbl_memory_one_insn_operand"
  (match_code "mem")
{
  rtx addr;
  rtx addr_reg;

  if (! TARGET_DWORD)
    return FALSE;

  if (GET_CODE (op) != MEM)
    return FALSE;

  if (mode != VOIDmode && GET_MODE_SIZE (mode) != 2*UNITS_PER_WORD)
    return FALSE;

  addr = XEXP (op, 0);
  if (GET_CODE (addr) == REG)
    addr_reg = addr;

  else if (GET_CODE (addr) == PLUS)
    {
      rtx addr0 = XEXP (addr, 0);
      rtx addr1 = XEXP (addr, 1);

      if (GET_CODE (addr0) != REG)
	return FALSE;

      if (got12_operand (addr1, VOIDmode))
	return TRUE;

      if (GET_CODE (addr1) != CONST_INT)
	return FALSE;

      if ((INTVAL (addr1) & 7) != 0)