s390.md

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;;- Machine description for GNU compiler -- S/390 / zSeries version.
;;  Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
;;  Free Software Foundation, Inc.
;;  Contributed by Hartmut Penner ([e-mail]) and
;;                 Ulrich Weigand ([e-mail]).

;; This file is part of GCC.

;; GCC is free software; you can redistribute it and/or modify it under
;; the terms of the GNU General Public License as published by the Free
;; Software Foundation; either version 2, or (at your option) any later
;; version.

;; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
;; WARRANTY; without even the implied warranty of MERCHANTABILITY or
;; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
;; for more details.

;; You should have received a copy of the GNU General Public License
;; along with GCC; see the file COPYING.  If not, write to the Free
;; Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
;; 02110-1301, USA.

;;
;; Special constraints for s/390 machine description:
;;
;;    a -- Any address register from 1 to 15.
;;    c -- Condition code register 33.
;;    d -- Any register from 0 to 15.
;;    f -- Floating point registers.
;;    t -- Access registers 36 and 37.
;;    G -- Const double zero operand
;;    I -- An 8-bit constant (0..255).
;;    J -- A 12-bit constant (0..4095).
;;    K -- A 16-bit constant (-32768..32767).
;;    L -- Value appropriate as displacement.
;;         (0..4095) for short displacement
;;         (-524288..524287) for long displacement
;;    M -- Constant integer with a value of 0x7fffffff.
;;    N -- Multiple letter constraint followed by 4 parameter letters.
;;         0..9,x:  number of the part counting from most to least significant
;;         H,Q:     mode of the part
;;         D,S,H:   mode of the containing operand
;;         0,F:     value of the other parts (F - all bits set)
;;
;;         The constraint matches if the specified part of a constant
;;         has a value different from its other parts.  If the letter x
;;         is specified instead of a part number, the constraint matches
;;         if there is any single part with non-default value.
;;    O -- Multiple letter constraint followed by 1 parameter.
;;         s:  Signed extended immediate value (-2G .. 2G-1).
;;         p:  Positive extended immediate value (0 .. 4G-1).
;;         n:  Negative extended immediate value (-4G .. -1).
;;         These constraints do not accept any operand if the machine does
;;         not provide the extended-immediate facility.
;;    P -- Any integer constant that can be loaded without literal pool.
;;    Q -- Memory reference without index register and with short displacement.
;;    R -- Memory reference with index register and short displacement.
;;    S -- Memory reference without index register but with long displacement.
;;    T -- Memory reference with index register and long displacement.
;;    A -- Multiple letter constraint followed by Q, R, S, or T:
;;         Offsettable memory reference of type specified by second letter.
;;    B -- Multiple letter constraint followed by Q, R, S, or T:
;;         Memory reference of the type specified by second letter that
;;         does *not* refer to a literal pool entry.
;;    U -- Pointer with short displacement.
;;    W -- Pointer with long displacement.
;;    Y -- Shift count operand.
;;
;; Special formats used for outputting 390 instructions.
;;
;;     %C: print opcode suffix for branch condition.
;;     %D: print opcode suffix for inverse branch condition.
;;     %J: print tls_load/tls_gdcall/tls_ldcall suffix
;;     %G: print the size of the operand in bytes.
;;     %O: print only the displacement of a memory reference.
;;     %R: print only the base register of a memory reference.
;;     %S: print S-type memory reference (base+displacement).
;;     %N: print the second word of a DImode operand.
;;     %M: print the second word of a TImode operand.
;;     %Y: print shift count operand.
;;  
;;     %b: print integer X as if it's an unsigned byte.
;;     %x: print integer X as if it's an unsigned halfword.
;;     %h: print integer X as if it's a signed halfword.
;;     %i: print the first nonzero HImode part of X.
;;     %j: print the first HImode part unequal to -1 of X.
;;     %k: print the first nonzero SImode part of X.
;;     %m: print the first SImode part unequal to -1 of X.
;;     %o: print integer X as if it's an unsigned 32bit word.
;;
;; We have a special constraint for pattern matching.
;;
;;   s_operand -- Matches a valid S operand in a RS, SI or SS type instruction.
;;

;;
;; UNSPEC usage
;;

(define_constants
  [; Miscellaneous
   (UNSPEC_ROUND		1)
   (UNSPEC_CMPINT		2)
   (UNSPEC_ICM			10)

   ; GOT/PLT and lt-relative accesses
   (UNSPEC_LTREL_OFFSET		100)
   (UNSPEC_LTREL_BASE		101)
   (UNSPEC_GOTENT		110)
   (UNSPEC_GOT			111)
   (UNSPEC_GOTOFF		112)
   (UNSPEC_PLT			113)
   (UNSPEC_PLTOFF		114)

   ; Literal pool
   (UNSPEC_RELOAD_BASE		210)
   (UNSPEC_MAIN_BASE		211)
   (UNSPEC_LTREF		212)
   (UNSPEC_INSN			213)
   (UNSPEC_EXECUTE		214)

   ; TLS relocation specifiers
   (UNSPEC_TLSGD		500)
   (UNSPEC_TLSLDM		501)
   (UNSPEC_NTPOFF               502)
   (UNSPEC_DTPOFF               503)
   (UNSPEC_GOTNTPOFF            504)
   (UNSPEC_INDNTPOFF            505)

   ; TLS support
   (UNSPEC_TLSLDM_NTPOFF	511)
   (UNSPEC_TLS_LOAD		512)

   ; String Functions
   (UNSPEC_SRST			600)
   (UNSPEC_MVST			601)
   
   ; Stack Smashing Protector
   (UNSPEC_SP_SET 		700)
   (UNSPEC_SP_TEST		701)
 ])

;;
;; UNSPEC_VOLATILE usage
;;

(define_constants
  [; Blockage
   (UNSPECV_BLOCKAGE		0)

   ; TPF Support
   (UNSPECV_TPF_PROLOGUE        20)
   (UNSPECV_TPF_EPILOGUE        21)

   ; Literal pool
   (UNSPECV_POOL		200)
   (UNSPECV_POOL_SECTION	201)
   (UNSPECV_POOL_ALIGN		202)
   (UNSPECV_POOL_ENTRY		203)
   (UNSPECV_MAIN_POOL		300)

   ; TLS support
   (UNSPECV_SET_TP		500)

   ; Atomic Support
   (UNSPECV_MB			700)
   (UNSPECV_CAS			701)
  ])

;;
;; Registers
;;

(define_constants
  [
   ; Sibling call register.
   (SIBCALL_REGNUM		 1)
   ; Literal pool base register.
   (BASE_REGNUM			13)
   ; Return address register.
   (RETURN_REGNUM		14)
   ; Condition code register.
   (CC_REGNUM			33)
   ; Thread local storage pointer register. 
   (TP_REGNUM			36)
  ])


;; Instruction operand type as used in the Principles of Operation.
;; Used to determine defaults for length and other attribute values.

(define_attr "op_type"
  "NN,E,RR,RRE,RX,RS,RSI,RI,SI,S,SS,SSE,RXE,RSE,RIL,RIE,RXY,RSY,SIY"
  (const_string "NN"))

;; Instruction type attribute used for scheduling.

(define_attr "type" "none,integer,load,lr,la,larl,lm,stm,
	             cs,vs,store,sem,idiv,
                     imulhi,imulsi,imuldi,
		     branch,jsr,fsimptf,fsimpdf,fsimpsf,
		     floadtf,floaddf,floadsf,fstoredf,fstoresf,
		     fmultf,fmuldf,fmulsf,fdivtf,fdivdf,fdivsf,
		     ftoi,itof,fsqrttf,fsqrtdf,fsqrtsf,
                     ftrunctf,ftruncdf,other"
  (cond [(eq_attr "op_type" "NN")  (const_string "other")
         (eq_attr "op_type" "SS")  (const_string "cs")]
    (const_string "integer")))

;; Another attribute used for scheduling purposes:
;;   agen: Instruction uses the address generation unit
;;   reg: Instruction does not use the agen unit

(define_attr "atype" "agen,reg"
  (cond [(eq_attr "op_type" "E")   (const_string "reg")
         (eq_attr "op_type" "RR")  (const_string "reg")
         (eq_attr "op_type" "RX")  (const_string "agen")
         (eq_attr "op_type" "RI")  (const_string "reg")
         (eq_attr "op_type" "RRE") (const_string "reg")
         (eq_attr "op_type" "RS")  (const_string "agen")
         (eq_attr "op_type" "RSI") (const_string "agen")
         (eq_attr "op_type" "S")   (const_string "agen")
         (eq_attr "op_type" "SI")  (const_string "agen")
         (eq_attr "op_type" "SS")  (const_string "agen")
         (eq_attr "op_type" "SSE") (const_string "agen")
         (eq_attr "op_type" "RXE") (const_string "agen")
         (eq_attr "op_type" "RSE") (const_string "agen")
         (eq_attr "op_type" "RIL") (const_string "agen")
         (eq_attr "op_type" "RXY") (const_string "agen")
         (eq_attr "op_type" "RSY") (const_string "agen")
         (eq_attr "op_type" "SIY") (const_string "agen")]
    (const_string "agen")))

;; Length in bytes.

(define_attr "length" ""
  (cond [(eq_attr "op_type" "E")   (const_int 2)
         (eq_attr "op_type" "RR")  (const_int 2)
         (eq_attr "op_type" "RX")  (const_int 4)
         (eq_attr "op_type" "RI")  (const_int 4)
         (eq_attr "op_type" "RRE") (const_int 4)
         (eq_attr "op_type" "RS")  (const_int 4)
         (eq_attr "op_type" "RSI") (const_int 4)
         (eq_attr "op_type" "S")   (const_int 4)
         (eq_attr "op_type" "SI")  (const_int 4)
         (eq_attr "op_type" "SS")  (const_int 6)
         (eq_attr "op_type" "SSE") (const_int 6)
         (eq_attr "op_type" "RXE") (const_int 6)
         (eq_attr "op_type" "RSE") (const_int 6)
         (eq_attr "op_type" "RIL") (const_int 6)
         (eq_attr "op_type" "RXY") (const_int 6)
         (eq_attr "op_type" "RSY") (const_int 6)
         (eq_attr "op_type" "SIY") (const_int 6)]
    (const_int 6)))


;; Processor type.  This attribute must exactly match the processor_type
;; enumeration in s390.h.  The current machine description does not
;; distinguish between g5 and g6, but there are differences between the two
;; CPUs could in theory be modeled.

(define_attr "cpu" "g5,g6,z900,z990,z9_109"
  (const (symbol_ref "s390_tune")))

;; Pipeline description for z900.  For lack of anything better,
;; this description is also used for the g5 and g6.
(include "2064.md")

;; Pipeline description for z990. 
(include "2084.md")

;; Predicates
(include "predicates.md")

;; Other includes
(include "tpf.md")

;; Macros

;; This mode macro allows floating point patterns to be generated from the
;; same template.
(define_mode_macro FPR [TF DF SF])
(define_mode_macro DSF [DF SF])

;; These mode macros allow 31-bit and 64-bit TDSI patterns to be generated
;; from the same template.
(define_mode_macro TDSI [(TI "TARGET_64BIT") DI SI])

;; These mode macros allow 31-bit and 64-bit GPR patterns to be generated
;; from the same template.
(define_mode_macro GPR [(DI "TARGET_64BIT") SI])
(define_mode_macro DSI [DI SI])

;; This mode macro allows :P to be used for patterns that operate on
;; pointer-sized quantities.  Exactly one of the two alternatives will match.
(define_mode_macro DP  [(TI "TARGET_64BIT") (DI "!TARGET_64BIT")])
(define_mode_macro P [(DI "TARGET_64BIT") (SI "!TARGET_64BIT")])

;; This mode macro allows the QI and HI patterns to be defined from
;; the same template.
(define_mode_macro HQI [HI QI])

;; This mode macro allows the integer patterns to be defined from the
;; same template.
(define_mode_macro INT [(DI "TARGET_64BIT") SI HI QI])

;; This macro allows to unify all 'bCOND' expander patterns.
(define_code_macro COMPARE [eq ne gt gtu lt ltu ge geu le leu unordered 
		            ordered uneq unlt ungt unle unge ltgt])

;; This macro allows to unify all 'sCOND' patterns.
(define_code_macro SCOND [ltu gtu leu geu])

;; This macro allows some 'ashift' and 'lshiftrt' pattern to be defined from
;; the same template.
(define_code_macro SHIFT [ashift lshiftrt])

;; These macros allow to combine most atomic operations.
(define_code_macro ATOMIC [and ior xor plus minus mult])
(define_code_attr atomic [(and "and") (ior "ior") (xor "xor") 
			  (plus "add") (minus "sub") (mult "nand")])


;; In FPR templates, a string like "lt<de>br" will expand to "ltxbr" in TFmode,
;; "ltdbr" in DFmode, and "ltebr" in SFmode.
(define_mode_attr xde [(TF "x") (DF "d") (SF "e")])

;; In FPR templates, a string like "m<dee>br" will expand to "mxbr" in TFmode,
;; "mdbr" in DFmode, and "meebr" in SFmode.
(define_mode_attr xdee [(TF "x") (DF "d") (SF "ee")])

;; In FPR templates, "<RRe>" will expand to "RRE" in TFmode and "RR" otherwise.
;; Likewise for "<RXe>".
(define_mode_attr RRe [(TF "RRE") (DF "RR") (SF "RR")])
(define_mode_attr RXe [(TF "RXE") (DF "RX") (SF "RX")])

;; In FPR templates, "<Rf>" will expand to "f" in TFmode and "R" otherwise.
;; This is used to disable the memory alternative in TFmode patterns.
(define_mode_attr Rf [(TF "f") (DF "R") (SF "R")])

;; In SHIFT templates, a string like "s<lr>dl" will expand to "sldl" in 
;; 'ashift' and "srdl" in 'lshiftrt'.
(define_code_attr lr [(ashift "l") (lshiftrt "r")])

;; In SHIFT templates, this attribute holds the correct standard name for the
;; pattern itself and the corresponding function calls. 
(define_code_attr shift [(ashift "ashl") (lshiftrt "lshr")])

;; This attribute handles differences in the instruction 'type' and will result
;; in "RRE" for DImode and "RR" for SImode.
(define_mode_attr E [(DI "E") (SI "")])

;; This attribute handles differences in the instruction 'type' and will result
;; in "RSE" for TImode and "RS" for DImode.
(define_mode_attr TE [(TI "E") (DI "")])

;; In GPR templates, a string like "lc<g>r" will expand to "lcgr" in DImode
;; and "lcr" in SImode.
(define_mode_attr g [(DI "g") (SI "")])

;; In DP templates, a string like "cds<g>" will expand to "cdsg" in TImode
;; and "cds" in DImode.
(define_mode_attr tg [(TI "g") (DI "")])

;; In GPR templates, a string like "c<gf>dbr" will expand to "cgdbr" in DImode
;; and "cfdbr" in SImode.
(define_mode_attr gf [(DI "g") (SI "f")])

;; ICM mask required to load MODE value into the lowest subreg
;; of a SImode register.
(define_mode_attr icm_lo [(HI "3") (QI "1")])

;; In HQI templates, a string like "llg<hc>" will expand to "llgh" in
;; HImode and "llgc" in QImode.
(define_mode_attr hc [(HI "h") (QI "c")])

;; In P templates, the mode <DBL> will expand to "TI" in DImode and "DI"
;; in SImode.
(define_mode_attr DBL [(DI "TI") (SI "DI")])

;; Maximum unsigned integer that fits in MODE.
(define_mode_attr max_uint [(HI "65535") (QI "255")])


;;
;;- Compare instructions.
;;

(define_expand "cmp<mode>"
  [(set (reg:CC CC_REGNUM)
        (compare:CC (match_operand:GPR 0 "register_operand" "")
                    (match_operand:GPR 1 "general_operand" "")))]
  ""
{
  s390_compare_op0 = operands[0];
  s390_compare_op1 = operands[1];
  DONE;
})

(define_expand "cmp<mode>"
  [(set (reg:CC CC_REGNUM)
        (compare:CC (match_operand:FPR 0 "register_operand" "")
                    (match_operand:FPR 1 "general_operand" "")))]
  "TARGET_HARD_FLOAT"
{
  s390_compare_op0 = operands[0];
  s390_compare_op1 = operands[1];
  DONE;
})


; Test-under-Mask instructions

(define_insn "*tmqi_mem"
  [(set (reg CC_REGNUM)
        (compare (and:QI (match_operand:QI 0 "memory_operand" "Q,S")
                         (match_operand:QI 1 "immediate_operand" "n,n"))