cpu.h

VRTX操作系统

/*************************************************************************

	Copyright (c) 1999 Mentor Graphics Corporation.


IMPORTANT - USE OF THIS SOFTWARE IS SUBJECT TO LICENSE RESTRICTIONS
CAREFULLY READ THE LICENSE AGREEMENT BEFORE USING THE SOFTWARE


*************************************************************************/
/* Revisions of CPU.H: (latest revision on top, version is RCS version)
* 1.0  P.Cumming  14/03/96      ARM cpu added
*/

/* CPU library header file */

#ifndef CPU_H
#define CPU_H

#ifdef __cplusplus
extern "C" {
#endif

#include <ansiprot.h>
#include <target.h>

/* Reference a separate include file for most processor-specific declarations */

#if (defined(MC68000) || defined(MC68010) || defined(MC68020) || defined(MC68040)) && !defined(M68K)
#define M68K
#endif

/* include the cache/MMU defs */
#include <cpu_cm.h>

#ifdef M68K
#include <cpum68k.h>
#endif
#ifdef H85
#include <cpuh85.h>
#endif
#if defined(SUN3) || defined(SUN4)
#include <cpuunix.h>
#endif
#ifdef M88K
/*** should be #include <cpum88k.h> ***/
typedef int cpu_interrupt_t;
typedef int cpu_context_t;
#endif
#ifdef MIPS
/*** should be #include <cpumips.h> ***/
typedef int cpu_interrupt_t;
typedef int cpu_context_t;
#endif 

/*** ARM  ***/
#ifdef ARM
typedef int cpu_interrupt_t;
typedef int cpu_context_t; 
#endif


#if	(defined(I386) || defined(INTELx86))
#include <cpux86.h>
#endif
#if defined(SPARC) && !(defined(SUN4) || defined(SUN3))
#include <cpusparc.h>
#endif
#ifdef AMD29K
#include <cpuamd29k.h>
#endif
#if defined(I960)
#include <cpui960.h>
#endif
#if defined(PPC)
#include <cpuppc.h>
#endif

/* interrupt enable/disable */
#ifndef cpu_interrupt_disable
extern cpu_interrupt_t
    cpu_interrupt_disable(ANSIPROT0);
#endif
#ifndef cpu_interrupt_enable
extern cpu_interrupt_t
    cpu_interrupt_enable(ANSIPROT0);
#endif
#ifndef cpu_interrupt_restore
extern void
    cpu_interrupt_restore(ANSIPROT1(cpu_interrupt_t));
#endif
#ifndef cpu_interrupt_window
extern void
    cpu_interrupt_window(ANSIPROT1(cpu_interrupt_t));
#endif
#ifndef cpu_interrupt_is_disabled
extern int
    cpu_interrupt_is_disabled(ANSIPROT0);
#endif
#ifndef cpu_interrupt_is_enabled
extern int
    cpu_interrupt_is_enabled(ANSIPROT0);
#endif
#ifndef cpu_interrupt_is_enabled_in
extern int
    cpu_interrupt_is_enabled_in(ANSIPROT1(cpu_interrupt_t));
#endif
#ifndef cpu_interrupt_get_status
extern int
    cpu_interrupt_get_status(ANSIPROT0);
#endif
#ifndef cpu_interrupt_pause
extern void
    cpu_interrupt_pause(ANSIPROT0);
#endif

/* global variables */
extern target_t cpu_target;

/* get/set target processor type */
#ifndef cpu_get_target
#define cpu_get_target()	cpu_target
#endif
#define cpu_set_target(target)	cpu_target = (target)

/* initialize cpu library */
#ifndef cpu_init
#define cpu_init()		cpu_set_target(target_unspecified)
#endif

/* get trap table address */
#ifndef cpu_get_physical_vbr
extern void **cpu_get_physical_vbr(ANSIPROT0);
#endif

/* set trap base register */
#ifndef cpu_set_physical_vbr
extern void cpu_set_physical_vbr(ANSIPROT1(void **));
#endif

/* probe memory (byte,short,long) and return SUCCESS=0 or BUSERROR=1 */
typedef int cpu_memprobe_size_t;
#define CPU_MEMPROBE_BYTE	((cpu_memprobe_size_t)1)
#define CPU_MEMPROBE_SHORT	((cpu_memprobe_size_t)2)
#define CPU_MEMPROBE_LONG	((cpu_memprobe_size_t)4)

/* size defines actual size of void *addr and void *val */
extern int cpu_mem_probe(ANSIPROT3(void *addr, cpu_memprobe_size_t size,
				   void *val));

#ifdef _MCC386
typedef cpu_far_overlay_t cpu_context_ptr;
#else
typedef cpu_context_t FAR *cpu_context_ptr;
#endif

/* define target byte order */
#ifndef _CPU_LITTLE_ENDIAN_
#ifndef _CPU_BIG_ENDIAN_
#define _CPU_BIG_ENDIAN_	1
#endif
#endif

#ifdef __cplusplus
}
#endif

#endif /* !CPU_H */