c54x_reg.h

这是我编一个DSP的USP的程序 调试通过

//***************************************************
//*FILENAME:c54x_reg.h  						    *
//*This include file contains the initial values of *
//*C5409 configuration registers.	                *
//*BY:Xusheng           DATE:2002.9.7	            *	
//*Modified:            DATE:           		    *	
//***************************************************
                       

//Register Organization (00h)//--------------------------------------------------------------------------------------------------------------------------------------
//IMR:Interrupt mask register
//    Enable :bit value=1   
//    Disable:bit balue=0    
//--------------------------------------------------------------------------------------------------------------------
//|15 14 |  13 |  12 |     11     |      10    |  9 |  8 |      7     |      6     |   5  |   4  |  3 |  2 |  1 |  0 |
//--------------------------------------------------------------------------------------------------------------------
//| RES  |DMAC5|DMAC4|BXINT1/DMAC3|BRINT1/DMAC2|HINT|INT3|BXINT2/DMAC1|BRINT2/DMAC0|BXINT0|BRINT0|TINT|INT2|INT1|INT0|
//--------------------------------------------------------------------------------------------------------------------------------------

#define imr 		(volatile unsigned int*)0x0

#define DMAC5         	  13 
#define DMAC4             12
#define BXINT1_DMAC3      11
#define BRINT1_DMAC2      10
#define HINT          	  9
#define INT3          	  8
#define BXINT2_DMAC1      7
#define BRINT2_DMAC0      6
#define BXINT0         	  5
#define BRINT0         	  4
#define TINT           	  3
#define INT2          	  2
#define INT1          	  1
#define INT0          	  0
//--------------------------------------------------------------------------------------------------------------------------------------


//Register Organization (00h)//--------------------------------------------------------------------------------------------------------------------------------------
//ST1:State register 1
//    Enable :bit value=1   
//    Disable:bit balue=0    
//-----------------------------------------------------------------------------------------------------------
//|15 14 | 13 |  12 | 11 |      10    |  9 |  8 |      7     |      6     |   5  |   4  |  3 |  2 |  1 |  0 |
//-----------------------------------------------------------------------------------------------------------
//|      | XF |     |INTM|            |    |    |            | 												|
//-----------------------------------------------------------------------------------------------------------

#define st1 		(volatile unsigned int*)0x7

#define XF				  13 
#define INTM			  11
//--------------------------------------------------------------------------------------------------------------------------------------
                      

#define swwsr		(volatile unsigned int*)0x28
#define bscr  		(volatile unsigned int*)0x29
#define bl 			(volatile unsigned int*)0x0b
#define pmst 		(volatile unsigned int*)0x1d

#define tim 		(volatile unsigned int*)0x24
#define prd 		(volatile unsigned int*)0x25
#define tcr 		(volatile unsigned int*)0x26
#define swcr  		(volatile unsigned int*)0x2b

#define prd_val		(999)//Interupt system at each 2 Sample
#define timer_stop  0x10
#define timer_reset 0x30
#define timer_run   0x0

/*#define timerdelay(micro_second) \ 
        {  	timer_dealy=micro_second;		     \
			register_switch(imr,TINT,on);        \
		    *tcr=timer_run;					     
		    while(!timer_done);				     
		    timer_done=no;		}*/
	
#define dma_channel 	(volatile unsigned int*)0x054	
#define dma4 4
#define dma5 5

#define dma4_sub_address 0x15
#define dma4_address (volatile unsigned int*)0x55
#define dma4_data (volatile unsigned int*)0x57


//**McBSP0**
#define	SPSA0      (volatile unsigned int*)0x038     //McBSP0 sub_bank address register
#define	SPCD0      (volatile unsigned int*)0x039     //McBSP0 sub_bank data register
#define	DRR10      (volatile unsigned int*)0x021     //Data receive register1 of McBSP0
#define	DRR20      (volatile unsigned int*)0x020     //Data receive register2 of McBSP0
#define	DXR10      (volatile unsigned int*)0x023     //Data transmit register1 of McBSP0
#define	DXR20      (volatile unsigned int*)0x022     //Data transmit register2 of McBSP0

//**McBSP1**
#define	SPSA1      (volatile unsigned int*)0x048     //McBSP1 sub_bank address register
#define	SPCD1      (volatile unsigned int*)0x049     //McBSP1 sub_bank data register
#define	DRR11      (volatile unsigned int*)0x041     //Data receive register1 of McBSP1
#define	DRR21      (volatile unsigned int*)0x040     //Data receive register2 of McBSP1
#define	DXR11      (volatile unsigned int*)0x043     //Data transmit register1 of McBSP1
#define	DXR21      (volatile unsigned int*)0x042     //Data transmit register2 of McBSP1

//**McBSP2**
#define	SPSA2      (volatile unsigned int*)0x034     //McBSP2 sub_bank address register
#define	SPCD2      (volatile unsigned int*)0x035     //McBSP2 sub_bank data register
#define	DRR12      (volatile unsigned int*)0x031     //Data receive register1 of McBSP2
#define	DRR22      (volatile unsigned int*)0x030     //Data receive register2 of McBSP2
#define	DXR12      (volatile unsigned int*)0x033     //Data transmit register1 of McBSP2
#define	DXR22      (volatile unsigned int*)0x032     //Data transmit register2 of McBSP2


//**Sub Address**
#define	SPCR1      (volatile unsigned int*)0x00      //serial port control register 1
#define	SPCR2      (volatile unsigned int*)0x01      //serial port control register 2
#define	RCR1       (volatile unsigned int*)0x02      //Receive control register 1
#define	RCR2       (volatile unsigned int*)0x03      //Receive control register 2
#define	XCR1       (volatile unsigned int*)0x04      //Transmit control register 1
#define	XCR2       (volatile unsigned int*)0x05      //Transmit control register 2
#define	SRGR1      (volatile unsigned int*)0x06      //Sample rate generator register 1
#define	SRGR2      (volatile unsigned int*)0x07      //Sample rate generator register 2
#define	MCR1       (volatile unsigned int*)0x08      //Multichannel register 1
#define	MCR2       (volatile unsigned int*)0x09      //Multichannel register 2
#define	RCERA      (volatile unsigned int*)0x0A      //Receive channel enable register partion A
#define	RCERB      (volatile unsigned int*)0x0B      //Receive channel enable register partion B
#define	XCERA      (volatile unsigned int*)0x0C      //Transmit channel enable register partion A
#define	XCERB      (volatile unsigned int*)0x0D      //Transmit channel enable register partion B
#define	PCR        (volatile unsigned int*)0x0E      //Pin control register*/



//end of file.
//please do not remove. it is left here to ensure that no lines of code are removed by any editor