📄 at91rm9200_bfc.h
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/* linux/include/asm-arm/arch-at91rm9200/at91rm9200_bfc.h
*
* Hardware definition for the bfc peripheral in the ATMEL at91rm9200 processor
*
* Generated 01/09/2006 (16:49:36) AT91 SW Application Group from BFC_1757B V1.3
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef __AT91RM9200_BFC_H
#define __AT91RM9200_BFC_H
/* -------------------------------------------------------- */
/* BFC ID definitions for AT91RM9200 */
/* -------------------------------------------------------- */
/* -------------------------------------------------------- */
/* BFC Base Address definitions for AT91RM9200 */
/* -------------------------------------------------------- */
#define AT91C_BASE_BFC 0xFFFFFFC0 /**< BFC base address */
/* -------------------------------------------------------- */
/* PIO definition for BFC hardware peripheral */
/* -------------------------------------------------------- */
/* -------------------------------------------------------- */
/* Register offset definition for BFC hardware peripheral */
/* -------------------------------------------------------- */
#define BFC_MR (0x0000) /**< BFC Mode Register */
/* -------------------------------------------------------- */
/* Bitfields definition for BFC hardware peripheral */
/* -------------------------------------------------------- */
/* --- Register BFC_MR */
#define AT91C_BFC_BFCOM (0x3 << 0 ) /**< (BFC) Burst Flash Controller Operating Mode */
#define AT91C_BFC_BFCOM_DISABLED 0x0 /**< (BFC) NPCS0 is driven by the SMC or remains high. */
#define AT91C_BFC_BFCOM_ASYNC 0x1 /**< (BFC) Asynchronous */
#define AT91C_BFC_BFCOM_BURST_READ 0x2 /**< (BFC) Burst Read */
#define AT91C_BFC_BFCC (0x3 << 2 ) /**< (BFC) Burst Flash Controller Operating Mode */
#define AT91C_BFC_BFCC_MCK (0x1 << 2) /**< (BFC) Master Clock. */
#define AT91C_BFC_BFCC_MCK_DIV_2 (0x2 << 2) /**< (BFC) Master Clock divided by 2. */
#define AT91C_BFC_BFCC_MCK_DIV_4 (0x3 << 2) /**< (BFC) Master Clock divided by 4. */
#define AT91C_BFC_AVL (0xF << 4 ) /**< (BFC) Address Valid Latency */
#define AT91C_BFC_PAGES (0x7 << 8 ) /**< (BFC) Page Size */
#define AT91C_BFC_PAGES_NO_PAGE (0x0 << 8) /**< (BFC) No page handling. */
#define AT91C_BFC_PAGES_16 (0x1 << 8) /**< (BFC) 16 bytes page size. */
#define AT91C_BFC_PAGES_32 (0x2 << 8) /**< (BFC) 32 bytes page size. */
#define AT91C_BFC_PAGES_64 (0x3 << 8) /**< (BFC) 64 bytes page size. */
#define AT91C_BFC_PAGES_128 (0x4 << 8) /**< (BFC) 128 bytes page size. */
#define AT91C_BFC_PAGES_256 (0x5 << 8) /**< (BFC) 256 bytes page size. */
#define AT91C_BFC_PAGES_512 (0x6 << 8) /**< (BFC) 512 bytes page size. */
#define AT91C_BFC_PAGES_1024 (0x7 << 8) /**< (BFC) 1024 bytes page size. */
#define AT91C_BFC_OEL (0x3 << 12) /**< (BFC) Output Enable Latency */
#define AT91C_BFC_BAAEN (0x1 << 16) /**< (BFC) Burst Address Advance Enable */
#define AT91C_BFC_BFOEH (0x1 << 17) /**< (BFC) Burst Flash Output Enable Handling */
#define AT91C_BFC_MUXEN (0x1 << 18) /**< (BFC) Multiplexed Bus Enable */
#define AT91C_BFC_RDYEN (0x1 << 19) /**< (BFC) Ready Enable Mode */
#endif /* __AT91RM9200_BFC_H */
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