at91rm9200_mc.h

arch-at91rm9200

/* linux/include/asm-arm/arch-at91rm9200/at91rm9200_mc.h
 * 
 * Hardware definition for the mc peripheral in the ATMEL at91rm9200 processor
 * 
 * Generated  01/09/2006 (16:49:36) AT91 SW Application Group from MC_1760A V1.1
 * 
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License as published by the
 * Free Software Foundation; either version 2 of the License, or (at your
 * option) any later version.
 * 
 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
 * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * You should have received a copy of the  GNU General Public License along
 * with this program; if not, write  to the Free Software Foundation, Inc.,
 * 675 Mass Ave, Cambridge, MA 02139, USA.
 */


#ifndef __AT91RM9200_MC_H
#define __AT91RM9200_MC_H

/* -------------------------------------------------------- */
/* MC ID definitions for  AT91RM9200           */
/* -------------------------------------------------------- */

/* -------------------------------------------------------- */
/* MC Base Address definitions for  AT91RM9200   */
/* -------------------------------------------------------- */
#define AT91C_BASE_MC        	0xFFFFFF00 /**< MC base address */

/* -------------------------------------------------------- */
/* PIO definition for MC hardware peripheral */
/* -------------------------------------------------------- */

/* -------------------------------------------------------- */
/* Register offset definition for MC hardware peripheral */
/* -------------------------------------------------------- */
#define MC_RCR 	(0x0000) 	/**< MC Remap Control Register */
#define MC_ASR 	(0x0004) 	/**< MC Abort Status Register */
#define MC_AASR 	(0x0008) 	/**< MC Abort Address Status Register */
#define MC_PUIA 	(0x0010) 	/**< MC Protection Unit Area */
#define MC_PUP 	(0x0050) 	/**< MC Protection Unit Peripherals */
#define MC_PUER 	(0x0054) 	/**< MC Protection Unit Enable Register */

/* -------------------------------------------------------- */
/* Bitfields definition for MC hardware peripheral */
/* -------------------------------------------------------- */
/* --- Register MC_RCR */
#define AT91C_MC_RCB          (0x1 << 0 ) /**< (MC) Remap Command Bit */
/* --- Register MC_ASR */
#define AT91C_MC_UNDADD       (0x1 << 0 ) /**< (MC) Undefined Addess Abort Status */
#define AT91C_MC_MISADD       (0x1 << 1 ) /**< (MC) Misaligned Addess Abort Status */
#define AT91C_MC_MPU          (0x1 << 2 ) /**< (MC) Memory protection Unit Abort Status */
#define AT91C_MC_ABTSZ        (0x3 << 8 ) /**< (MC) Abort Size Status */
#define 	AT91C_MC_ABTSZ_BYTE                 (0x0 <<  8) /**< (MC) Byte */
#define 	AT91C_MC_ABTSZ_HWORD                (0x1 <<  8) /**< (MC) Half-word */
#define 	AT91C_MC_ABTSZ_WORD                 (0x2 <<  8) /**< (MC) Word */
#define AT91C_MC_ABTTYP       (0x3 << 10) /**< (MC) Abort Type Status */
#define 	AT91C_MC_ABTTYP_DATAR                (0x0 << 10) /**< (MC) Data Read */
#define 	AT91C_MC_ABTTYP_DATAW                (0x1 << 10) /**< (MC) Data Write */
#define 	AT91C_MC_ABTTYP_FETCH                (0x2 << 10) /**< (MC) Code Fetch */
#define AT91C_MC_MST0         (0x1 << 16) /**< (MC) Master 0 Abort Source */
#define AT91C_MC_MST1         (0x1 << 17) /**< (MC) Master 1 Abort Source */
#define AT91C_MC_SVMST0       (0x1 << 24) /**< (MC) Saved Master 0 Abort Source */
#define AT91C_MC_SVMST1       (0x1 << 25) /**< (MC) Saved Master 1 Abort Source */
/* --- Register MC_PUIA */
#define AT91C_MC_PROT         (0x3 << 0 ) /**< (MC) Protection */
#define 	AT91C_MC_PROT_PNAUNA               0x0 /**< (MC) Privilege: No Access, User: No Access */
#define 	AT91C_MC_PROT_PRWUNA               0x1 /**< (MC) Privilege: Read/Write, User: No Access */
#define 	AT91C_MC_PROT_PRWURO               0x2 /**< (MC) Privilege: Read/Write, User: Read Only */
#define 	AT91C_MC_PROT_PRWURW               0x3 /**< (MC) Privilege: Read/Write, User: Read/Write */
#define AT91C_MC_SIZE         (0xF << 4 ) /**< (MC) Internal Area Size */
#define 	AT91C_MC_SIZE_1KB                  (0x0 <<  4) /**< (MC) Area size 1KByte */
#define 	AT91C_MC_SIZE_2KB                  (0x1 <<  4) /**< (MC) Area size 2KByte */
#define 	AT91C_MC_SIZE_4KB                  (0x2 <<  4) /**< (MC) Area size 4KByte */
#define 	AT91C_MC_SIZE_8KB                  (0x3 <<  4) /**< (MC) Area size 8KByte */
#define 	AT91C_MC_SIZE_16KB                 (0x4 <<  4) /**< (MC) Area size 16KByte */
#define 	AT91C_MC_SIZE_32KB                 (0x5 <<  4) /**< (MC) Area size 32KByte */
#define 	AT91C_MC_SIZE_64KB                 (0x6 <<  4) /**< (MC) Area size 64KByte */
#define 	AT91C_MC_SIZE_128KB                (0x7 <<  4) /**< (MC) Area size 128KByte */
#define 	AT91C_MC_SIZE_256KB                (0x8 <<  4) /**< (MC) Area size 256KByte */
#define 	AT91C_MC_SIZE_512KB                (0x9 <<  4) /**< (MC) Area size 512KByte */
#define 	AT91C_MC_SIZE_1MB                  (0xA <<  4) /**< (MC) Area size 1MByte */
#define 	AT91C_MC_SIZE_2MB                  (0xB <<  4) /**< (MC) Area size 2MByte */
#define 	AT91C_MC_SIZE_4MB                  (0xC <<  4) /**< (MC) Area size 4MByte */
#define 	AT91C_MC_SIZE_8MB                  (0xD <<  4) /**< (MC) Area size 8MByte */
#define 	AT91C_MC_SIZE_16MB                 (0xE <<  4) /**< (MC) Area size 16MByte */
#define 	AT91C_MC_SIZE_64MB                 (0xF <<  4) /**< (MC) Area size 64MByte */
#define AT91C_MC_BA           (0x3FFFF << 10) /**< (MC) Internal Area Base Address */
/* --- Register MC_PUP */
#define AT91C_MC_PROT         (0x3 << 0 ) /**< (MC) Protection */
#define 	AT91C_MC_PROT_PNAUNA               0x0 /**< (MC) Privilege: No Access, User: No Access */
#define 	AT91C_MC_PROT_PRWUNA               0x1 /**< (MC) Privilege: Read/Write, User: No Access */
#define 	AT91C_MC_PROT_PRWURO               0x2 /**< (MC) Privilege: Read/Write, User: Read Only */
#define 	AT91C_MC_PROT_PRWURW               0x3 /**< (MC) Privilege: Read/Write, User: Read/Write */
/* --- Register MC_PUER */
#define AT91C_MC_PUEB         (0x1 << 0 ) /**< (MC) Protection Unit enable Bit */

#endif /* __AT91RM9200_MC_H */