at91rm9200.grd

AT91RM9200-BasicTools-IAR4_30A-1_2

        hk="Receive Pointer Register";
        access="memorymapped"; address=0xFFFC8100}
    AT91C_US2_TPR {desc="Transmit Pointer Register";
        hk="Transmit Pointer Register";
        access="memorymapped"; address=0xFFFC8108}
# ========== Register definition for US2 peripheral ========== 
    AT91C_US2_RNPR {desc="Receive Next Pointer Register";
        hk="Receive Next Pointer Register";
        access="memorymapped"; address=0xFFFC8110}
    AT91C_US2_XXR {desc="XON_XOFF Register";
        hk="XON_XOFF Register";
        access="memorymapped"; address=0xFFFC8048}
    AT91C_US2_FIDI {desc="FI_DI_Ratio Register";
        hk="FI_DI_Ratio Register";
        access="memorymapped"; address=0xFFFC8040}
    AT91C_US2_TTGR {desc="Transmitter Time-guard Register";
        hk="Transmitter Time-guard Register";
        access="memorymapped"; address=0xFFFC8028}
    AT91C_US2_BRGR {desc="Baud Rate Generator Register";
        hk="Baud Rate Generator Register";
        access="memorymapped"; address=0xFFFC8020}
    AT91C_US2_RHR {desc="Receiver Holding Register";
        hk="Receiver Holding Register";
        access="memorymapped"; address=0xFFFC8018}
    AT91C_US2_IMR {desc="Interrupt Mask Register";
        hk="Interrupt Mask Register";
        access="memorymapped"; address=0xFFFC8010}
    AT91C_US2_IER {desc="Interrupt Enable Register";
        hk="Interrupt Enable Register";
        access="memorymapped"; address=0xFFFC8008}
    AT91C_US2_CR {desc="Control Register";
        hk="Control Register";
        access="memorymapped"; address=0xFFFC8000}
    AT91C_US2_IF {desc="IRDA_FILTER Register";
        hk="IRDA_FILTER Register";
        access="memorymapped"; address=0xFFFC804C}
    AT91C_US2_NER {desc="Nb Errors Register";
        hk="Nb Errors Register";
        access="memorymapped"; address=0xFFFC8044}
    AT91C_US2_RTOR {desc="Receiver Time-out Register";
        hk="Receiver Time-out Register";
        access="memorymapped"; address=0xFFFC8024}
    AT91C_US2_THR {desc="Transmitter Holding Register";
        hk="Transmitter Holding Register";
        access="memorymapped"; address=0xFFFC801C}
    AT91C_US2_CSR {desc="Channel Status Register";
        hk="Channel Status Register";
        access="memorymapped"; address=0xFFFC8014}
    AT91C_US2_IDR {desc="Interrupt Disable Register";
        hk="Interrupt Disable Register";
        access="memorymapped"; address=0xFFFC800C}
# ========== Register definition for PDC_US1 peripheral ========== 
    AT91C_US2_MR {desc="Mode Register";
        hk="Mode Register";
        access="memorymapped"; address=0xFFFC8004}
    AT91C_US1_PTSR {desc="PDC Transfer Status Register";
        hk="PDC Transfer Status Register";
        access="memorymapped"; address=0xFFFC4124}
    AT91C_US1_TNCR {desc="Transmit Next Counter Register";
        hk="Transmit Next Counter Register";
        access="memorymapped"; address=0xFFFC411C}
    AT91C_US1_RNCR {desc="Receive Next Counter Register";
        hk="Receive Next Counter Register";
        access="memorymapped"; address=0xFFFC4114}
    AT91C_US1_TCR {desc="Transmit Counter Register";
        hk="Transmit Counter Register";
        access="memorymapped"; address=0xFFFC410C}
    AT91C_US1_RCR {desc="Receive Counter Register";
        hk="Receive Counter Register";
        access="memorymapped"; address=0xFFFC4104}
    AT91C_US1_PTCR {desc="PDC Transfer Control Register";
        hk="PDC Transfer Control Register";
        access="memorymapped"; address=0xFFFC4120}
    AT91C_US1_TNPR {desc="Transmit Next Pointer Register";
        hk="Transmit Next Pointer Register";
        access="memorymapped"; address=0xFFFC4118}
    AT91C_US1_RNPR {desc="Receive Next Pointer Register";
        hk="Receive Next Pointer Register";
        access="memorymapped"; address=0xFFFC4110}
    AT91C_US1_TPR {desc="Transmit Pointer Register";
        hk="Transmit Pointer Register";
        access="memorymapped"; address=0xFFFC4108}
# ========== Register definition for US1 peripheral ========== 
    AT91C_US1_RPR {desc="Receive Pointer Register";
        hk="Receive Pointer Register";
        access="memorymapped"; address=0xFFFC4100}
    AT91C_US1_XXR {desc="XON_XOFF Register";
        hk="XON_XOFF Register";
        access="memorymapped"; address=0xFFFC4048}
    AT91C_US1_RHR {desc="Receiver Holding Register";
        hk="Receiver Holding Register";
        access="memorymapped"; address=0xFFFC4018}
    AT91C_US1_IMR {desc="Interrupt Mask Register";
        hk="Interrupt Mask Register";
        access="memorymapped"; address=0xFFFC4010}
    AT91C_US1_IER {desc="Interrupt Enable Register";
        hk="Interrupt Enable Register";
        access="memorymapped"; address=0xFFFC4008}
    AT91C_US1_CR {desc="Control Register";
        hk="Control Register";
        access="memorymapped"; address=0xFFFC4000}
    AT91C_US1_RTOR {desc="Receiver Time-out Register";
        hk="Receiver Time-out Register";
        access="memorymapped"; address=0xFFFC4024}
    AT91C_US1_THR {desc="Transmitter Holding Register";
        hk="Transmitter Holding Register";
        access="memorymapped"; address=0xFFFC401C}
    AT91C_US1_CSR {desc="Channel Status Register";
        hk="Channel Status Register";
        access="memorymapped"; address=0xFFFC4014}
    AT91C_US1_IDR {desc="Interrupt Disable Register";
        hk="Interrupt Disable Register";
        access="memorymapped"; address=0xFFFC400C}
    AT91C_US1_FIDI {desc="FI_DI_Ratio Register";
        hk="FI_DI_Ratio Register";
        access="memorymapped"; address=0xFFFC4040}
    AT91C_US1_BRGR {desc="Baud Rate Generator Register";
        hk="Baud Rate Generator Register";
        access="memorymapped"; address=0xFFFC4020}
    AT91C_US1_TTGR {desc="Transmitter Time-guard Register";
        hk="Transmitter Time-guard Register";
        access="memorymapped"; address=0xFFFC4028}
    AT91C_US1_IF {desc="IRDA_FILTER Register";
        hk="IRDA_FILTER Register";
        access="memorymapped"; address=0xFFFC404C}
    AT91C_US1_NER {desc="Nb Errors Register";
        hk="Nb Errors Register";
        access="memorymapped"; address=0xFFFC4044}
# ========== Register definition for PDC_US0 peripheral ========== 
    AT91C_US1_MR {desc="Mode Register";
        hk="Mode Register";
        access="memorymapped"; address=0xFFFC4004}
    AT91C_US0_PTCR {desc="PDC Transfer Control Register";
        hk="PDC Transfer Control Register";
        access="memorymapped"; address=0xFFFC0120}
    AT91C_US0_TNPR {desc="Transmit Next Pointer Register";
        hk="Transmit Next Pointer Register";
        access="memorymapped"; address=0xFFFC0118}
    AT91C_US0_RNPR {desc="Receive Next Pointer Register";
        hk="Receive Next Pointer Register";
        access="memorymapped"; address=0xFFFC0110}
    AT91C_US0_TPR {desc="Transmit Pointer Register";
        hk="Transmit Pointer Register";
        access="memorymapped"; address=0xFFFC0108}
    AT91C_US0_RPR {desc="Receive Pointer Register";
        hk="Receive Pointer Register";
        access="memorymapped"; address=0xFFFC0100}
    AT91C_US0_PTSR {desc="PDC Transfer Status Register";
        hk="PDC Transfer Status Register";
        access="memorymapped"; address=0xFFFC0124}
    AT91C_US0_TNCR {desc="Transmit Next Counter Register";
        hk="Transmit Next Counter Register";
        access="memorymapped"; address=0xFFFC011C}
    AT91C_US0_RNCR {desc="Receive Next Counter Register";
        hk="Receive Next Counter Register";
        access="memorymapped"; address=0xFFFC0114}
    AT91C_US0_TCR {desc="Transmit Counter Register";
        hk="Transmit Counter Register";
        access="memorymapped"; address=0xFFFC010C}
# ========== Register definition for US0 peripheral ========== 
    AT91C_US0_RCR {desc="Receive Counter Register";
        hk="Receive Counter Register";
        access="memorymapped"; address=0xFFFC0104}
    AT91C_US0_TTGR {desc="Transmitter Time-guard Register";
        hk="Transmitter Time-guard Register";
        access="memorymapped"; address=0xFFFC0028}
    AT91C_US0_BRGR {desc="Baud Rate Generator Register";
        hk="Baud Rate Generator Register";
        access="memorymapped"; address=0xFFFC0020}
    AT91C_US0_RHR {desc="Receiver Holding Register";
        hk="Receiver Holding Register";
        access="memorymapped"; address=0xFFFC0018}
    AT91C_US0_IMR {desc="Interrupt Mask Register";
        hk="Interrupt Mask Register";
        access="memorymapped"; address=0xFFFC0010}
    AT91C_US0_NER {desc="Nb Errors Register";
        hk="Nb Errors Register";
        access="memorymapped"; address=0xFFFC0044}
    AT91C_US0_RTOR {desc="Receiver Time-out Register";
        hk="Receiver Time-out Register";
        access="memorymapped"; address=0xFFFC0024}
    AT91C_US0_XXR {desc="XON_XOFF Register";
        hk="XON_XOFF Register";
        access="memorymapped"; address=0xFFFC0048}
    AT91C_US0_FIDI {desc="FI_DI_Ratio Register";
        hk="FI_DI_Ratio Register";
        access="memorymapped"; address=0xFFFC0040}
    AT91C_US0_CR {desc="Control Register";
        hk="Control Register";
        access="memorymapped"; address=0xFFFC0000}
    AT91C_US0_IER {desc="Interrupt Enable Register";
        hk="Interrupt Enable Register";
        access="memorymapped"; address=0xFFFC0008}
    AT91C_US0_IF {desc="IRDA_FILTER Register";
        hk="IRDA_FILTER Register";
        access="memorymapped"; address=0xFFFC004C}
    AT91C_US0_MR {desc="Mode Register";
        hk="Mode Register";
        access="memorymapped"; address=0xFFFC0004}
    AT91C_US0_IDR {desc="Interrupt Disable Register";
        hk="Interrupt Disable Register";
        access="memorymapped"; address=0xFFFC000C}
    AT91C_US0_CSR {desc="Channel Status Register";
        hk="Channel Status Register";
        access="memorymapped"; address=0xFFFC0014}
# ========== Register definition for TWI peripheral ========== 
    AT91C_US0_THR {desc="Transmitter Holding Register";
        hk="Transmitter Holding Register";
        access="memorymapped"; address=0xFFFC001C}
    AT91C_TWI_RHR {desc="Receive Holding Register";
        hk="Receive Holding Register";
        access="memorymapped"; address=0xFFFB8030}
    AT91C_TWI_IDR {desc="Interrupt Disable Register";
        hk="Interrupt Disable Register";
        access="memorymapped"; address=0xFFFB8028}
    AT91C_TWI_SR {desc="Status Register";
        hk="Status Register";
        access="memorymapped"; address=0xFFFB8020}
    AT91C_TWI_CWGR {desc="Clock Waveform Generator Register";
        hk="Clock Waveform Generator Register";
        access="memorymapped"; address=0xFFFB8010}
    AT91C_TWI_SMR {desc="Slave Mode Register";
        hk="Slave Mode Register";
        access="memorymapped"; address=0xFFFB8008}
    AT91C_TWI_CR {desc="Control Register";
        hk="Control Register";
        access="memorymapped"; address=0xFFFB8000}
    AT91C_TWI_THR {desc="Transmit Holding Register";
        hk="Transmit Holding Register";
        access="memorymapped"; address=0xFFFB8034}
    AT91C_TWI_IMR {desc="Interrupt Mask Register";
        hk="Interrupt Mask Register";
        access="memorymapped"; address=0xFFFB802C}
    AT91C_TWI_IER {desc="Interrupt Enable Register";
        hk="Interrupt Enable Register";
        access="memorymapped"; address=0xFFFB8024}
    AT91C_TWI_IADR {desc="Internal Address Register";
        hk="Internal Address Register";
        access="memorymapped"; address=0xFFFB800C}
# ========== Register definition for PDC_MCI peripheral ========== 
    AT91C_TWI_MMR {desc="Master Mode Register";
        hk="Master Mode Register";
        access="memorymapped"; address=0xFFFB8004}
    AT91C_MCI_PTCR {desc="PDC Transfer Control Register";
        hk="PDC Transfer Control Register";
        access="memorymapped"; address=0xFFFB4120}
    AT91C_MCI_TNPR {desc="Transmit Next Pointer Register";
        hk="Transmit Next Pointer Register";
        access="memorymapped"; address=0xFFFB4118}
    AT91C_MCI_RNPR {desc="Receive Next Pointer Register";
        hk="Receive Next Pointer Register";
        access="memorymapped"; address=0xFFFB4110}
    AT91C_MCI_TPR {desc="Transmit Pointer Register";
        hk="Transmit Pointer Register";
        access="memorymapped"; address=0xFFFB4108}
    AT91C_MCI_RPR {desc="Receive Pointer Register";
        hk="Receive Pointer Register";
        access="memorymapped"; address=0xFFFB4100}
    AT91C_MCI_PTSR {de