_primary.vhd

完整的I2C slave model以及spec詳附在內,適合想利用verilog開發此類傳輸的人參考

library verilog;
use verilog.vl_types.all;
entity i2c_slave is
    port(
        scl             : in     vl_logic;
        sda_i           : in     vl_logic;
        sda_oe          : in     vl_logic;
        sda_o           : out    vl_logic
    );
end i2c_slave;