伪随机码产生程序.txt

来自「这是一个编码器的实现的程序」· 文本 代码 · 共 24 行

library ieee;
use ieee.std_logic_1164.all;
entity shift_register is
port(clk,reset:in std_logic;
       q:out std_logic);
end shift_register;
architecture A of shift_register is
signal t1:std_logic;
signal dout:std_logic_vector(3 downto 0);
begin
t1<=dout(0) xor dout(3);
process(clk,reset)
begin
if clk'event and clk='1'then
if reset='1'then
dout<="1010";
elsif reset='0' then
dout<=t1&dout(3 downto 1);
end if;
end if;
end process;
q<=dout(0);
end A;