tcxmaster.lst

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C51 COMPILER V7.50   TCXMASTER                     05/16/2006 23:11:09 PAGE 1   


C51 COMPILER V7.50, COMPILATION OF MODULE TCXMASTER
OBJECT MODULE PLACED IN tcxmaster.OBJ
COMPILER INVOKED BY: d:\Program\Keil\C51\BIN\C51.EXE tcxmaster.c OPTIMIZE(6,SPEE
                    -D) DEBUG OBJECTEXTEND CODE SYMBOLS PAGEWIDTH(80)

line level    source

   1          #pragma NOIV                    // Do not generate interrupt vecto
             -rs
   2          //----------------------------------------------------------------
             --------------
   3          //   File:      tcxmaster.c
   4          //   Contents:  Hooks required to implement USB peripheral functio
             -n.
   5          //              Code written for FX2 56-pin REVD...
   6          //              This firmware is used to test the FX ext. master C
             -Y3682 DK
   7          //   Copyright (c) 2001 Cypress Semiconductor All rights reserved
   8          //----------------------------------------------------------------
             --------------
   9          #include "fx2.h"
  10          #include "fx2regs.h"
  11          #include "fx2sdly.h"            // SYNCDELAY macro
  12          
  13          extern BOOL GotSUD;             // Received setup data flag
  14          extern BOOL Sleep;
  15          extern BOOL Rwuen;
  16          extern BOOL Selfpwr;
  17          
  18          BYTE Configuration;             // Current configuration
  19          BYTE AlternateSetting;          // Alternate settings
  20          
  21          // EZUSB FX2 PORTA = slave fifo enable(s), when IFCFG[1:0]=11
  22          sbit PA0 = IOA ^ 0;             // alt. func., INT0#
  23          sbit PA1 = IOA ^ 1;             // alt. func., INT1#
  24          sbit PA2 = IOA ^ 2;          // is SLOE
  25          sbit PA3 = IOA ^ 3;             // alt. func., WU2
  26          // sbit PA4 = IOA ^ 4;          // is FIFOADR0
  27          // sbit PA5 = IOA ^ 5;          // is FIFOADR1
  28          // sbit PA6 = IOA ^ 6;          // is PKTEND
  29          // sbit PA7 = IOA ^ 7;          // is FLAGD
  30          
  31          // EZUSB FX2 PORTC i/o...       port NA for 56-pin FX2
  32          // sbit PC0 = IOC ^ 0;
  33          // sbit PC1 = IOC ^ 1;
  34          // sbit PC2 = IOC ^ 2;
  35          // sbit PC3 = IOC ^ 3;
  36          // sbit PC4 = IOC ^ 4;
  37          // sbit PC5 = IOC ^ 5;
  38          // sbit PC6 = IOC ^ 6;
  39          // sbit PC7 = IOC ^ 7;
  40          
  41          // EZUSB FX2 PORTB = FD[7:0], when IFCFG[1:0]=11
  42          // sbit PB0 = IOB ^ 0;
  43          // sbit PB1 = IOB ^ 1;
  44          // sbit PB2 = IOB ^ 2;
  45          // sbit PB3 = IOB ^ 3;
  46          // sbit PB4 = IOB ^ 4;
  47          // sbit PB5 = IOB ^ 5;
  48          // sbit PB6 = IOB ^ 6;
  49          // sbit PB7 = IOB ^ 7;
C51 COMPILER V7.50   TCXMASTER                     05/16/2006 23:11:09 PAGE 2   

  50          
  51          // EZUSB FX2 PORTD = FD[15:8], when IFCFG[1:0]=11 and WORDWIDE=1
  52          sbit PD0 = IOD ^ 0;
  53          sbit PD1 = IOD ^ 1;
  54          sbit PD2 = IOD ^ 2;
  55          sbit PD3 = IOD ^ 3;
  56          sbit PD4 = IOD ^ 4;
  57          sbit PD5 = IOD ^ 5;
  58          sbit PD6 = IOD ^ 6;
  59          sbit PD7 = IOD ^ 7;
  60          
  61          
  62          #define VR_SEND_COMMAND     0xa2 // Send Command
  63          #define VR_RESET_FIFO       0xa3 // Reset fifo
  64          
  65          // EZUSB FX2 PORTE is not bit-addressable...
  66          
  67          //----------------------------------------------------------------
             --------------
  68          // Task Dispatcher hooks
  69          //   The following hooks are called by the task dispatcher.
  70          //----------------------------------------------------------------
             --------------
  71          void TD_Init( void )
  72          { // Called once at startup
  73   1      
  74   1        CPUCS = 0x10;                 // CLKSPD[1:0]=10, for 48MHz opera
             -tion
  75   1      
  76   1        IFCONFIG = 0xEB;
  77   1        // IFCLKSRC=1   , FIFOs executes on internal clk source
  78   1        // xMHz=1       , 30MHz internal clk rate
  79   1        // IFCLKOE=1    , drive IFCLK pin signal at 48MHz
  80   1        // IFCLKPOL=0   , Don't invert IFCLK pin signal from internal cl
             -k
  81   1        // ASYNC=1      , master samples asynchronous
  82   1        // GSTATE=0     , Don't drive GPIF states out on PORTE[2:0], deb
             -ug WF
  83   1        // IFCFG[1:0]=11, FX2 in slave FIFO mode
  84   1      
  85   1      
  86   1        // Registers which require a synchronization delay, see section 
             -15.14
  87   1        // FIFORESET        FIFOPINPOLAR
  88   1        // INPKTEND         OUTPKTEND
  89   1        // EPxBCH:L         REVCTL
  90   1        // GPIFTCB3         GPIFTCB2
  91   1        // GPIFTCB1         GPIFTCB0
  92   1        // EPxFIFOPFH:L     EPxAUTOINLENH:L
  93   1        // EPxFIFOCFG       EPxGPIFFLGSEL
  94   1        // PINFLAGSxx       EPxFIFOIRQ
  95   1        // EPxFIFOIE        GPIFIRQ
  96   1        // GPIFIE           GPIFADRH:L
  97   1        // UDMACRCH:L       EPxGPIFTRIG
  98   1        // GPIFTRIG
  99   1        
 100   1        // Note: The pre-REVE EPxGPIFTCH/L register are affected, as wel
             -l...
 101   1        //      ...these have been replaced by GPIFTC[B3:B0] registers
 102   1      
 103   1        SYNCDELAY;
 104   1        FIFORESET = 0x80;             // activate NAK-ALL to avoid race 
C51 COMPILER V7.50   TCXMASTER                     05/16/2006 23:11:09 PAGE 3   

             -conditions
 105   1        SYNCDELAY;                    // see TRM section 15.14
 106   1        FIFORESET = 0x02;             // reset, FIFO 2
 107   1        SYNCDELAY;                    // 
 108   1        FIFORESET = 0x04;             // reset, FIFO 4
 109   1        SYNCDELAY;                    // 
 110   1        FIFORESET = 0x06;             // reset, FIFO 6
 111   1        SYNCDELAY;                    // 
 112   1        FIFORESET = 0x08;             // reset, FIFO 8
 113   1        SYNCDELAY;                    // 
 114   1        FIFORESET = 0x00;             // deactivate NAK-ALL
 115   1      
 116   1        SYNCDELAY;
 117   1        PINFLAGSAB = 0x98;            // FLAGA - fixed EP2EF, FLAGB - fi
             -xed EP4EF
 118   1        SYNCDELAY;
 119   1        PINFLAGSCD = 0xFE;            // FLAGC - fixed EP6FF, FLAGD - fi
             -xed EP8FF
 120   1        SYNCDELAY;
 121   1        PORTACFG |= 0x80;             // FLAGD, set alt. func. of PA7 pi
             -n
 122   1        SYNCDELAY;
 123   1        FIFOPINPOLAR = 0x00;          // all signals active low
 124   1        SYNCDELAY;
 125   1        
 126   1        // handle the case where we were already in AUTO mode...
 127   1        EP2FIFOCFG = 0x00;            // AUTOOUT=0, WORDWIDE=0
 128   1        SYNCDELAY;
 129   1        
 130   1        EP2FIFOCFG = 0x10;            // AUTOOUT=1, WORDWIDE=0
 131   1        SYNCDELAY;
 132   1        
 133   1        // handle the case where we were already in AUTO mode...
 134   1        EP4FIFOCFG = 0x00;            // AUTOOUT=0, WORDWIDE=0
 135   1        SYNCDELAY;
 136   1        
 137   1        EP4FIFOCFG = 0x10;            // AUTOOUT=1, WORDWIDE=0
 138   1        SYNCDELAY;
 139   1        
 140   1        EP6FIFOCFG = 0x0C;            // AUTOIN=1, ZEROLENIN=1, WORDWIDE
             -=0
 141   1        SYNCDELAY;
 142   1        EP8FIFOCFG = 0x0C;            // AUTOIN=1, ZEROLENIN=1, WORDWIDE
             -=0
 143   1        
 144   1        OEA |= 0x02;
 145   1        
 146   1        // 复位CPLD
 147   1        IOA &= ~0x02;
 148   1        IOA &= ~0x02;
 149   1        IOA &= ~0x02;
 150   1        
 151   1        IOA |= 0x2;
 152   1        IOA |= 0x2;
 153   1        IOA |= 0x2;  
 154   1      }
 155          
 156          void TD_Poll( void )
 157          { // Called repeatedly while the device is idle
 158   1      
 159   1        // ...nothing to do... slave fifo's are in AUTO mode...
 160   1      
C51 COMPILER V7.50   TCXMASTER                     05/16/2006 23:11:09 PAGE 4   

 161   1      }
 162          
 163          BOOL TD_Suspend( void )          
 164          { // Called before the device goes into suspend mode
 165   1         return( TRUE );
 166   1      }
 167          
 168          BOOL TD_Resume( void )          
 169          { // Called after the device resumes
 170   1         return( TRUE );
 171   1      }
 172          
 173          //----------------------------------------------------------------
             --------------
 174          // Device Request hooks
 175          //   The following hooks are called by the end point 0 device requ
             -est parser.
 176          //----------------------------------------------------------------
             --------------
 177          BOOL DR_GetDescriptor( void )
 178          {
 179   1         return( TRUE );
 180   1      }
 181          
 182          BOOL DR_SetConfiguration( void )   
 183          { // Called when a Set Configuration command is received
 184   1        
 185   1        if( EZUSB_HIGHSPEED( ) )
 186   1        { // ...FX2 in high speed mode
 187   2          EP6AUTOINLENH = 0x02;
 188   2          SYNCDELAY;
 189   2          EP8AUTOINLENH = 0x02;   // set core AUTO commit len = 512 byte
             -s
 190   2          SYNCDELAY;
 191   2          EP6AUTOINLENL = 0x00;
 192   2          SYNCDELAY;
 193   2          EP8AUTOINLENL = 0x00;
 194   2        }
 195   1        else
 196   1        { // ...FX2 in full speed mode
 197   2          EP6AUTOINLENH = 0x00;
 198   2          SYNCDELAY;
 199   2          EP8AUTOINLENH = 0x00;   // set core AUTO commit len = 64 bytes
 200   2          SYNCDELAY;
 201   2          EP6AUTOINLENL = 0x40;
 202   2          SYNCDELAY;
 203   2          EP8AUTOINLENL = 0x40;
 204   2        }
 205   1            
 206   1        Configuration = SETUPDAT[ 2 ];
 207   1        return( TRUE );        // Handled by user code
 208   1      }
 209          
 210          BOOL DR_GetConfiguration( void )   
 211          { // Called when a Get Configuration command is received
 212   1         EP0BUF[ 0 ] = Configuration;
 213   1         EP0BCH = 0;
 214   1         EP0BCL = 1;
 215   1         return(TRUE);          // Handled by user code
 216   1      }
 217          
 218          BOOL DR_SetInterface( void )       
C51 COMPILER V7.50   TCXMASTER                     05/16/2006 23:11:09 PAGE 5   

 219          { // Called when a Set Interface command is received
 220   1         AlternateSetting = SETUPDAT[ 2 ];
 221   1         return( TRUE );        // Handled by user code
 222   1      }
 223          
 224          BOOL DR_GetInterface( void )       
 225          { // Called when a Set Interface command is received
 226   1         EP0BUF[ 0 ] = AlternateSetting;
 227   1         EP0BCH = 0;
 228   1         EP0BCL = 1;
 229   1         return( TRUE );        // Handled by user code
 230   1      }
 231          
 232          BOOL DR_GetStatus( void )
 233          {
 234   1         return( TRUE );
 235   1      }
 236          
 237          BOOL DR_ClearFeature( void )
 238          {
 239   1         return( TRUE );
 240   1      }
 241          
 242          BOOL DR_SetFeature( void )
 243          {
 244   1         return( TRUE );
 245   1      }
 246          
 247          BOOL DR_VendorCmnd( void )
 248          {
 249   1          switch(SETUPDAT[1])
 250   1          {
 251   2                      case VR_SEND_COMMAND:
 252   2                              PA0 = SETUPDAT[2] & 1;
 253   2                              PA1 = (SETUPDAT[2] >> 1) & 1;
 254   2                              PA2 = (SETUPDAT[2] >> 2) & 1;

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