📄 siso_app_c.m
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function [LuO,LcO] = siso_app_C(LuI, LcI, Trellis, BitsLut, dec, LcOFlag,... MaxFlag);%------------------------------------------------------------------------------% Maximum a posteriori decoder with soft-inputs and soft-outputs. %% $RCSfile: siso_app_C.m,v $% $Revision: 2.5 $% $Date: 2003/11/19 16:00:54 $% $Author: coffin $%% Calculates Log-likelihood ratios of received bits. A priori information % of information and coded bits from the other decoder and soft democulator % accepted. Soft inputs, soft outputs. Log-domain calculations for numerical % stability. No approximations used in the calculation of logarithm% of sum of exponents.%% NOTE!: % -----% The log-likelihood ratios for coded bits are *not* suitable to be% passed to another component decoder and their purpose is solely% for soft interference cancellation. Further, PCCCs should not use LLR% information of coded bits in any case, see references.% % Algorithm reference:% Benedetto, S., Divsalar, D., Montorsi, G. and Pollara, F.,% "A Soft-Input Soft-Output APP Module for Iterative Decoding of % Concatenated Codes". IEEE Communications Letters, Vol.1, No.1, 1997.% Benedetto, S., Divsalar, D., Montorsi, G. and Pollara, F.,% "A Soft-Input Soft-Output Maximum A Posterioiri (MAP) Module to Decode% Parallel and Serial Concatenated Codes". TDA Progress Report 42-127.% % Restrictions: Two 1/2-rate RSCs as CCs assumed.%% % Format:% -------% % [LuO,LcO] = siso_app(LuI, LcI, Trellis, BitsLut, dec, LcOFlag);%% Inputs:% -------% LuI - log(P(u;I)), a priori log-likelihoods of the information bits % from other component decoder% LcI - log(P(c;I)), a priori log-likelihoods of the coded bits% from demodulator (PCCC) or other component decoder(SCCC)% Trellis - Structure containing necessary information of CC trellises% BitsLut - Bit look-up table for edge output symbols% dec - Decoder 1 or 2% LcOFlag - Calculate likelihoods log(P(c;O)) or not%% Outputs:% --------% LuO - log(P(u;O)), extrinsic bit information of the information bits% LcO - log(P(c;O)), extrinsic bit information of the coded bits% % Author: MVe, mikko.vehkapera@ee.oulu.fi% Date: 14.10.2002%------------------------------------------------------------------------------% Format of 'edge' (transition connecting two states) for 1/2-rate CCs:% row = edge number% e_S e_E e_U e_C1, e_C2% column = | start edge | end edge | input bit | output binary sequence |%[e_S, e_E, e_U, e_C1, e_C2] = deal(1,2,3,4,5);edge(:,e_S:e_E) = Trellis.Edge(:,1:2);edge(:,e_U) = Trellis.Edge(:,3)-1; % binary inputedge(:,e_C1:e_C2) = BitsLut(Trellis.Edge(:,4),:);if (MaxFlag) [LuO, LcO]=siso_app_MAX_CC(LuI, LcI, edge, BitsLut, Trellis.k, dec, ... LcOFlag, Trellis.flag_3gpp);else [LuO, LcO]=siso_app_CC(LuI, LcI, edge, BitsLut, Trellis.k, dec, LcOFlag,... Trellis.flag_3gpp);end % if (MaxFlag)
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