📄 bt.lis
字号:
00FC 0081 ldd R16,z+0
00FE 8DDF rcall _DAT
0100 .dbline 92
0100 01EE ldi R16,225
0102 10E0 ldi R17,0
0104 C3DF rcall _del
0106 .dbline 92
0106 A898 cbi 0x15,0
0108 .dbline 92
0108 0FEF ldi R16,255
010A 87DF rcall _DAT
010C .dbline 92
010C 05E0 ldi R16,5
010E 10E0 ldi R17,0
0110 BDDF rcall _del
0112 .dbline 92
0112 A895 wdr
0114 .dbline 93
0114 ; }
0114 AB9A sbi 0x15,3
0116 .dbline 93
0116 80E0 ldi R24,<_shu
0118 90E0 ldi R25,>_shu
011A E0910F00 lds R30,_tm+3
011E FF27 clr R31
0120 E80F add R30,R24
0122 F91F adc R31,R25
0124 0081 ldd R16,z+0
0126 79DF rcall _DAT
0128 .dbline 93
0128 02EE ldi R16,226
012A 10E0 ldi R17,0
012C AFDF rcall _del
012E .dbline 93
012E AB98 cbi 0x15,3
0130 .dbline 93
0130 0FEF ldi R16,255
0132 73DF rcall _DAT
0134 .dbline 93
0134 05E0 ldi R16,5
0136 10E0 ldi R17,0
0138 A9DF rcall _del
013A .dbline 93
013A A895 wdr
013C .dbline -2
013C L23:
013C .dbline 0 ; func end
013C 0895 ret
013E .dbend
013E .dbfunc e bee _bee fV
013E ; j -> R20,R21
013E ; j1 -> R12,R13
013E ; spfreq -> R22,R23
013E ; k -> R14,R15
013E ; tone -> R20,R21
013E ; soundlong -> R10,R11
.even
013E _bee::
013E 00D0 rcall push_gset5
0140 A901 movw R20,R18
0142 5801 movw R10,R16
0144 .dbline -1
0144 .dbline 98
0144 ;
0144 ;
0144 ; //Watchdog initialize
0144 ; // prescale: 512K
0144 ; void watchdog_init(void)
0144 .dbline 100
0144 ; {
0144 ; WDR(); //this prevents a timout on enabling
0144 08E9 ldi R16,15000
0146 1AE3 ldi R17,58
0148 9A01 movw R18,R20
014A 00D0 rcall div16u
014C B801 movw R22,R16
014E 7695 lsr R23
0150 6795 ror R22
0152 .dbline 101
0152 ; WDTCR = 0x0E; //WATCHDOG ENABLED - dont forget to issue WDRs
0152 4427 clr R20
0154 5527 clr R21
0156 22C0 rjmp L31
0158 L28:
0158 .dbline 102
0158 ; }
0158 CC24 clr R12
015A DD24 clr R13
015C 18C0 rjmp L35
015E L32:
015E .dbline 103
015E ;
015E .dbline 104
015E ; //call this routine to initialize all peripherals
015E C698 cbi 0x18,6
0160 .dbline 105
0160 EE24 clr R14
0162 FF24 clr R15
0164 03C0 rjmp L39
0166 L36:
0166 .dbline 105
0166 L37:
0166 .dbline 105
0166 C701 movw R24,R14
0168 0196 adiw R24,1
016A 7C01 movw R14,R24
016C L39:
016C .dbline 105
016C ; void init_devices(void)
016C E616 cp R14,R22
016E F706 cpc R15,R23
0170 D0F3 brlo L36
0172 .dbline 106
0172 ; {
0172 C79A sbi 0x18,7
0174 .dbline 107
0174 EE24 clr R14
0176 FF24 clr R15
0178 03C0 rjmp L43
017A L40:
017A .dbline 107
017A L41:
017A .dbline 107
017A C701 movw R24,R14
017C 0196 adiw R24,1
017E 7C01 movw R14,R24
0180 L43:
0180 .dbline 107
0180 E616 cp R14,R22
0182 F706 cpc R15,R23
0184 D0F3 brlo L40
0186 .dbline 108
0186 A895 wdr
0188 .dbline 109
0188 L33:
0188 .dbline 102
0188 C601 movw R24,R12
018A 0196 adiw R24,1
018C 6C01 movw R12,R24
018E L35:
018E .dbline 102
018E C601 movw R24,R12
0190 8431 cpi R24,20
0192 E0E0 ldi R30,0
0194 9E07 cpc R25,R30
0196 18F3 brlo L32
0198 L29:
0198 .dbline 101
0198 4F5F subi R20,255 ; offset = 1
019A 5F4F sbci R21,255
019C L31:
019C .dbline 101
019C 4A15 cp R20,R10
019E 5B05 cpc R21,R11
01A0 D8F2 brlo L28
01A2 .dbline 110
01A2 ; //stop errant interrupts until set up
01A2 ; CLI(); //disable all interrupts
01A2 ; port_init();
01A2 ; watchdog_init();
01A2 C79A sbi 0x18,7
01A4 .dbline -2
01A4 L27:
01A4 00D0 rcall pop_gset5
01A6 .dbline 0 ; func end
01A6 0895 ret
01A8 .dbsym r j 20 i
01A8 .dbsym r j1 12 i
01A8 .dbsym r spfreq 22 i
01A8 .dbsym r k 14 i
01A8 .dbsym r tone 20 i
01A8 .dbsym r soundlong 10 i
01A8 .dbend
01A8 .dbfunc e delay _delay fV
01A8 ; i2 -> R20,R21
01A8 ; n -> R22,R23
.even
01A8 _delay::
01A8 00D0 rcall push_gset2
01AA B801 movw R22,R16
01AC .dbline -1
01AC .dbline 116
01AC ; timer1_init();
01AC ; adc_init();
01AC ;
01AC ; MCUCR = 0x00;
01AC ; GICR = 0x00;
01AC ; TIMSK = 0x04; //timer interrupt sources
01AC .dbline 117
01AC ; SEI(); //re-enable interrupts
01AC 4427 clr R20
01AE 5527 clr R21
01B0 04C0 rjmp L46
01B2 L45:
01B2 .dbline 119
01B2 .dbline 120
01B2 74DF rcall _A
01B4 .dbline 120
01B4 4F5F subi R20,255 ; offset = 1
01B6 5F4F sbci R21,255
01B8 .dbline 120
01B8 A895 wdr
01BA .dbline 121
01BA L46:
01BA .dbline 118
01BA ; //all peripherals are now initialized
01BA 4617 cp R20,R22
01BC 5707 cpc R21,R23
01BE C8F3 brlo L45
01C0 .dbline -2
01C0 L44:
01C0 00D0 rcall pop_gset2
01C2 .dbline 0 ; func end
01C2 0895 ret
01C4 .dbsym r i2 20 i
01C4 .dbsym r n 22 i
01C4 .dbend
01C4 .dbfunc e show _show fV
01C4 ; i -> R20
01C4 ; dat -> R22,R23
01C4 ; n -> R10
.even
01C4 _show::
01C4 00D0 rcall push_gset3
01C6 B901 movw R22,R18
01C8 A02E mov R10,R16
01CA .dbline -1
01CA .dbline 126
01CA ; }
01CA ;
01CA ;
01CA ;
01CA ;
01CA ;
01CA ; #pragma interrupt_handler timer1_ovf_isr:14
01CA ; void timer1_ovf_isr(void)
01CA .dbline 128
01CA 4427 clr R20
01CC 11C0 rjmp L52
01CE L49:
01CE .dbline 128
01CE .dbline 129
01CE 2AE0 ldi R18,10
01D0 30E0 ldi R19,0
01D2 8B01 movw R16,R22
01D4 00D0 rcall mod16u
01D6 80E0 ldi R24,<_tm
01D8 90E0 ldi R25,>_tm
01DA E42F mov R30,R20
01DC FF27 clr R31
01DE E80F add R30,R24
01E0 F91F adc R31,R25
01E2 0083 std z+0,R16
01E4 .dbline 130
01E4 2AE0 ldi R18,10
01E6 30E0 ldi R19,0
01E8 8B01 movw R16,R22
01EA 00D0 rcall div16u
01EC B801 movw R22,R16
01EE .dbline 131
01EE L50:
01EE .dbline 128
01EE 4395 inc R20
01F0 L52:
01F0 .dbline 128
01F0 ; {
01F0 ;
01F0 4430 cpi R20,4
01F2 68F3 brlo L49
01F4 .dbline 132
01F4 ; t++;
01F4 ; dp=~dp;
01F4 ; if(t==2)
01F4 ; {
01F4 43E0 ldi R20,3
01F6 09C0 rjmp L54
01F8 L53:
01F8 .dbline 133
01F8 .dbline 134
01F8 80E0 ldi R24,<_tm
01FA 90E0 ldi R25,>_tm
01FC E42F mov R30,R20
01FE FF27 clr R31
0200 E80F add R30,R24
0202 F91F adc R31,R25
0204 8BE0 ldi R24,11
0206 8083 std z+0,R24
0208 .dbline 135
0208 4A95 dec R20
020A .dbline 136
020A L54:
020A .dbline 133
020A ; t=0;s++;s1++;
020A 80E0 ldi R24,<_tm
020C 90E0 ldi R25,>_tm
020E E42F mov R30,R20
0210 FF27 clr R31
0212 E80F add R30,R24
0214 F91F adc R31,R25
0216 2080 ldd R2,z+0
0218 2220 tst R2
021A 19F4 brne L56
021C 2224 clr R2
021E 2416 cp R2,R20
0220 58F3 brlo L53
0222 L56:
0222 .dbline 137
0222 ; if(s==60)
0222 ; {
0222 ; date[2]++;m1++;s=0;
0222 ; EEPROMwrite(23,date[2]);
0222 A0920F00 sts _tm+3,R10
0226 .dbline 138
0226 ; if(date[2]>59)
0226 3ADF rcall _A
0228 .dbline -2
0228 L48:
0228 00D0 rcall pop_gset3
022A .dbline 0 ; func end
022A 0895 ret
022C .dbsym r i 20 c
022C .dbsym r dat 22 i
022C .dbsym r n 10 c
022C .dbend
022C .dbfunc e show4 _show4 fV
022C ; i -> R20
022C ; dat -> R22,R23
.even
022C _show4::
022C 00D0 rcall push_gset2
022E B801 movw R22,R16
0230 .dbline -1
0230 .dbline 144
0230 ; {
0230 ; date[2]=0; date[1]++; bee(500,400);
0230 ; if(date[1]>23) date[1]=0;
0230 ; EEPROMwrite(23,date[2]); EEPROMwrite(21,date[1]);
0230 ; }
0230 ; if((date[1]==date[3])&&(date[2]==date[4])&&(date[0]%2==1))
0230 .dbline 146
0230 4427 clr R20
0232 11C0 rjmp L62
0234 L59:
0234 .dbline 146
0234 .dbline 147
0234 2AE0 ldi R18,10
0236 30E0 ldi R19,0
0238 8B01 movw R16,R22
023A 00D0 rcall mod16u
023C 80E0 ldi R24,<_tm
023E 90E0 ldi R25,>_tm
0240 E42F mov R30,R20
0242 FF27 clr R31
0244 E80F add R30,R24
0246 F91F adc R31,R25
0248 0083 std z+0,R16
024A .dbline 148
024A 2AE0 ldi R18,10
024C 30E0 ldi R19,0
024E 8B01 movw R16,R22
0250 00D0 rcall div16u
0252 B801 movw R22,R16
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -