📄 biaotoum8.lst
字号:
__start:
__text_start:
0022 E5CF LDI R28,0x5F
0023 E0D4 LDI R29,4
0024 BFCD OUT 0x3D,R28
0025 BFDE OUT 0x3E,R29
0026 51C0 SUBI R28,0x10
0027 40D0 SBCI R29,0
0028 EA0A LDI R16,0xAA
0029 8308 STD Y+0,R16
002A 2400 CLR R0
002B E7ED LDI R30,0x7D
002C E0F0 LDI R31,0
002D E010 LDI R17,0
002E 3AED CPI R30,0xAD
002F 07F1 CPC R31,R17
0030 F011 BEQ 0x0033
0031 9201 ST R0,Z+
0032 CFFB RJMP 0x002E
0033 8300 STD Z+0,R16
0034 E2E6 LDI R30,0x26
0035 E0F0 LDI R31,0
0036 E6A0 LDI R26,0x60
0037 E0B0 LDI R27,0
0038 E010 LDI R17,0
0039 34E3 CPI R30,0x43
003A 07F1 CPC R31,R17
003B F021 BEQ 0x0040
003C 95C8 LPM
003D 9631 ADIW R30,1
003E 920D ST R0,X+
003F CFF9 RJMP 0x0039
0040 D37C RCALL _main
_exit:
0041 CFFF RJMP _exit
FILE: D:\ele\AVR\ICC\cp\biaotao\bt.h
(0001) #include <iom8v.h>
(0002) #include <macros.h>
(0003)
(0004) #define uchar unsigned char
(0005) #define unit unsigned int
(0006) #define ulong unsigned long
(0007)
(0008)
(0009)
(0010) #define xtal 8
(0011) #define fosc 8000000 //晶振8MHZ
(0012) #define baud 9600 //波特率
(0013)
(0014) #define d10 PORTD&=~0X40
(0015) #define d11 PORTD|=0X40
(0016) #define d20 PORTD&=~0X80
(0017) #define d21 PORTD|=0X80
(0018) #define d30 PORTB&=~0X20
(0019) #define d31 PORTB|=0X20
(0020) #define d40 PORTC&=~0X02
(0021) #define d41 PORTC|=0X02
(0022) #define d50 PORTC&=~0X04
(0023) #define d51 PORTC|=0X04
(0024) #define d60 PORTD&=~0X10
(0025) #define d61 PORTD|=0X10
(0026) #define d70 PORTD&=~0X08
(0027) #define d71 PORTD|=0X08
(0028) #define d80 PORTB&=~0X10
(0029) #define d81 PORTB|=0X10
(0030)
(0031) #define a10 PORTB&=~0X04
(0032) #define a11 PORTB|=0X04
(0033) #define a20 PORTB&=~0X08
(0034) #define a21 PORTB|=0X08
(0035) #define a30 PORTC&=~0X01
(0036) #define a31 PORTC|=0X01
(0037) #define a40 PORTC&=~0X08
(0038) #define a41 PORTC|=0X08
(0039)
(0040) #define out0 PORTD&=~0X02
(0041) #define out1 PORTD|=0X02
(0042)
(0043) #define be0 PORTB&=~0X40
(0044) #define be1 PORTB|=0X80
(0045)
(0046) #define Set ((PIND&0X04)==0x04) //key
(0047) #define Add ((PIND&0X02)==0x02)
(0048) #define Sub ((PIND&0X01)==0x01)
(0049) #define Store (1)
(0050)
(0051) uchar shu[12]={0xc0,0xf9,0xa4,0xb0,0x99,0x92,0x82,0xf8,0x80,0x90,0xbf,0xff};
(0052) uchar tm[4]={11,11,11,11};
(0053)
(0054) void port_init(void)
(0055) {
(0056) PORTB = 0x30;
_port_init:
0042 E380 LDI R24,0x30
0043 BB88 OUT 0x18,R24
(0057) DDRB = 0x3C;
0044 E38C LDI R24,0x3C
0045 BB87 OUT 0x17,R24
(0058) PORTC = 0x06; //m103 output only
0046 E086 LDI R24,6
0047 BB85 OUT 0x15,R24
(0059) DDRC = 0x0F;
0048 E08F LDI R24,0xF
0049 BB84 OUT 0x14,R24
(0060) PORTD = 0xDf;
004A ED8F LDI R24,0xDF
004B BB82 OUT 0x12,R24
(0061) DDRD = 0xD8;
004C ED88 LDI R24,0xD8
004D BB81 OUT 0x11,R24
004E 9508 RET
(0062) }
(0063)
(0064) void DAT(uchar x)
(0065) {
(0066) if((x&0x01)==0x01) d11;else d10;
_DAT:
x --> R16
004F 2F80 MOV R24,R16
0050 7081 ANDI R24,1
0051 3081 CPI R24,1
0052 F411 BNE 0x0055
0053 9A96 SBI 0x12,6
0054 C001 RJMP 0x0056
0055 9896 CBI 0x12,6
(0067) if((x&0x02)==0x02) d21;else d20;
0056 2F80 MOV R24,R16
0057 7082 ANDI R24,2
0058 3082 CPI R24,2
0059 F411 BNE 0x005C
005A 9A97 SBI 0x12,7
005B C001 RJMP 0x005D
005C 9897 CBI 0x12,7
(0068) if((x&0x04)==0x04) d31;else d30;
005D 2F80 MOV R24,R16
005E 7084 ANDI R24,4
005F 3084 CPI R24,4
0060 F411 BNE 0x0063
0061 9AC5 SBI 0x18,5
0062 C001 RJMP 0x0064
0063 98C5 CBI 0x18,5
(0069) if((x&0x08)==0x08) d41;else d40;
0064 2F80 MOV R24,R16
0065 7088 ANDI R24,0x8
0066 3088 CPI R24,0x8
0067 F411 BNE 0x006A
0068 9AA9 SBI 0x15,1
0069 C001 RJMP 0x006B
006A 98A9 CBI 0x15,1
(0070) if((x&0x10)==0x10) d51;else d50;
006B 2F80 MOV R24,R16
006C 7180 ANDI R24,0x10
006D 3180 CPI R24,0x10
006E F411 BNE 0x0071
006F 9AAA SBI 0x15,2
0070 C001 RJMP 0x0072
0071 98AA CBI 0x15,2
(0071) if((x&0x20)==0x20) d61;else d60;
0072 2F80 MOV R24,R16
0073 7280 ANDI R24,0x20
0074 3280 CPI R24,0x20
0075 F411 BNE 0x0078
0076 9A94 SBI 0x12,4
0077 C001 RJMP 0x0079
0078 9894 CBI 0x12,4
(0072) if((x&0x40)==0x40) d71;else d70;
0079 2F80 MOV R24,R16
007A 7480 ANDI R24,0x40
007B 3480 CPI R24,0x40
007C F411 BNE 0x007F
007D 9A93 SBI 0x12,3
007E C001 RJMP 0x0080
007F 9893 CBI 0x12,3
(0073) if((x&0x80)==0x80) d81;else d80;
0080 2F80 MOV R24,R16
0081 7880 ANDI R24,0x80
0082 3880 CPI R24,0x80
0083 F411 BNE 0x0086
0084 9AC4 SBI 0x18,4
0085 C001 RJMP 0x0087
0086 98C4 CBI 0x18,4
0087 9508 RET
(0074) }
(0075)
(0076)
(0077) /* 微秒级延时程序 */
(0078) void del(int time)
(0079) {
(0080) do
(0081) {
(0082) time--;
_del:
time --> R16
0088 5001 SUBI R16,1
0089 4010 SBCI R17,0
(0083) }
(0084) while (time>1);
008A E081 LDI R24,1
008B E090 LDI R25,0
008C 1780 CP R24,R16
008D 0791 CPC R25,R17
008E F3CC BLT 0x0088
008F 9508 RET
(0085) }
(0086)
(0087)
(0088) void A(void) ///*********
(0089) {
(0090) a11;DAT(shu[tm[0]]);del(225);a10;DAT(0xff);del(5);WDR();
_A:
0090 9AC2 SBI 0x18,2
0091 E680 LDI R24,0x60
0092 E090 LDI R25,0
0093 91E0006C LDS R30,tm
0095 27FF CLR R31
0096 0FE8 ADD R30,R24
0097 1FF9 ADC R31,R25
0098 8100 LDD R16,Z+0
0099 DFB5 RCALL _DAT
009A EE01 LDI R16,0xE1
009B E010 LDI R17,0
009C DFEB RCALL _del
009D 98C2 CBI 0x18,2
009E EF0F LDI R16,0xFF
009F DFAF RCALL _DAT
00A0 E005 LDI R16,5
00A1 E010 LDI R17,0
00A2 DFE5 RCALL _del
00A3 95A8 WDR
(0091) a21;DAT(shu[tm[1]]);del(226);a20;DAT(0xff);del(5);WDR();
00A4 9AC3 SBI 0x18,3
00A5 E680 LDI R24,0x60
00A6 E090 LDI R25,0
00A7 91E0006D LDS R30,tm+1
00A9 27FF CLR R31
00AA 0FE8 ADD R30,R24
00AB 1FF9 ADC R31,R25
00AC 8100 LDD R16,Z+0
00AD DFA1 RCALL _DAT
00AE EE02 LDI R16,0xE2
00AF E010 LDI R17,0
00B0 DFD7 RCALL _del
00B1 98C3 CBI 0x18,3
00B2 EF0F LDI R16,0xFF
00B3 DF9B RCALL _DAT
00B4 E005 LDI R16,5
00B5 E010 LDI R17,0
00B6 DFD1 RCALL _del
00B7 95A8 WDR
(0092) a31;DAT(shu[tm[2]]);del(225);a30;DAT(0xff);del(5);WDR();
00B8 9AA8 SBI 0x15,0
00B9 E680 LDI R24,0x60
00BA E090 LDI R25,0
00BB 91E0006E LDS R30,tm+2
00BD 27FF CLR R31
00BE 0FE8 ADD R30,R24
00BF 1FF9 ADC R31,R25
00C0 8100 LDD R16,Z+0
00C1 DF8D RCALL _DAT
00C2 EE01 LDI R16,0xE1
00C3 E010 LDI R17,0
00C4 DFC3 RCALL _del
00C5 98A8 CBI 0x15,0
00C6 EF0F LDI R16,0xFF
00C7 DF87 RCALL _DAT
00C8 E005 LDI R16,5
00C9 E010 LDI R17,0
00CA DFBD RCALL _del
00CB 95A8 WDR
(0093) a41;DAT(shu[tm[3]]);del(226);a40;DAT(0xff);del(5);WDR();
00CC 9AAB SBI 0x15,3
00CD E680 LDI R24,0x60
00CE E090 LDI R25,0
00CF 91E0006F LDS R30,tm+3
00D1 27FF CLR R31
00D2 0FE8 ADD R30,R24
00D3 1FF9 ADC R31,R25
00D4 8100 LDD R16,Z+0
00D5 DF79 RCALL _DAT
00D6 EE02 LDI R16,0xE2
00D7 E010 LDI R17,0
00D8 DFAF RCALL _del
00D9 98AB CBI 0x15,3
00DA EF0F LDI R16,0xFF
00DB DF73 RCALL _DAT
00DC E005 LDI R16,5
00DD E010 LDI R17,0
00DE DFA9 RCALL _del
00DF 95A8 WDR
00E0 9508 RET
_bee:
j --> R20
j1 --> R12
spfreq --> R22
k --> R14
tone --> R20
soundlong --> R10
00E1 D4EB RCALL push_gset5
00E2 01A9 MOVW R20,R18
00E3 0158 MOVW R10,R16
(0094) }
(0095)
(0096)
(0097) void bee(unit soundlong,unit tone)
(0098) {
(0099) unit spfreq,j,j1,k;
(0100) spfreq=(15000/tone)/2;
00E4 E908 LDI R16,0x98
00E5 E31A LDI R17,0x3A
00E6 019A MOVW R18,R20
00E7 D43A RCALL div16u
00E8 01B8 MOVW R22,R16
00E9 9576 LSR R23
00EA 9567 ROR R22
(0101) for(j=0;j<soundlong;j++)
00EB 2744 CLR R20
00EC 2755 CLR R21
00ED C022 RJMP 0x0110
(0102) for(j1=0;j1<20;j1++)
00EE 24CC CLR R12
00EF 24DD CLR R13
00F0 C018 RJMP 0x0109
(0103) {
(0104) be0;
00F1 98C6 CBI 0x18,6
(0105) for(k=0;k<spfreq;k++);
00F2 24EE CLR R14
00F3 24FF CLR R15
00F4 C003 RJMP 0x00F8
00F5 01C7 MOVW R24,R14
00F6 9601 ADIW R24,1
00F7 017C MOVW R14,R24
00F8 16E6 CP R14,R22
00F9 06F7 CPC R15,R23
00FA F3D0 BCS 0x00F5
(0106) be1;
00FB 9AC7 SBI 0x18,7
(0107) for(k=0;k<spfreq;k++);
00FC 24EE CLR R14
00FD 24FF CLR R15
00FE C003 RJMP 0x0102
00FF 01C7 MOVW R24,R14
0100 9601 ADIW R24,1
0101 017C MOVW R14,R24
0102 16E6 CP R14,R22
0103 06F7 CPC R15,R23
0104 F3D0 BCS 0x00FF
(0108) WDR();
0105 95A8 WDR
0106 01C6 MOVW R24,R12
0107 9601 ADIW R24,1
0108 016C MOVW R12,R24
0109 01C6 MOVW R24,R12
010A 3184 CPI R24,0x14
010B E0E0 LDI R30,0
010C 079E CPC R25,R30
010D F318 BCS 0x00F1
010E 5F4F SUBI R20,0xFF
010F 4F5F SBCI R21,0xFF
0110 154A CP R20,R10
0111 055B CPC R21,R11
0112 F2D8 BCS 0x00EE
(0109) }
(0110) be1;
0113 9AC7 SBI 0x18,7
0114 D4B6 RCALL pop_gset5
0115 9508 RET
_delay:
i2 --> R20
n --> R22
0116 D4BC RCALL push_gset2
0117 01B8 MOVW R22,R16
(0111) }
(0112)
(0113)
(0114)
(0115) void delay(unsigned int n)
(0116) {
(0117) unsigned int i2=0;
0118 2744 CLR R20
0119 2755 CLR R21
011A C004 RJMP 0x011F
(0118) while(i2<n)
(0119) {
(0120) A();i2++;WDR();
011B DF74 RCALL _A
011C 5F4F SUBI R20,0xFF
011D 4F5F SBCI R21,0xFF
011E 95A8 WDR
011F 1746 CP R20,R22
0120 0757 CPC R21,R23
0121 F3C8 BCS 0x011B
0122 D4A2 RCALL pop_gset2
0123 9508 RET
_show:
i --> R20
dat --> R22
n --> R10
0124 D4AC RCALL push_gset3
0125 01B9 MOVW R22,R18
0126 2EA0 MOV R10,R16
(0121) }
(0122) }
(0123)
(0124)
(0125) void show(uchar n,unit dat)
(0126) {
(0127) uchar i;
(0128) for(i=0;i<4;i++){
0127 2744 CLR R20
0128 C011 RJMP 0x013A
(0129) tm[i]=dat%10;
0129 E02A LDI R18,0xA
012A E030 LDI R19,0
012B 018B MOVW R16,R22
012C D3F3 RCALL mod16u
012D E68C LDI R24,0x6C
012E E090 LDI R25,0
012F 2FE4 MOV R30,R20
0130 27FF CLR R31
0131 0FE8 ADD R30,R24
0132 1FF9 ADC R31,R25
0133 8300 STD Z+0,R16
(0130) dat/=10;
0134 E02A LDI R18,0xA
0135 E030 LDI R19,0
0136 018B MOVW R16,R22
0137 D3EA RCALL div16u
0138 01B8 MOVW R22,R16
0139 9543 INC R20
013A 3044 CPI R20,4
013B F368 BCS 0x0129
(0131) }
(0132) i=3;
013C E043 LDI R20,3
013D C009 RJMP 0x0147
(0133) while(tm[i]==0&&i>0){
(0134) tm[i]=11;
013E E68C LDI R24,0x6C
013F E090 LDI R25,0
0140 2FE4 MOV R30,R20
0141 27FF CLR R31
0142 0FE8 ADD R30,R24
0143 1FF9 ADC R31,R25
0144 E08B LDI R24,0xB
0145 8380 STD Z+0,R24
(0135) i--;
0146 954A DEC R20
0147 E68C LDI R24,0x6C
0148 E090 LDI R25,0
0149 2FE4 MOV R30,R20
014A 27FF CLR R31
014B 0FE8 ADD R30,R24
014C 1FF9 ADC R31,R25
014D 8020 LDD R2,Z+0
014E 2022 TST R2
014F F419 BNE 0x0153
0150 2422 CLR R2
0151 1624 CP R2,R20
0152 F358 BCS 0x013E
(0136) }
(0137) tm[3]=n;
0153 92A0006F STS tm+3,R10
(0138) A();
0155 DF3A RCALL _A
0156 D470 RCALL pop_gset3
0157 9508 RET
_show4:
i --> R20
dat --> R22
0158 D47A RCALL push_gset2
0159 01B8 MOVW R22,R16
(0139) }
(0140)
(0141)
(0142)
(0143) void show4(unit dat)
(0144) {
(0145) uchar i;
(0146) for(i=0;i<4;i++){
015A 2744 CLR R20
015B C011 RJMP 0x016D
(0147) tm[i]=dat%10;
015C E02A LDI R18,0xA
015D E030 LDI R19,0
015E 018B MOVW R16,R22
015F D3C0 RCALL mod16u
0160 E68C LDI R24,0x6C
0161 E090 LDI R25,0
0162 2FE4 MOV R30,R20
0163 27FF CLR R31
0164 0FE8 ADD R30,R24
0165 1FF9 ADC R31,R25
0166 8300 STD Z+0,R16
(0148) dat/=10;
0167 E02A LDI R18,0xA
0168 E030 LDI R19,0
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