⭐ 欢迎来到虫虫下载站! | 📦 资源下载 📁 资源专辑 ℹ️ 关于我们
⭐ 虫虫下载站

📄 biaotoum48.lst

📁 AVR ICC基于AVR单片机的LED显示程序!
💻 LST
📖 第 1 页 / 共 3 页
字号:
__text_start:
__start:
    0036 EFCF      LDI	R28,0xFF
    0037 E0D2      LDI	R29,2
    0038 BFCD      OUT	0x3D,R28
    0039 BFDE      OUT	0x3E,R29
    003A 51C0      SUBI	R28,0x10
    003B 40D0      SBCI	R29,0
    003C EA0A      LDI	R16,0xAA
    003D 8308      STD	Y+0,R16
    003E 2400      CLR	R0
    003F E1E0      LDI	R30,0x10
    0040 E0F1      LDI	R31,1
    0041 E011      LDI	R17,1
    0042 33E2      CPI	R30,0x32
    0043 07F1      CPC	R31,R17
    0044 F011      BEQ	0x0047
    0045 9201      ST	R0,Z+
    0046 CFFB      RJMP	0x0042
    0047 8300      STD	Z+0,R16
    0048 E5EC      LDI	R30,0x5C
    0049 E0F0      LDI	R31,0
    004A E0A0      LDI	R26,0
    004B E0B1      LDI	R27,1
    004C E010      LDI	R17,0
    004D 36EC      CPI	R30,0x6C
    004E 07F1      CPC	R31,R17
    004F F021      BEQ	0x0054
    0050 95C8      LPM
    0051 9631      ADIW	R30,1
    0052 920D      ST	R0,X+
    0053 CFF9      RJMP	0x004D
    0054 D28C      RCALL	_main
_exit:
    0055 CFFF      RJMP	_exit
FILE: D:\ele\AVR\ICC\biaotao\biaotouM48\bt.h
(0001) #include <iom48v.h>
(0002) #include <macros.h>
(0003) 
(0004) #define uchar unsigned char
(0005) #define unit unsigned int
(0006) #define ulong unsigned long
(0007) 
(0008) 
(0009) 
(0010) #define xtal 8 
(0011) #define fosc 8000000 //晶振8MHZ
(0012) #define baud 9600	 //波特率
(0013) 
(0014) #define d10 PORTD&=~0X40
(0015) #define d11 PORTD|=0X40
(0016) #define d20 PORTD&=~0X80
(0017) #define d21 PORTD|=0X80
(0018) #define d30 PORTB&=~0X20
(0019) #define d31 PORTB|=0X20
(0020) #define d40 PORTC&=~0X02
(0021) #define d41 PORTC|=0X02
(0022) #define d50 PORTC&=~0X04
(0023) #define d51 PORTC|=0X04
(0024) #define d60 PORTD&=~0X10
(0025) #define d61 PORTD|=0X10
(0026) #define d70 PORTD&=~0X08
(0027) #define d71 PORTD|=0X08
(0028) #define d80 PORTB&=~0X10
(0029) #define d81 PORTB|=0X10
(0030) 
(0031) #define a10 PORTB&=~0X04
(0032) #define a11 PORTB|=0X04
(0033) #define a20 PORTB&=~0X08
(0034) #define a21 PORTB|=0X08
(0035) #define a30 PORTC&=~0X01
(0036) #define a31 PORTC|=0X01
(0037) #define a40 PORTC&=~0X08
(0038) #define a41 PORTC|=0X08
(0039) 
(0040) #define out0 PORTD&=~0X02
(0041) #define out1 PORTD|=0X02
(0042) 
(0043) #define be0 PORTB&=~0X40
(0044) #define be1 PORTB|=0X80
(0045) 
(0046) #define Set     ((PIND&0X04)==0x04)                          //key
(0047) #define Add     ((PIND&0X02)==0x02)
(0048) #define Sub     ((PIND&0X01)==0x01)  
(0049) #define Store   (1) 
(0050) 
(0051) uchar shu[12]={0xc0,0xf9,0xa4,0xb0,0x99,0x92,0x82,0xf8,0x80,0x90,0xbf,0xff};
(0052) uchar tm[4]={11,11,11,11};
(0053) uchar doudian;
(0054) 
(0055) void port_init(void)
(0056) {
(0057)  PORTB = 0x30;
_port_init:
    0056 E380      LDI	R24,0x30
    0057 B985      OUT	0x05,R24
(0058)  DDRB  = 0x3C;
    0058 E38C      LDI	R24,0x3C
    0059 B984      OUT	0x04,R24
(0059)  PORTC = 0x06; //m103 output only
    005A E086      LDI	R24,6
    005B B988      OUT	0x08,R24
(0060)  DDRC  = 0x0F;
    005C E08F      LDI	R24,0xF
    005D B987      OUT	0x07,R24
(0061)  PORTD = 0xDf;
    005E ED8F      LDI	R24,0xDF
    005F B98B      OUT	0x0B,R24
(0062)  DDRD  = 0xD8;
    0060 ED88      LDI	R24,0xD8
    0061 B98A      OUT	0x0A,R24
    0062 9508      RET
(0063) }
(0064) 
(0065) void DAT(uchar x)
(0066) {
(0067) if((x&0x01)==0x01) d11;else d10;
_DAT:
  x                    --> R16
    0063 2F80      MOV	R24,R16
    0064 7081      ANDI	R24,1
    0065 3081      CPI	R24,1
    0066 F411      BNE	0x0069
    0067 9A5E      SBI	0x0B,6
    0068 C001      RJMP	0x006A
    0069 985E      CBI	0x0B,6
(0068) if((x&0x02)==0x02) d21;else d20;
    006A 2F80      MOV	R24,R16
    006B 7082      ANDI	R24,2
    006C 3082      CPI	R24,2
    006D F411      BNE	0x0070
    006E 9A5F      SBI	0x0B,7
    006F C001      RJMP	0x0071
    0070 985F      CBI	0x0B,7
(0069) if((x&0x04)==0x04) d31;else d30;
    0071 2F80      MOV	R24,R16
    0072 7084      ANDI	R24,4
    0073 3084      CPI	R24,4
    0074 F411      BNE	0x0077
    0075 9A2D      SBI	0x05,5
    0076 C001      RJMP	0x0078
    0077 982D      CBI	0x05,5
(0070) if((x&0x08)==0x08) d41;else d40;
    0078 2F80      MOV	R24,R16
    0079 7088      ANDI	R24,0x8
    007A 3088      CPI	R24,0x8
    007B F411      BNE	0x007E
    007C 9A41      SBI	0x08,1
    007D C001      RJMP	0x007F
    007E 9841      CBI	0x08,1
(0071) if((x&0x10)==0x10) d51;else d50;
    007F 2F80      MOV	R24,R16
    0080 7180      ANDI	R24,0x10
    0081 3180      CPI	R24,0x10
    0082 F411      BNE	0x0085
    0083 9A42      SBI	0x08,2
    0084 C001      RJMP	0x0086
    0085 9842      CBI	0x08,2
(0072) if((x&0x20)==0x20) d61;else d60;
    0086 2F80      MOV	R24,R16
    0087 7280      ANDI	R24,0x20
    0088 3280      CPI	R24,0x20
    0089 F411      BNE	0x008C
    008A 9A5C      SBI	0x0B,4
    008B C001      RJMP	0x008D
    008C 985C      CBI	0x0B,4
(0073) if((x&0x40)==0x40) d71;else d70;
    008D 2F80      MOV	R24,R16
    008E 7480      ANDI	R24,0x40
    008F 3480      CPI	R24,0x40
    0090 F411      BNE	0x0093
    0091 9A5B      SBI	0x0B,3
    0092 C001      RJMP	0x0094
    0093 985B      CBI	0x0B,3
(0074) if((x&0x80)==0x80) d81;else d80;
    0094 2F80      MOV	R24,R16
    0095 7880      ANDI	R24,0x80
    0096 3880      CPI	R24,0x80
    0097 F411      BNE	0x009A
    0098 9A2C      SBI	0x05,4
    0099 C001      RJMP	0x009B
    009A 982C      CBI	0x05,4
    009B 9508      RET
(0075) }
(0076) 
(0077) 
(0078) /*		微秒级延时程序		*/
(0079) void del(int time)
(0080) 	 {     
(0081)   	  do
(0082) 	  	{
(0083) 		 time--;
_del:
  time                 --> R16
    009C 5001      SUBI	R16,1
    009D 4010      SBCI	R17,0
(0084) 		}	
(0085)   	  while (time>1);
    009E E081      LDI	R24,1
    009F E090      LDI	R25,0
    00A0 1780      CP	R24,R16
    00A1 0791      CPC	R25,R17
    00A2 F3CC      BLT	0x009C
    00A3 9508      RET
_dot:
  dou                  --> R20
    00A4 D370      RCALL	push_gset1
    00A5 2F40      MOV	R20,R16
(0086) 	 }
(0087) 
(0088) void dot(uchar dou)
(0089) {
(0090) switch(dou)
    00A6 2755      CLR	R21
    00A7 3041      CPI	R20,1
    00A8 E0E0      LDI	R30,0
    00A9 075E      CPC	R21,R30
    00AA F069      BEQ	0x00B8
    00AB 3042      CPI	R20,2
    00AC E0E0      LDI	R30,0
    00AD 075E      CPC	R21,R30
    00AE F0B1      BEQ	0x00C5
    00AF 3043      CPI	R20,3
    00B0 E0E0      LDI	R30,0
    00B1 075E      CPC	R21,R30
    00B2 F0F9      BEQ	0x00D2
    00B3 3044      CPI	R20,4
    00B4 E0E0      LDI	R30,0
    00B5 075E      CPC	R21,R30
    00B6 F141      BEQ	0x00DF
    00B7 C033      RJMP	0x00EB
(0091)  {
(0092)  case 1 :a11;DAT(~0x80);del(226);a10;DAT(0xff);del(5); break;
    00B8 9A2A      SBI	0x05,2
    00B9 E70F      LDI	R16,0x7F
    00BA DFA8      RCALL	_DAT
    00BB EE02      LDI	R16,0xE2
    00BC E010      LDI	R17,0
    00BD DFDE      RCALL	_del
    00BE 982A      CBI	0x05,2
    00BF EF0F      LDI	R16,0xFF
    00C0 DFA2      RCALL	_DAT
    00C1 E005      LDI	R16,5
    00C2 E010      LDI	R17,0
    00C3 DFD8      RCALL	_del
    00C4 C026      RJMP	0x00EB
(0093)  case 2 :a21;DAT(~0x80);del(226);a20;DAT(0xff);del(5); break;
    00C5 9A2B      SBI	0x05,3
    00C6 E70F      LDI	R16,0x7F
    00C7 DF9B      RCALL	_DAT
    00C8 EE02      LDI	R16,0xE2
    00C9 E010      LDI	R17,0
    00CA DFD1      RCALL	_del
    00CB 982B      CBI	0x05,3
    00CC EF0F      LDI	R16,0xFF
    00CD DF95      RCALL	_DAT
    00CE E005      LDI	R16,5
    00CF E010      LDI	R17,0
    00D0 DFCB      RCALL	_del
    00D1 C019      RJMP	0x00EB
(0094)  case 3 :a31;DAT(~0x80);del(226);a30;DAT(0xff);del(5);  break;
    00D2 9A40      SBI	0x08,0
    00D3 E70F      LDI	R16,0x7F
    00D4 DF8E      RCALL	_DAT
    00D5 EE02      LDI	R16,0xE2
    00D6 E010      LDI	R17,0
    00D7 DFC4      RCALL	_del
    00D8 9840      CBI	0x08,0
    00D9 EF0F      LDI	R16,0xFF
    00DA DF88      RCALL	_DAT
    00DB E005      LDI	R16,5
    00DC E010      LDI	R17,0
    00DD DFBE      RCALL	_del
    00DE C00C      RJMP	0x00EB
(0095)  case 4 :a41;DAT(~0x80);del(226);a40;DAT(0xff);del(5);  break;
    00DF 9A43      SBI	0x08,3
    00E0 E70F      LDI	R16,0x7F
    00E1 DF81      RCALL	_DAT
    00E2 EE02      LDI	R16,0xE2
    00E3 E010      LDI	R17,0
    00E4 DFB7      RCALL	_del
    00E5 9843      CBI	0x08,3
    00E6 EF0F      LDI	R16,0xFF
    00E7 DF7B      RCALL	_DAT
    00E8 E005      LDI	R16,5
    00E9 E010      LDI	R17,0
    00EA DFB1      RCALL	_del
    00EB D32C      RCALL	pop_gset1
    00EC 9508      RET
(0096)  }
(0097) }
(0098)  
(0099) void A()           ///*********
(0100) {
(0101) a11;DAT(shu[tm[0]]);del(180);a10;DAT(0xff);del(5);WDR();
_A:
    00ED 9A2A      SBI	0x05,2
    00EE E080      LDI	R24,0
    00EF E091      LDI	R25,1
    00F0 91E0010C  LDS	R30,tm
    00F2 27FF      CLR	R31
    00F3 0FE8      ADD	R30,R24
    00F4 1FF9      ADC	R31,R25
    00F5 8100      LDD	R16,Z+0
    00F6 DF6C      RCALL	_DAT
    00F7 EB04      LDI	R16,0xB4
    00F8 E010      LDI	R17,0
    00F9 DFA2      RCALL	_del
    00FA 982A      CBI	0x05,2
    00FB EF0F      LDI	R16,0xFF
    00FC DF66      RCALL	_DAT
    00FD E005      LDI	R16,5
    00FE E010      LDI	R17,0
    00FF DF9C      RCALL	_del
    0100 95A8      WDR
(0102) a21;DAT(shu[tm[1]]);del(180);a20;DAT(0xff);del(5);WDR(); 
    0101 9A2B      SBI	0x05,3
    0102 E080      LDI	R24,0
    0103 E091      LDI	R25,1
    0104 91E0010D  LDS	R30,tm+1
    0106 27FF      CLR	R31
    0107 0FE8      ADD	R30,R24
    0108 1FF9      ADC	R31,R25
    0109 8100      LDD	R16,Z+0
    010A DF58      RCALL	_DAT
    010B EB04      LDI	R16,0xB4
    010C E010      LDI	R17,0
    010D DF8E      RCALL	_del
    010E 982B      CBI	0x05,3
    010F EF0F      LDI	R16,0xFF
    0110 DF52      RCALL	_DAT
    0111 E005      LDI	R16,5
    0112 E010      LDI	R17,0
    0113 DF88      RCALL	_del
    0114 95A8      WDR
(0103) a31;DAT(shu[tm[2]]);del(180);a30;DAT(0xff);del(5);WDR();
    0115 9A40      SBI	0x08,0
    0116 E080      LDI	R24,0
    0117 E091      LDI	R25,1
    0118 91E0010E  LDS	R30,tm+2
    011A 27FF      CLR	R31
    011B 0FE8      ADD	R30,R24
    011C 1FF9      ADC	R31,R25
    011D 8100      LDD	R16,Z+0
    011E DF44      RCALL	_DAT
    011F EB04      LDI	R16,0xB4
    0120 E010      LDI	R17,0
    0121 DF7A      RCALL	_del
    0122 9840      CBI	0x08,0
    0123 EF0F      LDI	R16,0xFF
    0124 DF3E      RCALL	_DAT
    0125 E005      LDI	R16,5
    0126 E010      LDI	R17,0
    0127 DF74      RCALL	_del
    0128 95A8      WDR
(0104) a41;DAT(shu[tm[3]]);del(180);a40;DAT(0xff);del(5);WDR();
    0129 9A43      SBI	0x08,3
    012A E080      LDI	R24,0
    012B E091      LDI	R25,1
    012C 91E0010F  LDS	R30,tm+3
    012E 27FF      CLR	R31
    012F 0FE8      ADD	R30,R24
    0130 1FF9      ADC	R31,R25
    0131 8100      LDD	R16,Z+0
    0132 DF30      RCALL	_DAT
    0133 EB04      LDI	R16,0xB4
    0134 E010      LDI	R17,0
    0135 DF66      RCALL	_del
    0136 9843      CBI	0x08,3
    0137 EF0F      LDI	R16,0xFF
    0138 DF2A      RCALL	_DAT
    0139 E005      LDI	R16,5
    013A E010      LDI	R17,0
    013B DF60      RCALL	_del
    013C 95A8      WDR
(0105) dot(doudian);
    013D 91000131  LDS	R16,doudian
    013F DF64      RCALL	_dot
    0140 9508      RET
_bee:
  j                    --> R20
  j1                   --> R12
  spfreq               --> R22
  k                    --> R14
  tone                 --> R20
  soundlong            --> R10
    0141 D2CB      RCALL	push_gset5
    0142 01A9      MOVW	R20,R18
    0143 0158      MOVW	R10,R16
(0106) }
(0107) 
(0108) void bee(unit soundlong,unit tone)
(0109) {
(0110) unit spfreq,j,j1,k;
(0111) spfreq=(15000/tone)/2;
    0144 E908      LDI	R16,0x98
    0145 E31A      LDI	R17,0x3A
    0146 019A      MOVW	R18,R20
    0147 D1F6      RCALL	div16u
    0148 01B8      MOVW	R22,R16
    0149 9576      LSR	R23
    014A 9567      ROR	R22
(0112) for(j=0;j<soundlong;j++)
    014B 2744      CLR	R20
    014C 2755      CLR	R21
    014D C022      RJMP	0x0170
(0113)  for(j1=0;j1<20;j1++)
    014E 24CC      CLR	R12
    014F 24DD      CLR	R13
    0150 C018      RJMP	0x0169
(0114)  {
(0115)  be0;
    0151 982E      CBI	0x05,6
(0116)  for(k=0;k<spfreq;k++);
    0152 24EE      CLR	R14
    0153 24FF      CLR	R15
    0154 C003      RJMP	0x0158
    0155 01C7      MOVW	R24,R14
    0156 9601      ADIW	R24,1
    0157 017C      MOVW	R14,R24
    0158 16E6      CP	R14,R22
    0159 06F7      CPC	R15,R23
    015A F3D0      BCS	0x0155
(0117)  be1;
    015B 9A2F      SBI	0x05,7
(0118)  for(k=0;k<spfreq;k++);
    015C 24EE      CLR	R14
    015D 24FF      CLR	R15
    015E C003      RJMP	0x0162
    015F 01C7      MOVW	R24,R14
    0160 9601      ADIW	R24,1
    0161 017C      MOVW	R14,R24
    0162 16E6      CP	R14,R22
    0163 06F7      CPC	R15,R23
    0164 F3D0      BCS	0x015F
(0119)  WDR();
    0165 95A8      WDR
    0166 01C6      MOVW	R24,R12
    0167 9601      ADIW	R24,1
    0168 016C      MOVW	R12,R24
    0169 01C6      MOVW	R24,R12
    016A 3184      CPI	R24,0x14
    016B E0E0      LDI	R30,0
    016C 079E      CPC	R25,R30
    016D F318      BCS	0x0151
    016E 5F4F      SUBI	R20,0xFF
    016F 4F5F      SBCI	R21,0xFF
    0170 154A      CP	R20,R10
    0171 055B      CPC	R21,R11
    0172 F2D8      BCS	0x014E
(0120)  }
(0121)  be1;
    0173 9A2F      SBI	0x05,7
    0174 D296      RCALL	pop_gset5
    0175 9508      RET
_delay:
  i2                   --> R20
  n                    --> R22
    0176 D29C      RCALL	push_gset2
    0177 01B8      MOVW	R22,R16
(0122) }
(0123) 
(0124) 
(0125) 
(0126) void delay(unsigned int n)
(0127) {
(0128)  unsigned int i2=0;
    0178 2744      CLR	R20
    0179 2755      CLR	R21
    017A C004      RJMP	0x017F
(0129)    while(i2<n)
(0130)    {
(0131)    A();i2++;WDR();   
    017B DF71      RCALL	_A
    017C 5F4F      SUBI	R20,0xFF
    017D 4F5F      SBCI	R21,0xFF
    017E 95A8      WDR
    017F 1746      CP	R20,R22
    0180 0757      CPC	R21,R23
    0181 F3C8      BCS	0x017B
    0182 D282      RCALL	pop_gset2
    0183 9508      RET
_show:
  i                    --> R20
  dat                  --> R22
  n                    --> R10
    0184 D28C      RCALL	push_gset3
    0185 01B9      MOVW	R22,R18
    0186 2EA0      MOV	R10,R16

⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -