kdf.vhd

来自「maxplus2变得电子钟程序/// /// /////」· VHDL 代码 · 共 16 行

LIBRARY IEEE;
USE IEEE.std_logic_1164.ALL;
ENTITY kdf IS
  PORT(A,B:IN std_logic;
       C,D:OUT std_logic);
END kdf;                ----------D触发器
ARCHITECTURE kdf_arc OF kdf IS
BEGIN
  PROCESS(A)
  BEGIN
    WAIT UNTIL B='1'AND B'EVENT;
    C<=A;
    D<=NOT A;
  END PROCESS;
END kdf_arc;