csl_cachehal.h

Ti C6416 上对FLASH操作得范例程序

* |  L 2 C B A R      |
* |___________________|
*
* L2CBAR - L2 clean base address register
*
* Fields:
* (rw) L2CBAR
*
\******************************************************************************/
#if (L2CACHE_SUPPORT)
  #define _CACHE_L2CBAR_ADDR           0x01844010u

  #define _CACHE_L2CBAR_L2CBAR_MASK    0xFFFFFFFFu
  #define _CACHE_L2CBAR_L2CBAR_SHIFT   0x00000000u
  #define  CACHE_L2CBAR_L2CBAR_DEFAULT 0x00000000u
  #define  CACHE_L2CBAR_L2CBAR_OF(x)   _VALUEOF(x)

  #define  CACHE_L2CBAR_OF(x)          _VALUEOF(x)

  #define CACHE_L2CBAR_DEFAULT (Uint32)( \
     _PER_FDEFAULT(CACHE,L2CBAR,L2CBAR) \
  )

  #define CACHE_L2CBAR_RMK(l2cbar) (Uint32)( \
     _PER_FMK(CACHE,L2CBAR,L2CBAR,l2cbar) \
  )

  #define _CACHE_L2CBAR_FGET(FIELD)\
    _PER_FGET(_CACHE_L2CBAR_ADDR,CACHE,L2CBAR,##FIELD)

  #define _CACHE_L2CBAR_FSET(FIELD,field)\
    _PER_FSET(_CACHE_L2CBAR_ADDR,CACHE,L2CBAR,##FIELD,field)

  #define _CACHE_L2CBAR_FSETS(FIELD,SYM)\
    _PER_FSETS(_CACHE_L2CBAR_ADDR,CACHE,L2CBAR,##FIELD,##SYM)
#endif


/******************************************************************************\
* _____________________
* |                   |
* |  L 2 C W C        |
* |___________________|
*
* L2CWC - L2 clean word count register
*
* Fields:
* (rw) L2CWC
*
\******************************************************************************/
#if (L2CACHE_SUPPORT)
  #define _CACHE_L2CWC_ADDR           0x01844014u

  #define _CACHE_L2CWC_L2CWC_MASK     0x0000FFFFu
  #define _CACHE_L2CWC_L2CWC_SHIFT    0x00000000u
  #define  CACHE_L2CWC_L2CWC_DEFAULT  0x00000000u
  #define  CACHE_L2CWC_L2CWC_OF(x)    _VALUEOF(x)

  #define  CACHE_L2CWC_OF(x)          _VALUEOF(x)

  #define CACHE_L2CWC_DEFAULT (Uint32)( \
     _PER_FDEFAULT(CACHE,L2CWC,L2CWC) \
  )

  #define CACHE_L2CWC_RMK(l2cwc) (Uint32)( \
     _PER_FMK(CACHE,L2CWC,L2CWC,l2cwc) \
  )

  #define _CACHE_L2CWC_FGET(FIELD)\
    _PER_FGET(_CACHE_L2CWC_ADDR,CACHE,L2CWC,##FIELD)

  #define _CACHE_L2CWC_FSET(FIELD,field)\
    _PER_FSET(_CACHE_L2CWC_ADDR,CACHE,L2CWC,##FIELD,field)

  #define _CACHE_L2CWC_FSETS(FIELD,SYM)\
    _PER_FSETS(_CACHE_L2CWC_ADDR,CACHE,L2CWC,##FIELD,##SYM)
#endif


/******************************************************************************\
* _____________________
* |                   |
* |  L 1 P F B A R    |
* |___________________|
*
* L1PFBAR - L1P flush base address register
*
* Fields:
* (rw) L1PFBAR
*
\******************************************************************************/
#if (L2CACHE_SUPPORT)
   #define _CACHE_L1PFBAR_ADDR            0x01844020u

  #define _CACHE_L1PFBAR_L1PFBAR_MASK    0xFFFFFFFFu
  #define _CACHE_L1PFBAR_L1PFBAR_SHIFT   0x00000000u
  #define  CACHE_L1PFBAR_L1PFBAR_DEFAULT 0x00000000u
  #define  CACHE_L1PFBAR_L1PFBAR_OF(x)   _VALUEOF(x)

  #define  CACHE_L1PFBAR_OF(x)           _VALUEOF(x)

  #define CACHE_L1PFBAR_DEFAULT (Uint32)( \
     _PER_FDEFAULT(CACHE,L1PFBAR,L1PFBAR) \
  )

  #define _CACHE_L1PFBAR_FGET(FIELD)\
    _PER_FGET(_CACHE_L1PFBAR_ADDR,CACHE,L1PFBAR,##FIELD)

  #define _CACHE_L1PFBAR_FSET(FIELD,field)\
    _PER_FSET(_CACHE_L1PFBAR_ADDR,CACHE,L1PFBAR,##FIELD,field)

  #define _CACHE_L1PFBAR_FSETS(FIELD,SYM)\
    _PER_FSETS(_CACHE_L1PFBAR_ADDR,CACHE,L1PFBAR,##FIELD,##SYM)
#endif


/******************************************************************************\
* _____________________
* |                   |
* |  L 1 P F W C      |
* |___________________|
*
* L1PFWC - L1P flush word count register
*
* Fields:
* (rw) L1PFWC
*
\******************************************************************************/
#if (L2CACHE_SUPPORT)
  #define _CACHE_L1PFWC_ADDR            0x01844024u

  #define _CACHE_L1PFWC_L1PFWC_MASK     0x0000FFFFu
  #define _CACHE_L1PFWC_L1PFWC_SHIFT    0x00000000u
  #define  CACHE_L1PFWC_L1PFWC_DEFAULT  0x00000000u
  #define  CACHE_L1PFWC_L1PFWC_OF(x)    _VALUEOF(x)

  #define  CACHE_L1PFWC_OF(x)           _VALUEOF(x)

  #define CACHE_L1PFWC_DEFAULT (Uint32)( \
     _PER_FDEFAULT(CACHE,L1PFWC,L1PFWC) \
  )

  #define CACHE_L1PFWC_RMK(l1pfwc) (Uint32)( \
     _PER_FMK(CACHE,L1PFWC,L1PFWC,l1pfwc) \
  )

  #define _CACHE_L1PFWC_FGET(FIELD)\
    _PER_FGET(_CACHE_L1PFWC_ADDR,CACHE,L1PFWC,##FIELD)

  #define _CACHE_L1PFWC_FSET(FIELD,field)\
    _PER_FSET(_CACHE_L1PFWC_ADDR,CACHE,L1PFWC,##FIELD,field)

  #define _CACHE_L1PFWC_FSETS(FIELD,SYM)\
    _PER_FSETS(_CACHE_L1PFWC_ADDR,CACHE,L1PFWC,##FIELD,##SYM)
#endif


/******************************************************************************\
* _____________________
* |                   |
* |  L 1 D F B A R    |
* |___________________|
*
* L1DFBAR - L1D flush base address register
*
* Fields:
* (rw) L1DFBAR
*
\******************************************************************************/
#if (L2CACHE_SUPPORT)
  #define _CACHE_L1DFBAR_ADDR            0x01844030u

  #define _CACHE_L1DFBAR_L1DFBAR_MASK    0xFFFFFFFFu
  #define _CACHE_L1DFBAR_L1DFBAR_SHIFT   0x00000000u
  #define  CACHE_L1DFBAR_L1DFBAR_DEFAULT 0x00000000u
  #define  CACHE_L1DFBAR_L1DFBAR_OF(x)   _VALUEOF(x)

  #define  CACHE_L1DFBAR_OF(x)           _VALUEOF(x)

  #define CACHE_L1DFBAR_DEFAULT (Uint32)( \
     _PER_FDEFAULT(CACHE,L1DFBAR,L1DFBAR) \
  )

  #define CACHE_L1DFBAR_RMK(l1dfbar) (Uint32)( \
     _PER_FMK(CACHE,L1DFBAR,L1DFBAR,l1dfbar) \
  )

  #define _CACHE_L1DFBAR_FGET(FIELD)\
    _PER_FGET(_CACHE_L1DFBAR_ADDR,CACHE,L1DFBAR,##FIELD)

  #define _CACHE_L1DFBAR_FSET(FIELD,field)\
    _PER_FSET(_CACHE_L1DFBAR_ADDR,CACHE,L1DFBAR,##FIELD,field)

  #define _CACHE_L1DFBAR_FSETS(FIELD,SYM)\
    _PER_FSETS(_CACHE_L1DFBAR_ADDR,CACHE,L1DFBAR,##FIELD,##SYM)
#endif


/******************************************************************************\
* _____________________
* |                   |
* |  L 1 D F W C      |
* |___________________|
*
* L1DFWC - L1D flush word count register
*
* Fields:
* (rw) L1DFWC
*
\******************************************************************************/
#if (L2CACHE_SUPPORT)
  #define _CACHE_L1DFWC_ADDR            0x01844034u

  #define _CACHE_L1DFWC_L1DFWC_MASK     0x0000FFFFu
  #define _CACHE_L1DFWC_L1DFWC_SHIFT    0x00000000u
  #define  CACHE_L1DFWC_L1DFWC_DEFAULT  0x00000000u
  #define  CACHE_L1DFWC_L1DFWC_OF(x)    _VALUEOF(x)

  #define  CACHE_L1DFWC_OF(x)           _VALUEOF(x)

  #define CACHE_L1DFWC_DEFAULT (Uint32)( \
     _PER_FDEFAULT(CACHE,L1DFWC,L1DFWC) \
  )

  #define CACHE_L1DFWC_RMK(l1dfwc) (Uint32)( \
     _PER_FMK(CACHE,L1DFWC,L1DFWC,l1dfwc) \
  )

  #define _CACHE_L1DFWC_FGET(FIELD)\
    _PER_FGET(_CACHE_L1DFWC_ADDR,CACHE,L1DFWC,##FIELD)

  #define _CACHE_L1DFWC_FSET(FIELD,field)\
    _PER_FSET(_CACHE_L1DFWC_ADDR,CACHE,L1DFWC,##FIELD,field)

  #define _CACHE_L1DFWC_FSETS(FIELD,SYM)\
    _PER_FSETS(_CACHE_L1DFWC_ADDR,CACHE,L1DFWC,##FIELD,##SYM)
#endif


/******************************************************************************\
* _____________________
* |                   |
* |  L 2 F L U S H    |
* |___________________|
*
* L2FLUSH - L2 flush register
*
* Fields:
* (rw) F
*
\******************************************************************************/
#if (L2CACHE_SUPPORT)
  #define _CACHE_L2FLUSH_ADDR      0x01845000u

  #define _CACHE_L2FLUSH_F_MASK    0x00000001u
  #define _CACHE_L2FLUSH_F_SHIFT   0x00000000u
  #define  CACHE_L2FLUSH_F_DEFAULT 0x00000000u
  #define  CACHE_L2FLUSH_F_OF(x)   _VALUEOF(x)
  #define  CACHE_L2FLUSH_F_NORMAL  0x00000000u
  #define  CACHE_L2FLUSH_F_FLUSH   0x00000001u

  #define  CACHE_L2FLUSH_OF(x)     _VALUEOF(x)

  #define CACHE_L2FLUSH_DEFAULT (Uint32)( \
     _PER_FDEFAULT(CACHE,L2FLUSH,F) \
  )

  #define CACHE_L2FLUSH_RMK(f) (Uint32)( \
     _PER_FMK(CACHE,L2FLUSH,F,f) \
  )

  #define _CACHE_L2FLUSH_FGET(FIELD)\
    _PER_FGET(_CACHE_L2FLUSH_ADDR,CACHE,L2FLUSH,##FIELD)

  #define _CACHE_L2FLUSH_FSET(FIELD,field)\
    _PER_FSET(_CACHE_L2FLUSH_ADDR,CACHE,L2FLUSH,##FIELD,field)

  #define _CACHE_L2FLUSH_FSETS(FIELD,SYM)\
    _PER_FSETS(_CACHE_L2FLUSH_ADDR,CACHE,L2FLUSH,##FIELD,##SYM)
#endif


/******************************************************************************\
* _____________________
* |                   |
* |  L 2 C L E A N    |
* |___________________|
*
* L2CLEAN - L2 clean register
*
* Fields:
* (rw) C
*
\******************************************************************************/
#if (L2CACHE_SUPPORT)
  #define _CACHE_L2CLEAN_ADDR       0x01845004u

  #define _CACHE_L2CLEAN_C_MASK     0x00000001u
  #define _CACHE_L2CLEAN_C_SHIFT    0x00000000u
  #define  CACHE_L2CLEAN_C_DEFAULT  0x00000000u
  #define  CACHE_L2CLEAN_C_OF(x)    _VALUEOF(x)
  #define  CACHE_L2CLEAN_C_NORMAL   0x00000000u
  #define  CACHE_L2CLEAN_C_CLEAN    0x00000001u

  #define  CACHE_L2CLEAN_OF(x)      _VALUEOF(x)

  #define CACHE_L2CLEAN_DEFAULT (Uint32)( \
     _PER_FDEFAULT(CACHE,L2CLEAN,C) \
  )

  #define CACHE_L2CLEAN_RMK(c) (Uint32)( \
     _PER_FMK(CACHE,L2CLEAN,C,c) \
  )

  #define _CACHE_L2CLEAN_FGET(FIELD)\
    _PER_FGET(_CACHE_L2CLEAN_ADDR,CACHE,L2CLEAN,##FIELD)

  #define _CACHE_L2CLEAN_FSET(FIELD,field)\
    _PER_FSET(_CACHE_L2CLEAN_ADDR,CACHE,L2CLEAN,##FIELD,field)

  #define _CACHE_L2CLEAN_FSETS(FIELD,SYM)\
    _PER_FSETS(_CACHE_L2CLEAN_ADDR,CACHE,L2CLEAN,##FIELD,##SYM)
#endif

/******************************************************************************\
* _____________________
* |                   |
* |  L 2 A L L O C 0  |
* |___________________|