📄 csl_dmahal.h
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#define _DMA_SECCTL0_FGET(FIELD) _DMA_SECCTL_FGET(0,##FIELD)
#define _DMA_SECCTL1_FGET(FIELD) _DMA_SECCTL_FGET(1,##FIELD)
#define _DMA_SECCTL2_FGET(FIELD) _DMA_SECCTL_FGET(2,##FIELD)
#define _DMA_SECCTL3_FGET(FIELD) _DMA_SECCTL_FGET(3,##FIELD)
#define _DMA_SECCTL0_FSET(FIELD,f) _DMA_SECCTL_FSET(0,##FIELD,f)
#define _DMA_SECCTL1_FSET(FIELD,f) _DMA_SECCTL_FSET(1,##FIELD,f)
#define _DMA_SECCTL2_FSET(FIELD,f) _DMA_SECCTL_FSET(2,##FIELD,f)
#define _DMA_SECCTL3_FSET(FIELD,f) _DMA_SECCTL_FSET(3,##FIELD,f)
#define _DMA_SECCTL0_FSETS(FIELD,SYM) _DMA_SECCTL_FSETS(0,##FIELD,##SYM)
#define _DMA_SECCTL1_FSETS(FIELD,SYM) _DMA_SECCTL_FSETS(1,##FIELD,##SYM)
#define _DMA_SECCTL2_FSETS(FIELD,SYM) _DMA_SECCTL_FSETS(2,##FIELD,##SYM)
#define _DMA_SECCTL3_FSETS(FIELD,SYM) _DMA_SECCTL_FSETS(3,##FIELD,##SYM)
/******************************************************************************\
* _____________________
* | |
* | S R C |
* |___________________|
*
* SRC0 - channel src address register 0
* SRC1 - channel src address register 1
* SRC2 - channel src address register 2
* SRC3 - channel src address register 3
*
* FIELDS (msb -> lsb)
* (rw) SRC
*
\******************************************************************************/
#define _DMA_SRC_OFFSET 4
#define _DMA_SRC0_ADDR 0x01840010u
#define _DMA_SRC1_ADDR 0x01840050u
#define _DMA_SRC2_ADDR 0x01840014u
#define _DMA_SRC3_ADDR 0x01840054u
#define _DMA_SRC_SRC_MASK 0xFFFFFFFFu
#define _DMA_SRC_SRC_SHIFT 0x00000000u
#define DMA_SRC_SRC_DEFAULT 0x00000000u
#define DMA_SRC_SRC_OF(x) _VALUEOF(x)
#define DMA_SRC_OF(x) _VALUEOF(x)
#define DMA_SRC_DEFAULT (Uint32)( \
_PER_FDEFAULT(DMA,SRC,SRC) \
)
#define DMA_SRC_RMK(src) (Uint32)( \
_PER_FMK(DMA,SRC,SRC,src) \
)
#define _DMA_SRC_FGET(N,FIELD)\
_PER_FGET(_DMA_SRC##N##_ADDR,DMA,SRC,##FIELD)
#define _DMA_SRC_FSET(N,FIELD,field)\
_PER_FSET(_DMA_SRC##N##_ADDR,DMA,SRC,##FIELD,field)
#define _DMA_SRC_FSETS(N,FIELD,SYM)\
_PER_FSETS(_DMA_SRC##N##_ADDR,DMA,SRC,##FIELD,##SYM)
#define _DMA_SRC0_FGET(FIELD) _DMA_SRC_FGET(0,##FIELD)
#define _DMA_SRC1_FGET(FIELD) _DMA_SRC_FGET(1,##FIELD)
#define _DMA_SRC2_FGET(FIELD) _DMA_SRC_FGET(2,##FIELD)
#define _DMA_SRC3_FGET(FIELD) _DMA_SRC_FGET(3,##FIELD)
#define _DMA_SRC0_FSET(FIELD,f) _DMA_SRC_FSET(0,##FIELD,f)
#define _DMA_SRC1_FSET(FIELD,f) _DMA_SRC_FSET(1,##FIELD,f)
#define _DMA_SRC2_FSET(FIELD,f) _DMA_SRC_FSET(2,##FIELD,f)
#define _DMA_SRC3_FSET(FIELD,f) _DMA_SRC_FSET(3,##FIELD,f)
#define _DMA_SRC0_FSETS(FIELD,SYM) _DMA_SRC_FSETS(0,##FIELD,##SYM)
#define _DMA_SRC1_FSETS(FIELD,SYM) _DMA_SRC_FSETS(1,##FIELD,##SYM)
#define _DMA_SRC2_FSETS(FIELD,SYM) _DMA_SRC_FSETS(2,##FIELD,##SYM)
#define _DMA_SRC3_FSETS(FIELD,SYM) _DMA_SRC_FSETS(3,##FIELD,##SYM)
/******************************************************************************\
* _____________________
* | |
* | D S T |
* |___________________|
*
* DST0 - channel destination address register 0
* DST1 - channel destination address register 1
* DST2 - channel destination address register 2
* DST3 - channel destination address register 3
*
* * - handle based
*
* FIELDS (msb -> lsb)
* (rw) DST
*
\******************************************************************************/
#define _DMA_DST_OFFSET 6
#define _DMA_DST0_ADDR 0x01840018u
#define _DMA_DST1_ADDR 0x01840058u
#define _DMA_DST2_ADDR 0x0184001Cu
#define _DMA_DST3_ADDR 0x0184005Cu
#define _DMA_DST_DST_MASK 0xFFFFFFFFu
#define _DMA_DST_DST_SHIFT 0x00000000u
#define DMA_DST_DST_DEFAULT 0x00000000u
#define DMA_DST_DST_OF(x) _VALUEOF(x)
#define DMA_DST_OF(x) _VALUEOF(x)
#define DMA_DST_DEFAULT (Uint32)( \
_PER_FDEFAULT(DMA,DST,DST) \
)
#define DMA_DST_RMK(dst) (Uint32)( \
_PER_FMK(DMA,DST,DST,dst) \
)
#define _DMA_DST_FGET(N,FIELD)\
_PER_FGET(_DMA_DST##N##_ADDR,DMA,DST,##FIELD)
#define _DMA_DST_FSET(N,FIELD,field)\
_PER_FSET(_DMA_DST##N##_ADDR,DMA,DST,##FIELD,field)
#define _DMA_DST_FSETS(N,FIELD,SYM)\
_PER_FSETS(_DMA_DST##N##_ADDR,DMA,DST,##FIELD,##SYM)
#define _DMA_DST0_FGET(FIELD) _DMA_DST_FGET(0,##FIELD)
#define _DMA_DST1_FGET(FIELD) _DMA_DST_FGET(1,##FIELD)
#define _DMA_DST2_FGET(FIELD) _DMA_DST_FGET(2,##FIELD)
#define _DMA_DST3_FGET(FIELD) _DMA_DST_FGET(3,##FIELD)
#define _DMA_DST0_FSET(FIELD,f) _DMA_DST_FSET(0,##FIELD,f)
#define _DMA_DST1_FSET(FIELD,f) _DMA_DST_FSET(1,##FIELD,f)
#define _DMA_DST2_FSET(FIELD,f) _DMA_DST_FSET(2,##FIELD,f)
#define _DMA_DST3_FSET(FIELD,f) _DMA_DST_FSET(3,##FIELD,f)
#define _DMA_DST0_FSETS(FIELD,SYM) _DMA_DST_FSETS(0,##FIELD,##SYM)
#define _DMA_DST1_FSETS(FIELD,SYM) _DMA_DST_FSETS(1,##FIELD,##SYM)
#define _DMA_DST2_FSETS(FIELD,SYM) _DMA_DST_FSETS(2,##FIELD,##SYM)
#define _DMA_DST3_FSETS(FIELD,SYM) _DMA_DST_FSETS(3,##FIELD,##SYM)
/******************************************************************************\
* _____________________
* | |
* | X F R C N T |
* |___________________|
*
* XFRCNT0 - channel transfer count register 0
* XFRCNT1 - channel transfer count register 1
* XFRCNT2 - channel transfer count register 2
* XFRCNT3 - channel transfer count register 3
*
* * - handle based
*
* FIELDS (msb -> lsb)
* (rw) FRMCNT
* (rw) ELECNT
*
\******************************************************************************/
#define _DMA_XFRCNT_OFFSET 8
#define _DMA_XFRCNT0_ADDR 0x01840020u
#define _DMA_XFRCNT1_ADDR 0x01840060u
#define _DMA_XFRCNT2_ADDR 0x01840024u
#define _DMA_XFRCNT3_ADDR 0x01840064u
#define _DMA_XFRCNT_FRMCNT_MASK 0xFFFF0000u
#define _DMA_XFRCNT_FRMCNT_SHIFT 0x00000010u
#define DMA_XFRCNT_FRMCNT_DEFAULT 0x00000000u
#define DMA_XFRCNT_FRMCNT_OF(x) _VALUEOF(x)
#define _DMA_XFRCNT_ELECNT_MASK 0x0000FFFFu
#define _DMA_XFRCNT_ELECNT_SHIFT 0x00000000u
#define DMA_XFRCNT_ELECNT_DEFAULT 0x00000000u
#define DMA_XFRCNT_ELECNT_OF(x) _VALUEOF(x)
#define DMA_XFRCNT_OF(x) _VALUEOF(x)
#define DMA_XFRCNT_DEFAULT (Uint32)( \
_PER_FDEFAULT(DMA,XFRCNT,FRMCNT) \
|_PER_FDEFAULT(DMA,XFRCNT,ELECNT) \
)
#define DMA_XFRCNT_RMK(frmcnt,elecnt) (Uint32)( \
_PER_FMK(DMA,XFRCNT,FRMCNT,frmcnt) \
|_PER_FMK(DMA,XFRCNT,ELECNT,elecnt) \
)
#define _DMA_XFRCNT_FGET(N,FIELD)\
_PER_FGET(_DMA_XFRCNT##N##_ADDR,DMA,XFRCNT,##FIELD)
#define _DMA_XFRCNT_FSET(N,FIELD,field)\
_PER_FSET(_DMA_XFRCNT##N##_ADDR,DMA,XFRCNT,##FIELD,field)
#define _DMA_XFRCNT_FSETS(N,FIELD,SYM)\
_PER_FSETS(_DMA_XFRCNT##N##_ADDR,DMA,XFRCNT,##FIELD,##SYM)
#define _DMA_XFRCNT0_FGET(FIELD) _DMA_XFRCNT_FGET(0,##FIELD)
#define _DMA_XFRCNT1_FGET(FIELD) _DMA_XFRCNT_FGET(1,##FIELD)
#define _DMA_XFRCNT2_FGET(FIELD) _DMA_XFRCNT_FGET(2,##FIELD)
#define _DMA_XFRCNT3_FGET(FIELD) _DMA_XFRCNT_FGET(3,##FIELD)
#define _DMA_XFRCNT0_FSET(FIELD,f) _DMA_XFRCNT_FSET(0,##FIELD,f)
#define _DMA_XFRCNT1_FSET(FIELD,f) _DMA_XFRCNT_FSET(1,##FIELD,f)
#define _DMA_XFRCNT2_FSET(FIELD,f) _DMA_XFRCNT_FSET(2,##FIELD,f)
#define _DMA_XFRCNT3_FSET(FIELD,f) _DMA_XFRCNT_FSET(3,##FIELD,f)
#define _DMA_XFRCNT0_FSETS(FIELD,SYM) _DMA_XFRCNT_FSETS(0,##FIELD,##SYM)
#define _DMA_XFRCNT1_FSETS(FIELD,SYM) _DMA_XFRCNT_FSETS(1,##FIELD,##SYM)
#define _DMA_XFRCNT2_FSETS(FIELD,SYM) _DMA_XFRCNT_FSETS(2,##FIELD,##SYM)
#define _DMA_XFRCNT3_FSETS(FIELD,SYM) _DMA_XFRCNT_FSETS(3,##FIELD,##SYM)
/******************************************************************************\
* _____________________
* | |
* | G B L C N T |
* |___________________|
*
* GBLCNTA - global count reload register A
* GBLCNTB - global count reload register B
*
* FIELDS (msb -> lsb)
* (rw) FRMCNT
* (rw) ELECNT
*
\******************************************************************************/
#define _DMA_GBLCNTA_ADDR 0x01840028u
#define _DMA_GBLCNTB_ADDR 0x0184002Cu
#define _DMA_GBLCNT_FRMCNT_MASK 0xFFFF0000u
#define _DMA_GBLCNT_FRMCNT_SHIFT 0x00000010u
#define DMA_GBLCNT_FRMCNT_DEFAULT 0x00000000u
#define DMA_GBLCNT_FRMCNT_OF(x) _VALUEOF(x)
#define _DMA_GBLCNT_ELECNT_MASK 0x0000FFFFu
#define _DMA_GBLCNT_ELECNT_SHIFT 0x00000000u
#define DMA_GBLCNT_ELECNT_DEFAULT 0x00000000u
#define DMA_GBLCNT_ELECNT_OF(x) _VALUEOF(x)
#define DMA_GBLCNT_OF(x) _VALUEOF(x)
#define DMA_GBLCNT_DEFAULT (Uint32)( \
_PER_FDEFAULT(DMA,GBLCNT,FRMCNT) \
|_PER_FDEFAULT(DMA,GBLCNT,ELECNT) \
)
#define DMA_GBLCNT_RMK(frmcnt,elecnt) (Uint32)( \
_PER_FMK(DMA,GBLCNT,FRMCNT,frmcnt) \
|_PER_FMK(DMA,GBLCNT,ELECNT,elecnt) \
)
#define _DMA_GBLCNT_FGET(N,FIELD)\
_PER_FGET(_DMA_GBLCNT##N##_ADDR,DMA,GBLCNT,##FIELD)
#define _DMA_GBLCNT_FSET(N,FIELD,field)\
_PER_FSET(_DMA_GBLCNT##N##_ADDR,DMA,GBLCNT,##FIELD,field)
#define _DMA_GBLCNT_FSETS(N,FIELD,SYM)\
_PER_FSETS(_DMA_GBLCNT##N##_ADDR,DMA,GBLCNT,##FIELD,##SYM)
#define _DMA_GBLCNTA_FGET(FIELD) _DMA_GBLCNT_FGET(A,FIELD)
#define _DMA_GBLCNTB_FGET(FIELD) _DMA_GBLCNT_FGET(B,FIELD)
#define _DMA_GBLCNTA_FSET(FIELD,f) _DMA_GBLCNT_FSET(A,FIELD,f)
#define _DMA_GBLCNTB_FSET(FIELD,f) _DMA_GBLCNT_FSET(B,FIELD,f)
#define _DMA_GBLCNTA_FSETS(FIELD,SYM) _DMA_GBLCNT_FSETS(A,FIELD,SYM)
#define _DMA_GBLCNTB_FSETS(FIELD,SYM) _DMA_GBLCNT_FSETS(B,FIELD,SYM)
/******************************************************************************\
* _____________________
* | |
* | G B L I D X |
* |___________________|
*
* GBLIDXA - global index register A
* GBLIDXB - global index register B
*
* FIELDS (msb -> lsb)
* (rw) FRMIDX
* (rw) ELEIDX
*
\******************************************************************************/
#define _DMA_GBLIDXA_ADDR 0x01840030u
#define _DMA_GBLIDXB_ADDR 0x01840034u
#define _DMA_GBLIDX_FRMIDX_MASK 0xFFFF0000u
#define _DMA_GBLIDX_FRMIDX_SHIFT 0x00000010u
#define DMA_GBLIDX_FRMIDX_DEFAULT 0x00000000u
#define DMA_GBLIDX_FRMIDX_OF(x) _VALUEOF(x)
#define _DMA_GBLIDX_ELEIDX_MASK 0x0000FFFFu
#define _DMA_GBLIDX_ELEIDX_SHIFT 0x00000000u
#define DMA_GBLIDX_ELEIDX_DEFAULT 0x00000000u
#define DMA_GBLIDX_ELEIDX_OF(x) _VALUEOF(x)
#define DMA_GBLIDX_OF(x) _VALUEOF(x)
#define DMA_GBLIDX_DEFAULT (Uint32)( \
_PER_FDEFAULT(DMA,GBLIDX,FRMIDX) \
|_PER_FDEFAULT(DMA,GBLIDX,ELEIDX) \
)
#define DMA_GBLIDX_RMK(frmidx,eleidx) (Uint32)( \
_PER_FMK(DMA,GBLIDX,FRMIDX,frmidx) \
|_PER_FMK(DMA,GBLIDX,ELEIDX,eleidx) \
)
#define _DMA_GBLIDX_FGET(N,FIELD)\
_PER_FGET(_DMA_GBLIDX##N##_ADDR,DMA,GBLIDX,##FIELD)
#define _DMA_GBLIDX_FSET(N,FIELD,field)\
_PER_FSET(_DMA_GBLIDX##N##_ADDR,DMA,GBLIDX,##FIELD,field)
#define _DMA_GBLIDX_FSETS(N,FIELD,SYM)\
_PER_FSETS(_DMA_GBLIDX##N##_ADDR,DMA,GBLIDX,##FIELD,##SYM)
#define _DMA_GBLIDXA_FGET(FIELD) _DMA_GBLIDX_FGET(A,FIELD)
#define _DMA_GBLIDXB_FGET(FIELD) _DMA_GBLIDX_FGET(B,FIELD)
#define _DMA_GBLIDXA_FSET(FIELD,f) _DMA_GBLIDX_FSET(A,FIELD,f)
#define _DMA_GBLIDXB_FSET(FIELD,f) _DMA_GBLIDX_FSET(B,FIELD,f)
#define _DMA_GBLIDXA_FSETS(FIELD,SYM) _DMA_GBLIDX_FSETS(A,FIELD,SYM)
#define _DMA_GBLIDXB_FSETS(FIELD,SYM) _DMA_GBLIDX_FSETS(B,FIELD,SYM)
/******************************************************************************\
* _____________________
* | |
* | G B L A D D R |
* |___________________|
*
* GBLADDRA - global address reload register A
* GBLADDRB - global address reload register B
* GBLADDRC - global address reload register C
* GBLADDRD - global address reload register D
*
* FIELDS (msb -> lsb)
* (rw) GBLADDR
*
\******************************************************************************/
#define _DMA_GBLADDRA_ADDR 0x01840038u
#define _DMA_GBLADDRB_ADDR 0x0184003Cu
#define _DMA_GBLADDRC_ADDR 0x01840068u
#define _DMA_GBLADDRD_ADDR 0x0184006Cu
#define _DMA_GBLADDR_GBLADDR_MASK 0xFFFFFFFFu
#define _DMA_GBLADDR_GBLADDR_SHIFT 0x00000000u
#define DMA_GBLADDR_GBLADDR_DEFAULT 0x00000000u
#define DMA_GBLADDR_GBLADDR_OF(x) _VALUEOF(x)
#define DMA_GBLADDR_OF(x) _VALUEOF(x)
#define DMA_GBLADDR_DEFAULT (Uint32)( \
_PER_FDEFAULT(DMA,GBLADDR,GBLADDR) \
)
#define DMA_GBLADDR_RMK(gbladdr) (Uint32)( \
_PER_FMK(DMA,GBLADDR,GBLADDR,gbladdr) \
)
#define _DMA_GBLADDR_FGET(N,FIELD)\
_PER_FGET(_DMA_GBLADDR##N##_ADDR,DMA,GBLADDR,##FIELD)
#define _DMA_GBLADDR_FSET(N,FIELD,field)\
_PER_FSET(_DMA_GBLADDR##N##_ADDR,DMA,GBLADDR,##FIELD,field)
#define _DMA_GBLADDR_FSETS(N,FIELD,SYM)\
_PER_FSETS(_DMA_GBLADDR##N##_ADDR,DMA,GBLADDR,##FIELD,##SYM)
#define _DMA_GBLADDRA_FGET(FIELD) _DMA_GBLADDR_FGET(A,FIELD)
#define _DMA_GBLADDRB_FGET(FIELD) _DMA_GBLADDR_FGET(B,FIELD)
#define _DMA_GBLADDRC_FGET(FIELD) _DMA_GBLADDR_FGET(C,FIELD)
#define _DMA_GBLADDRD_FGET(FIELD) _DMA_GBLADDR_FGET(D,FIELD)
#define _DMA_GBLADDRA_FSET(FIELD,f) _DMA_GBLADDR_FSET(A,FIELD,f)
#define _DMA_GBLADDRB_FSET(FIELD,f) _DMA_GBLADDR_FSET(B,FIELD,f)
#define _DMA_GBLADDRC_FSET(FIELD,f) _DMA_GBLADDR_FSET(C,FIELD,f)
#define _DMA_GBLADDRD_FSET(FIELD,f) _DMA_GBLADDR_FSET(D,FIELD,f)
#define _DMA_GBLADDRA_FSETS(FIELD,SYM) _DMA_GBLADDR_FSETS(A,FIELD,SYM)
#define _DMA_GBLADDRB_FSETS(FIELD,SYM) _DMA_GBLADDR_FSETS(B,FIELD,SYM)
#define _DMA_GBLADDRC_FSETS(FIELD,SYM) _DMA_GBLADDR_FSETS(C,FIELD,SYM)
#define _DMA_GBLADDRD_FSETS(FIELD,SYM) _DMA_GBLADDR_FSETS(D,FIELD,SYM)
/*----------------------------------------------------------------------------*/
#endif /* DMA_SUPPORT */
#endif /* _CSL_DMAHAL_H_ */
/******************************************************************************\
* End of csl_dmahal.h
\******************************************************************************/
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