csl_vcphal.h

Ti C6416 上对FLASH操作得范例程序

/******************************************************************************\
*           Copyright (C) 1999-2000 Texas Instruments Incorporated.
*                           All Rights Reserved
*------------------------------------------------------------------------------
* FILENAME...... csl_vcphal.h
* DATE CREATED.. 02/21/2001 
* LAST MODIFIED. 04/17/2003
*------------------------------------------------------------------------------
* REGISTERS
*
* IC0   - VCP input configuration register  0
* IC1   - VCP input configuration register  1
* IC2   - VCP input configuration register  2
* IC3   - VCP input configuration register  3
* IC4   - VCP input configuration register  4
* IC5   - VCP input configuration register  5
* EXE   - VCP execution register 
* END   - VCP endian mode register
* OUT0   - VCP output parameters register   0
* OUT1   - VCP output parameters register   1
* STAT0  - VCP status register 0
* STAT1  - VCP status register 1
* ERR   - VCP error register
*
*------------------------------------------------------------------------------
* MEMORY REGIONS
*
* ICMEM - VCP interrupt configuration register space
* OPMEM - VCP output parameter register space
* BMMEM - VCP systematics and parities memory
* HDMEM - VCP hard decisions memory
*
******************************************************************************
*Corrections Made 04/17/2003
*#define  VCP_OPMEM_ADDR           0x50000048u	VCPOUT0	VCP Output Register 0 //Correction was 0x50000024u
*#define _VCP_IC4_IMINS_MASK       0x0FFF0000u	//Correction was 0x00FF0000u
*#define _VCP_IC4_IMAXS_MASK       0x00000FFFu	//Correction was 0x000000FFu
*#define  VCP_IC5_SDHD_SOFT        0x00000001u	//Correction was 0
*#define  VCP_IC5_SDHD_HARD        0x00000000u	//Correction was 1
*#define _VCP_OUT0_ADDR            0x01B80048u	//Correction was 0x01B80024u
*#define _VCP_OUT0_FMINS_MASK      0x0FFF0000u	//Correction was 0x00FF0000u
*#define _VCP_OUT0_FMAXS_MASK      0x00000FFFu	//Correction was 0x00000FFFu
*#define _VCP_ERR_ERROR_MASK       0x00000007u	//Correction was 0x00000400u
*#define _VCP_ERR_ERROR_SHIFT      0x00000000u	//Correction was 0x0000000Au
*#define _VCP_STAT0_NSYM_MASK      0xFFFF0000u
*#define _VCP_STAT0_NSYM_SHIFT     0x00000010u
*#define _VCP_OUT1_FMAXI_MASK      0x00000FFFu	//Correction was 0x00000FFFu
*#define _VCP_OUT1_ADDR            0x01B8004Cu	//Correction was 0x01B80028
\*******************************************************************************/
#ifndef _CSL_VCPHAL_H_
#define _CSL_VCPHAL_H_

#include <csl_stdinc.h>
#include <csl_chip.h>

#if (VCP_SUPPORT)
/******************************************************************************\
* Memory section
\******************************************************************************/

  #define _VCP_BASE_IC               0x01B80000u	/*VCPIC0	VCP Input Configuration Reg 0 Config bus*/
  #define  VCP_ICMEM_ADDR            0x50000000u	/*VCPIC0	VCP Input Configuration Reg 0 EDMA bus*/
  #define  VCP_OPMEM_ADDR            0x50000048u	/*VCPOUT0	VCP Output Register 0 Correction*/
  #define  VCP_BMMEM_ADDR            0x50000080u	/*VCPWBM	VCP Branch Metrics Write Register*/
  #define  VCP_HDMEM_ADDR            0x50000088u	/*VCPRDECS	VCP Decisions Read Register*/


/******************************************************************************\
* module level register/field access macros
\******************************************************************************/

  /* ----------------- */
  /* FIELD MAKE MACROS */
  /* ----------------- */

  #define VCP_FMK(REG,FIELD,x)\
    _PER_FMK(VCP,##REG,##FIELD,x)

  #define VCP_FMKS(REG,FIELD,SYM)\
    _PER_FMKS(VCP,##REG,##FIELD,##SYM)


  /* -------------------------------- */
  /* RAW REGISTER/FIELD ACCESS MACROS */
  /* -------------------------------- */

  #define VCP_ADDR(REG)\
    _VCP_##REG##_ADDR

  #define VCP_RGET(REG)\
    _PER_RGET(_VCP_##REG##_ADDR,VCP,##REG)

  #define VCP_RSET(REG,x)\
    _PER_RSET(_VCP_##REG##_ADDR,VCP,##REG,x)

  #define VCP_FGET(REG,FIELD)\
    _VCP_##REG##_FGET(##FIELD)

  #define VCP_FSET(REG,FIELD,x)\
    _VCP_##REG##_FSET(##FIELD,##x)

  #define VCP_FSETS(REG,FIELD,SYM)\
    _VCP_##REG##_FSETS(##FIELD,##SYM)


  /* ------------------------------------------ */
  /* ADDRESS BASED REGISTER/FIELD ACCESS MACROS */
  /* ------------------------------------------ */

  #define VCP_RGETA(addr,REG)\
    _PER_RGET(addr,VCP,##REG)

  #define VCP_RSETA(addr,REG,x)\
    _PER_RSET(addr,VCP,##REG,x)

  #define VCP_FGETA(addr,REG,FIELD)\
    _PER_FGET(addr,VCP,##REG,##FIELD)

  #define VCP_FSETA(addr,REG,FIELD,x)\
    _PER_FSET(addr,VCP,##REG,##FIELD,x)

  #define VCP_FSETSA(addr,REG,FIELD,SYM)\
    _PER_FSETS(addr,VCP,##REG,##FIELD,##SYM)


  /* ----------------------------------------- */
  /* HANDLE BASED REGISTER/FIELD ACCESS MACROS */
  /* ----------------------------------------- */

  #define VCP_ADDRH(h,REG)\
    (Uint32)(&((h)->baseAddr[_VCP_##REG##_OFFSET]))

  #define VCP_RGETH(h,REG)\
    VCP_RGETA(VCP_ADDRH(h,##REG),##REG)


  #define VCP_RSETH(h,REG,x)\
    VCP_RSETA(VCP_ADDRH(h,##REG),##REG,x)


  #define VCP_FGETH(h,REG,FIELD)\
    VCP_FGETA(VCP_ADDRH(h,##REG),##REG,##FIELD)


  #define VCP_FSETH(h,REG,FIELD,x)\
    VCP_FSETA(VCP_ADDRH(h,##REG),##REG,##FIELD,x)


  #define VCP_FSETSH(h,REG,FIELD,SYM)\
    VCP_FSETSA(VCP_ADDRH(h,##REG),##REG,##FIELD,##SYM)



/******************************************************************************\
* _____________________
* |                   |
* |  I C 0            |
* |___________________|
*
* VCP input configuration register  0
*
* FIELDS (msb -> lsb)
* (rw) POLY3
* (rw) POLY2
* (rw) POLY1
* (rw) POLY0
*
\******************************************************************************/
  #define _VCP_IC0_OFFSET            0

  #define _VCP_IC0_ADDR              0x01B80000u

  #define _VCP_IC0_POLY3_MASK        0xFF000000u
  #define _VCP_IC0_POLY3_SHIFT       0x00000018u
  #define  VCP_IC0_POLY3_DEFAULT     0x00000000u
  #define  VCP_IC0_POLY3_OF(x)       _VALUEOF(x)

  #define _VCP_IC0_POLY2_MASK        0x00FF0000u
  #define _VCP_IC0_POLY2_SHIFT       0x00000010u
  #define  VCP_IC0_POLY2_DEFAULT     0x00000000u
  #define  VCP_IC0_POLY2_OF(x)       _VALUEOF(x)

  #define _VCP_IC0_POLY1_MASK        0x0000FF00u
  #define _VCP_IC0_POLY1_SHIFT       0x00000008u
  #define  VCP_IC0_POLY1_DEFAULT     0x00000000u
  #define  VCP_IC0_POLY1_OF(x)       _VALUEOF(x)

  #define _VCP_IC0_POLY0_MASK        0x000000FFu
  #define _VCP_IC0_POLY0_SHIFT       0x00000000u
  #define  VCP_IC0_POLY0_DEFAULT     0x00000000u
  #define  VCP_IC0_POLY0_OF(x)       _VALUEOF(x)

  #define  VCP_IC0_OF(x)             _VALUEOF(x)

  #define VCP_IC0_DEFAULT (Uint32)(\
    _PER_FDEFAULT(VCP,IC0,POLY3)\
   |_PER_FDEFAULT(VCP,IC0,POLY2)\
   |_PER_FDEFAULT(VCP,IC0,POLY1)\
   |_PER_FDEFAULT(VCP,IC0,POLY0)\
  )

  #define VCP_IC0_RMK(poly3,poly2,poly1,poly0) (Uint32)(\
     _PER_FMK(VCP,IC0,POLY3,poly3)\
    |_PER_FMK(VCP,IC0,POLY2,poly2)\
    |_PER_FMK(VCP,IC0,POLY1,poly1)\
    |_PER_FMK(VCP,IC0,POLY0,poly0)\
  )

  #define _VCP_IC0_FGET(FIELD)\
    _PER_FGET(_VCP_IC0_ADDR,VCP,IC0,##FIELD)

  #define _VCP_IC0_FSET(FIELD,field)\
    _PER_FSET(_VCP_IC0_ADDR,VCP,IC0,##FIELD,field)

  #define _VCP_IC0_FSETS(FIELD,SYM)\
    _PER_FSETS(_VCP_IC0_ADDR,VCP,IC0,FIELD,##SYM)

/******************************************************************************\
* _____________________
* |                   |
* |  I C 1            |
* |___________________|
*
* VCP input configuration register  1
*
* FIELDS (msb -> lsb)
* (rw) YAMEN
* (rw) YAMT
* (rw) ZERO
*
\******************************************************************************/
  #define _VCP_IC1_OFFSET            1

  #define _VCP_IC1_ADDR              0x01B80004u

  #define _VCP_IC1_YAMEN_MASK        0x10000000u
  #define _VCP_IC1_YAMEN_SHIFT       0x0000001Cu
  #define  VCP_IC1_YAMEN_DEFAULT     0x00000000u
  #define  VCP_IC1_YAMEN_OF(x)       _VALUEOF(x)
  #define  VCP_IC1_YAMEN_DISABLE     0x00000000u
  #define  VCP_IC1_YAMEN_ENABLE      0x00000001u

  #define _VCP_IC1_YAMT_MASK        0x0FFF0000u
  #define _VCP_IC1_YAMT_SHIFT       0x00000010u
  #define  VCP_IC1_YAMT_DEFAULT     0x00000000u
  #define  VCP_IC1_YAMT_OF(x)       _VALUEOF(x)

  #define _VCP_IC1_ZERO_MASK         0x0000FFFFu
  #define _VCP_IC1_ZERO_SHIFT        0x00000000u
  #define  VCP_IC1_ZERO_DEFAULT      0x00000000u
  #define  VCP_IC1_ZERO_OF(x)        _VALUEOF(x)
  #define  VCP_IC1_ZERO_ZEROS        0x00000000u

  #define  VCP_IC1_OF(x)             _VALUEOF(x)

  #define VCP_IC1_DEFAULT (Uint32)(\
    _PER_FDEFAULT(VCP,IC1,YAMEN)\
   |_PER_FDEFAULT(VCP,IC1,YAMT)\
   |_PER_FDEFAULT(VCP,IC1,ZERO)\
  )

  #define VCP_IC1_RMK(yamen,yamt,zero) (Uint32)(\
     _PER_FMK(VCP,IC1,YAMEN,yamen)\
    |_PER_FMK(VCP,IC1,YAMT,yamt)\
    |_PER_FMK(VCP,IC1,ZERO,zero)\
  )

  #define _VCP_IC1_FGET(FIELD)\
    _PER_FGET(_VCP_IC1_ADDR,VCP,IC1,##FIELD)

  #define _VCP_IC1_FSET(FIELD,field)\
    _PER_FSET(_VCP_IC1_ADDR,VCP,IC1,##FIELD,field)

  #define _VCP_IC1_FSETS(FIELD,SYM)\
    _PER_FSETS(_VCP_IC1_ADDR,VCP,IC1,FIELD,##SYM)

/******************************************************************************\
* _____________________
* |                   |
* |  I C 2            |
* |___________________|
*
* VCP input configuration register  2
*
* FIELDS (msb -> lsb)
* (rw) R
* (rw) F
*
\******************************************************************************/
  #define _VCP_IC2_OFFSET            2

  #define _VCP_IC2_ADDR              0x01BA0008u

  #define _VCP_IC2_R_MASK        0xFFFF0000u
  #define _VCP_IC2_R_SHIFT       0x00000010u
  #define  VCP_IC2_R_DEFAULT     0x00000000u
  #define  VCP_IC2_R_OF(x)       _VALUEOF(x)

  #define _VCP_IC2_FL_MASK       0x0000FFFFu
  #define _VCP_IC2_FL_SHIFT      0x00000000u
  #define  VCP_IC2_FL_DEFAULT    0x00000000u
  #define  VCP_IC2_FL_OF(x)      _VALUEOF(x)

  #define  VCP_IC2_OF(x)             _VALUEOF(x)

  #define VCP_IC2_DEFAULT (Uint32)(\
    _PER_FDEFAULT(VCP,IC2,R)\
   |_PER_FDEFAULT(VCP,IC2,FL)\
  )

  #define VCP_IC2_RMK(r,fl) (Uint32)(\
     _PER_FMK(VCP,IC2,R,r)\
    |_PER_FMK(VCP,IC2,FL,fl)\
  )

  #define _VCP_IC2_FGET(FIELD)\
    _PER_FGET(_VCP_IC2_ADDR,VCP,IC2,##FIELD)

  #define _VCP_IC2_FSET(FIELD,field)\
    _PER_FSET(_VCP_IC2_ADDR,VCP,IC2,##FIELD,field)

  #define _VCP_IC2_FSETS(FIELD,SYM)\
    _PER_FSETS(_VCP_IC2_ADDR,VCP,IC2,FIELD,##SYM)

/******************************************************************************\
* _____________________
* |                   |
* |  I C 3            |
* |___________________|
*
* VCP input configuration register  3
*
* FIELDS (msb -> lsb)
* (rw) C
*
\******************************************************************************/
  #define _VCP_IC3_OFFSET            3

  #define _VCP_IC3_ADDR              0x01BA000Cu

  #define _VCP_IC3_C_MASK       0x0000FFFFu
  #define _VCP_IC3_C_SHIFT      0x00000000u
  #define  VCP_IC3_C_DEFAULT    0x00000000u
  #define  VCP_IC3_C_OF(x)      _VALUEOF(x)

  #define  VCP_IC3_OF(x)             _VALUEOF(x)

  #define VCP_IC3_DEFAULT (Uint32)(\
    _PER_FDEFAULT(VCP,IC3,C)\
  )

  #define VCP_IC3_RMK(c) (Uint32)(\
     _PER_FMK(VCP,IC3,C,c)\
  )

  #define _VCP_IC3_FGET(FIELD)\
    _PER_FGET(_VCP_IC3_ADDR,VCP,IC3,##FIELD)

  #define _VCP_IC3_FSET(FIELD,field)\
    _PER_FSET(_VCP_IC3_ADDR,VCP,IC3,##FIELD,field)

  #define _VCP_IC3_FSETS(FIELD,SYM)\
    _PER_FSETS(_VCP_IC3_ADDR,VCP,IC3,FIELD,##SYM)

/******************************************************************************\
* _____________________
* |                   |
* |  I C 4            |
* |___________________|
*
* VCP input configuration register  4
*
* FIELDS (msb -> lsb)
* (rw) IMINS
* (rw) IMAXS
*
\******************************************************************************/
  #define _VCP_IC4_OFFSET            4

  #define _VCP_IC4_ADDR              0x01BA0010u

  #define _VCP_IC4_IMINS_MASK         0x0FFF0000u	/*Correction*/
  #define _VCP_IC4_IMINS_SHIFT        0x00000010u
  #define  VCP_IC4_IMINS_DEFAULT      0x00000000u
  #define  VCP_IC4_IMINS_OF(x)        _VALUEOF(x)

  #define _VCP_IC4_IMAXS_MASK          0x00000FFFu	/*Correction*/
  #define _VCP_IC4_IMAXS_SHIFT         0x00000000u
  #define  VCP_IC4_IMAXS_DEFAULT       0x00000000u
  #define  VCP_IC4_IMAXS_OF(x)         _VALUEOF(x)

  #define  VCP_IC4_OF(x)             _VALUEOF(x)

  #define VCP_IC4_DEFAULT (Uint32)(\
    _PER_FDEFAULT(VCP,IC4,IMINS)\
   |_PER_FDEFAULT(VCP,IC4,IMAXS)\
  )

  #define VCP_IC4_RMK(imins,imaxs) (Uint32)(\
     _PER_FMK(VCP,IC4,IMINS,imins)\
    |_PER_FMK(VCP,IC4,IMAXS,imaxs)\
  )

  #define _VCP_IC4_FGET(FIELD)\
    _PER_FGET(_VCP_IC4_ADDR,VCP,IC4,##FIELD)

  #define _VCP_IC4_FSET(FIELD,field)\
    _PER_FSET(_VCP_IC4_ADDR,VCP,IC4,##FIELD,field)

  #define _VCP_IC4_FSETS(FIELD,SYM)\
    _PER_FSETS(_VCP_IC4_ADDR,VCP,IC4,FIELD,##SYM)

/******************************************************************************\
* _____________________
* |                   |
* |  I C 5            |
* |___________________|
*
* VCP input configuration register  5
*
* FIELDS (msb -> lsb)
* (rw) SDHD
* (rw) OUTF
* (rw) TB
* (rw) SYMR
* (rw) SYMX
* (rw) IMAXI
*
\******************************************************************************/
  #define _VCP_IC5_OFFSET            5

  #define _VCP_IC5_ADDR              0x01BA0014u

  #define _VCP_IC5_SDHD_MASK        0x80000000u