syslib.c

VxWorks下 Cpv3060的BSP源代码

char * sysBspRev (void)
    {
    return (BSP_VERSION BSP_REV);
    }


/******************************************************************************
*
* sysClkRateAdjust - Adjust the clock frequency
*
* This function recalculates the decrementer clock frequency value
* based on the actual system clock speed.
*
* RETURNS: N/A
*/

void sysClkRateAdjust
    (
     int * sysDecClkFreq	/* adjusted clock frequency returned */
    )
    {
    *sysDecClkFreq = sysCpuSpeed / DEC_CLK_TO_INC;
    }


/******************************************************************************
*
* sysHwInit - initialize the system hardware
*
* This routine initializes various features of the MPC860 boards. It sets up
* the control registers, initializes various devices if they are present.
*
* NOTE: This routine should not be called directly by the user.
*
* RETURNS: N/A
*/

void sysHwInit (void)
    {
    int	immrVal = vxImmrGet();
    UINT32	qspanAdr;	/* QSpan device registers base address */
    int		i;


    sysInitStatus = 0;

    /* Make sure PMC support is configured properly */

    *CTL_PORT = CTL_PORT_RESET_VALUE;
    sysCtlPortState = (*CTL_PORT & 0xF0);

    /* store the saved values into the global configuration vars. */

    sysVpdInit();

    /* determine if SBRAM is present and size it */

    if (sysConfigOptions.sramSize)
        {

        /* size is 2**sysConfigOptions.sramSize */

        sysSbramSize = (1 << sysConfigOptions.sramSize);
        }

    /* clear the additional Ram space */

#ifdef LOCAL_MEM_AUTOSIZE
    if (sysStartType == BOOT_COLD)
        bfill( (char *)(LOCAL_MEM_LOCAL_ADRS+LOCAL_MEM_SIZE),
	   (sysSdramSize - LOCAL_MEM_SIZE), 0 );
#endif /* LOCAL_MEM_AUTOSIZE */

    /* 
     * Now that the internal clock rate is known, setup the timer 
     * variables and the global clock frequency variables.
     */

    spllMulFactor = ((sysCpuSpeed / sysRefClkFrq)-1);
    spllFreq = ((spllMulFactor + 1) * sysRefClkFrq);
    brgClkFreq = (spllFreq / ( 1 << ( 2 * BRGCLK_DIV_FACTOR )));
    refreshValue = (brgClkFreq / DRAM_REFRESH_FREQ);
    ptaValue = (refreshValue / PTP_DIVISOR);


    /* set the SPLL to the value requested */

    *PLPRCR(immrVal) = (*PLPRCR(immrVal) & ~PLPRCR_MF_MSK) | 
				(spllMulFactor << PLPRCR_MF_SHIFT);

    /* set the BRGCLK division factor */

    *SCCR(immrVal) = (* SCCR(immrVal) & ~SCCR_DFBRG_MSK) |
				(BRGCLK_DIV_FACTOR << SCCR_DFBRG_SHIFT);

    /* set the TimeBase source */

    *SCCR(immrVal) |= SCCR_TBS;		/* System Clock / 16 */

    /* 
     * Set the RTC circuit input source select to OSCM
     * Set RTC and PIT clock divided by 4
     */

    *SCCR(immrVal) &= ~(SCCR_RTSEL | SCCR_RTDIV);

    /* set the Periodic Timer A value */
     
    *MAMR(immrVal) = (* MAMR(immrVal) & ~MAMR_PTA_MSK) | 
				(ptaValue << MAMR_PTA_SHIFT);	

    /* set the Periodic Timer PreScale */

    *MPTPR(immrVal) = PTP_VALUE;

    /* reset the port A */

    *PAPAR(immrVal) = 0x0000;
    *PADIR(immrVal) = 0x0000;
    *PAODR(immrVal) = 0x0000;

    /* reset the port B */

    *PBPAR(immrVal) = 0x0000000;
    *PBDIR(immrVal) = 0x0000000;
    *PBODR(immrVal) = 0x0000000;

    /* reset the port C */

    *PCPAR(immrVal) = 0x0000;
    *PCDIR(immrVal) = 0x0000;
    *PCSO(immrVal)  = 0x0000;

    /* reset the port D */

    *PDPAR(immrVal) = 0x0000;
    *PDDIR(immrVal) = 0x0000;

    *SICR(immrVal) = 0x0;		/* initialize SI/NMSI connections */

    /* disable the RTC */

    *RTCSC(immrVal) = (RTCSC_SEC | RTCSC_ALR | RTCSC_RTF);

#ifdef  INCLUDE_MOT_FEC
    /* store the boards ethernet address into sysFecEnetAddr */

    for (i=0; i<6; i++)
        sysFecEnetAddr[i] = tempEnetAddr[i];
#endif  /* INCLUDE_MOT_FEC */

    /* Install sysCpvInt* routines as the system int* routines */

    _func_intConnectRtn = sysCpvIntConnect;
    _func_intEnableRtn  = sysCpvIntEnable;
    _func_intDisableRtn = sysCpvIntDisable;

    /* Initialize interrupts */

    ppc860IntrInit ();

#ifdef MPC860T
    *SIMASK(immrVal) &= (~SIMASK_IRM7);	/* make sure IRQ7 is disabled */
#endif /* MPC860T */

    /*
     * The power management mode is initialized here. Reduced power mode
     * is activated only when the kernel is iddle (cf vxPowerDown).
     * Power management mode is selected via vxPowerModeSet().
     * DEFAULT_POWER_MGT_MODE is defined in config.h.
     */

    vxPowerModeSet (DEFAULT_POWER_MGT_MODE);

    /*
     * Download I2C/SPI RISC microcode patch
     *
     * MUST RE-MAP THE I2C INTO IDMA1 at 0x1cc0 
     * with the following patch.
     */

    i2cMcp();

    /*
     * Enable external synchronous bus masters, enable retry
     *
     * initialize the QBus-to-PCIBus bridge controller device,
     * if the device is present
     *
     * verify that the appropriate chip select is enabled, and
     * if the chip select is enabled, probe the device for its
     * identifiers
     *
     * initialize the PCI device probe list with the ROM built-in
     *
     * call the PCI device probe/configure function
     */

    if (sysConfigOptions.pci) 
	{

	qspanAdr = ((*BR6(immrVal)) & BR_BA_MSK);  /* Get Qspan Addr */
	QSPAN_READ(qspanAdr + QSPAN_PCI_ID, sysQspanId);

	/* 
	 * make sure a QSPAN is present before continuing.
	 * This is a safety check in case VPD is bad.  It will skip
	 * PCI initialization if no QSPAN is found.
	 */

	if ((sysQspanId & QSPAN_ID_MASK) == (PCI_ID_QSPAN & QSPAN_ID_MASK))
	    {

            /* initialize the QSpan device */

            qspanHostInit(qspanAdr);
            qspanHostEnable(qspanAdr);

	    /* Initialize PCI driver library.  */

	    if ((sysQspanId == PCI_ID_QSPAN) && 
	        (sysQspanRevisionId < QSPAN_REVISION_1_2))
	        {

		/* 
		 * make a call to initialize the PCI driver library.
		 *
		 * for the older versions of the QSPAN chip, we have to
		 * install the machine check exception handler as part
		 * of the PCI read or write call.
		 */

	        if (pciConfigLibInit (PCI_MECHANISM_0, (ULONG) sysPciCfgRead, 
		    (ULONG) sysPciCfgWrite, NULL) != OK)
		    {
		    sysToMonitor (BOOT_NO_AUTOBOOT);
		    }
		}
	    else
		{

		/* 
		 * for QSPAN 1.2 and above we enable the MA_BE_D bit in
		 * the MISC_CTL register, which provides normal 
		 * termination to the Processor Bus, and therefore we
		 * can use the generic PCI read/write calls.
		 */

	        if (pciConfigLibInit (PCI_MECHANISM_1, PCI_PRIMARY_CAR,
		    PCI_PRIMARY_CDR, NULL) != OK)
		    {
		    sysToMonitor (BOOT_NO_AUTOBOOT);
		    }
		}

	    /*
	     * Capture the state (enabled or disabled) of the PCI-PCI bridge
	     * for future reference - see call to sysPciAutoConfig() in this
	     * function.
	     */

#ifdef INCLUDE_DEC2155X

	    /* Configure the Dec 2155x */

	    sysDec2155xInit ();

#endif /* INCLUDE_DEC2155X */

	    /*
	     * Test to determine if we need to configure the PCI busses with
	     * sysPciAutoConfig().  If we are coming up from a ROM-based image
	     * then we need to reconfigure.  If we have been booted from a ROM
	     * image then we don't need to reconfigure since the bootrom will
	     * already have reconfigured the PCI busses.  We must avoid
	     * configuring the PCI busses twice on startup.
	     */

	    if ( !PCI_AUTOCONFIG_DONE )
		{

		/* in ROM boot phase, OK to continue and configure PCI busses.*/

		sysPciAutoConfig ();
		PCI_AUTOCONFIG_FLAG++;	/* Remember that PCI is configured */

		}

	    } /* if sysQspanId */

	} /* if sysConfigOptions.pci */

    /* Reset serial channels */

    sysSerialHwInit ();
    }


/******************************************************************************
*
* sysPciCfgRead - read longword from PCI configuration space
*
* This does a QSPAN style PCI read.  This function is passed as a pointer 
* during initialization of PCI mechanism 0 in pciConfigLibInit.  This 
* function has the machine check handler support included in.
*
* RETURNS: OK always.
*/

STATUS sysPciCfgRead
    (
    int busNo,		/* PCI bus number to access */
    int deviceNo,	/* PCI device number to read from */
    int funcNo,		/* function number of the PCI device */
    int offset,		/* offset into configuration space header */
    UINT32 * pResult	/* address to put the result in */
    )
    {
    FUNCPTR     machCheckHandler;
    IMPORT int  pciConfigBDFPack(int bus, int dev, int func);
    int         key;
    STATUS      result = OK;
    UINT32      conAdrVal;

    /* generate coded value for CON_ADR register */

    conAdrVal = pciConfigBDFPack (busNo, deviceNo, funcNo) | (offset & 0xfc);

    /* Use Type 1, if bus is not the local bus */

    if (busNo != PCI_HOST_BUS_NBR)
        conAdrVal |= 0x1; /* do type 1 for other busses */

    /*
     * Connect the PowerPC machine check exception to catch exceptions,
     * Save off the existing handler first.
     * NOTE:  The QSpan PCI Bridge causes machine check exceptions to
     * occur when a non-present device address is put into the
     * configuration register.
     */

    machCheckHandler = excVecGet ((FUNCPTR *) _EXC_OFF_MACH);

    key = intLock ();

    /* Load the CON_ADR (CAR) value first, then read from CON_DATA (CDR) */

    PCI_OUT_LONG (PCI_PRIMARY_CAR, conAdrVal);

    excVecSet ((FUNCPTR *) _EXC_OFF_MACH, (FUNCPTR)sysPciTrap);

    /* Note: *pResult comes back as -1 if machine check happened */

    if ( (*pResult = PCI_IN_LONG (PCI_PRIMARY_CDR)) == -1)
	result = ERROR;

    /* Restore the PowerPC machine check exception */

    excVecSet ((FUNCPTR *) _EXC_OFF_MACH, (FUNCPTR)machCheckHandler);

    intUnlock (key);

    return (result);
    }


/******************************************************************************
*
* sysPciCfgWrite - write longword to PCI configuration space
*
* This does a QSPAN style PCI write.  This function is passed as a pointer
* during initialization of PCI mechanism 0 in pciConfigLibInit.  This 
* function has the machine check handler support included in.
*
* RETURNS: OK always
*/

STATUS sysPciCfgWrite
    (
    int busNo,          /* PCI bus number to access */
    int deviceNo,       /* PCI device number to read from */
    int funcNo,         /* function number of the PCI device */
    int offset,         /* offset into configuration space header */
    UINT32 data		/* data to be stored in config space */
    )
    {
    FUNCPTR     machCheckHandler;
    IMPORT int  pciConfigBDFPack(int bus, int dev, int func);
    int         key;
    STATUS      result = OK;
    UINT32      conAdrVal;

    conAdrVal = pciConfigBDFPack (busNo, deviceNo, funcNo) | (offset & 0xfc);

    if (busNo != 0)
        conAdrVal |= 0x1; /* do type 1 for other bus */

    /*
     * Connect the PowerPC machine check exception to catch exceptions,
     * Save off the existing handler first.
     * NOTE:  The QSpan PCI Bridge causes machine check exceptions to
     * occur when a non-present device address is put into the
     * configuration register.
     */

    machCheckHandler = excVecGet ((FUNCPTR *) _EXC_OFF_MACH);

    key = intLock ();

    PCI_OUT_LONG (PCI_PRIMARY_CAR, conAdrVal);

    excVecSet ((FUNCPTR *) _EXC_OFF_MACH, (FUNCPTR)sysPciTrap);

    PCI_OUT_LONG (PCI_PRIMARY_CDR, data);


    /* Restore the PowerPC machine check exception */

    excVecSet ((FUNCPTR *) _EXC_OFF_MACH, (FUNCPTR)machCheckHandler);

    intUnlock (key);

    return (result);
    }


/*******************************************************************************
*
* sysPhysMemTop - get the address of the top of physical memory
*
* This routine returns the address of the first missing byte of memory,
* which indicates the top of memory.
*
* RETURNS: The address of the top of physical memory.
*
* SEE ALSO: sysMemTop()
*/

char * sysPhysMemTop (void)
    {
    static char * sysPhysMemSize = NULL;

    if (sysPhysMemSize == NULL)
	{
#ifdef LOCAL_MEM_AUTOSIZE

        /* update the sysPhysMemDesc table to allow for entire RAM size */

#if defined(INCLUDE_MMU_BASIC) || defined(INCLUDE_MMU_FULL)
        sysPhysMemDesc[1].len = sysSdramSize;
#endif /* defined(INCLUDE_MMU_BASIC) || defined(INCLUDE_MMU_FULL) */

	/* use the calculated size of Ram */

	sysPhysMemSize = (char *)(LOCAL_MEM_LOCAL_ADRS + sysSdramSize);
#else
	/* use the default size for Ram */

	sysPhysMemSize = (char *)(LOCAL_MEM_LOCAL_ADRS + LOCAL_MEM_SIZE);
#endif /* LOCAL_MEM_AUTOSIZE */