📄 i2cmcp.c
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/* i2cMcp.c - I2C/SPI Microcode Patch Package Module *//* Copyright 1998-2001 Wind River Systems, Inc. *//* Copyright 1997,1998,1999 Motorola, Inc., All Rights Reserved *//*modification history--------------------01d,16sep01,dat Use of WRS_ASM macro01c,12jan01,rcs fixed i2cMcp title so refgen could parse it.01b,09jun99,srr changed to support cpv3060.01a,31aug98,rhk ported to CPV from MBX version 01b.*//*DESCRIPTIONThis module applies a PPC8xx CPM microcode patch to the dual-port RAM.By default the parameter RAM of SCC1-Ethernet is overlaid with the parameterRAM of I2C/SPI device, making it not possible to use both SCC1-Ethernet andI2C/SPI devices at the same time.The patch installed by this module corrects this problem by modifying theI2C/SPI programming model by relocating the I2C/SPI parameter RAM, permittingconcurrent operation of SCC1-Ethernet and I2C/SPI.*//* includes */#include "vxWorks.h" /* types */#include "drv/multi/ppc860Siu.h"#include "config.h" /* cpv3060 BSP definitions */#include "vxLib.h"#include "cpv3060.h"/* defines */#define I2C_DPRAM_OFFSET(dprama) ((UINT)(dprama)-(UINT)(DPRAM_ADDRESS))/* Macro for all i/o operations to use */#define IO_SYNC WRS_ASM(" sync")/* RISC microcode patch data arrays */LOCAL UINT i2cMcpBlock0Data[] = { 0x7FFFEFD9, 0x3FFD0000, 0x7FFB49F7, 0x7FF90000, 0x5FEFADF7, 0x5F89ADF7, 0x5FEFAFF7, 0x5F89AFF7, 0x3A9CFBC8, 0xE7C0EDF0, 0x77C1E1BB, 0xF4DC7F1D, 0xABAD932F, 0x4E08FDCF, 0x6E0FAFF8, 0x7CCF76CF, 0xFD1FF9CF, 0xABF88DC6, 0xAB5679F7, 0xB0937383, 0xDFCE79F7, 0xB091E6BB, 0xE5BBE74F, 0xB3FA6F0F, 0x6FFB76CE, 0xEE0DF9CF, 0x2BFBEFEF, 0xCFEEF9CF, 0x76CEAD24, 0x90B2DF9A, 0x7FDDD0BF, 0x4BF847FD, 0x7CCF76CE, 0xCFEF7E1F, 0x7F1D7DFD, 0xF0B6EF71, 0x7FC177C1, 0xFBC86079, 0xE722FBC8, 0x5FFFDFFF, 0x5FB2FFFB, 0xFBC8F3C8, 0x94A67F01, 0x7F1D5F39, 0xAFE85F5E, 0xFFDFDF96, 0xCB9FAF7D, 0x5FC1AFED, 0x8C1C5FC1, 0xAFDD5FC3, 0xDF9A7EFD, 0xB0B25FB2, 0xFFFEABAD, 0x5FB2FFFE, 0x5FCE600B, 0xE6BB600B, 0x5FCEDFC6, 0x27FBEFDF, 0x5FC8CFDE, 0x3A9CE7C0, 0xEDF0F3C8, 0x7F0154CD, 0x7F1D2D3D, 0x363A7570, 0x7E0AF1CE, 0x37EF2E68, 0x7FEE10EC, 0xADF8EFDE, 0xCFEAE52F, 0x7D0FE12B, 0xF1CE5F65, 0x7E0A4DF8, 0xCFEA5F72, 0x7D0BEFEE, 0xCFEA5F74, 0xE522EFDE, 0x5F74CFDA, 0x0B627385, 0xDF627E0A, 0x30D8145B, 0xBFFFF3C8, 0x5FFFDFFF, 0xA7F85F5E, 0xBFFE7F7D, 0x10D31450, 0x5F36BFFF, 0xAF785F5E, 0xBFFDA7F8, 0x5F36BFFE, 0x77FD30C0, 0x4E08FDCF, 0xE5FF6E0F, 0xAFF87E1F, 0x7E0FFD1F, 0xF1CF5F1B, 0xABF80D5E, 0x5F5EFFEF, 0x79F730A2, 0xAFDD5F34, 0x47F85F34, 0xAFED7FDD, 0x50B24978, 0x47FD7F1D, 0x7DFD70AD, 0xEF717EC1, 0x6BA47F01, 0x2D267EFD, 0x30DE5F5E, 0xFFFD5F5E, 0xFFEF5F5E, 0xFFDF0CA0, 0xAFED0A9E, 0xAFDD0C3A, 0x5F3AAFBD, 0x7FBDB082, 0x5F8247F8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 };LOCAL UINT i2cMcpBlock0Size = (sizeof(i2cMcpBlock0Data)/sizeof(UINT));LOCAL UINT i2cMcpBlock0Ofst = 0x0000;LOCAL UINT i2cMcpBlock1Data[] = { 0x3E303430, 0x34343737, 0xABF7BF9B, 0x994B4FBD, 0xBD599493, 0x349FFF37, 0xFB9B177D, 0xD9936956, 0xBBFDD697, 0xBDD2FD11, 0x31DB9BB3, 0x63139637, 0x93733693, 0x193137F7, 0x331737AF, 0x7BB9B999, 0xBB197957, 0x7FDFD3D5, 0x73B773F7, 0x37933B99, 0x1D115316, 0x99315315, 0x31694BF4, 0xFBDBD359, 0x31497353, 0x76956D69, 0x7B9D9693, 0x13131979, 0x79376935, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 };LOCAL UINT i2cMcpBlock1Size = (sizeof(i2cMcpBlock1Data)/sizeof(UINT));LOCAL UINT i2cMcpBlock1Ofst = 0x0F00;/******************************************************************************** i2cMcp - download RISC microcode patch** This function's purpose is to install the RISC microcode patch.** RETURNS: N/A*/void i2cMcp () { register UINT *pRmc; /* RISC microcode pointer */ register UINT *pDpr; /* dual port RAM pointer */ register UINT counter; /* count variable */ UINT immrVal = INTERNAL_MEM_MAP_ADDR; /* Base address of Internal Memory */ /* If patch already installed, simply return */ if (PPC860_I2C_PATCH_INSTALLED) return; /* download first portion of RISC microcode patch */ pDpr = (UINT *)((UINT)DPRAM_ADDRESS + (UINT)i2cMcpBlock0Ofst); pRmc = (UINT *)&i2cMcpBlock0Data[0]; for (counter = i2cMcpBlock0Size; counter; counter--, pDpr++, pRmc++) { *pDpr = *pRmc; } IO_SYNC; /* download second portion of RISC microcode patch */ pDpr = (UINT *)((UINT)DPRAM_ADDRESS + (UINT)i2cMcpBlock1Ofst); pRmc = (UINT *)&i2cMcpBlock1Data[0]; for (counter = i2cMcpBlock1Size; counter; counter--, pDpr++, pRmc++) { *pDpr = *pRmc; } IO_SYNC; /* * enable RISC microcode patch * * note: the RCTRx registers are not documented in the MPC8xx * user's manuals */ *RCTR1(immrVal) = 0x802a; IO_SYNC; *RCTR2(immrVal) = 0x8028; IO_SYNC; *RCTR3(immrVal) = 0x802e; IO_SYNC; *RCTR4(immrVal) = 0x802c; IO_SYNC; *RCCR(immrVal) = 0x0001; IO_SYNC; /* * initialize relocatable parameter RAM base, relocate to the * parameter RAM of IDMA1 (this is not used on Motorola H/W) */ *(I2C_RPBASE(PPC860_DPR_I2C_INITIAL(DPRAM_ADDRESS))) = I2C_DPRAM_OFFSET(PPC860_DPR_IDMA1(DPRAM_ADDRESS)); }
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