sysalib.s

VxWorks下 Cpv3060的BSP源代码

        /* Return to caller */

        bclr    20,0


/*****************************************************************************
*
* sysPciInWord - reads a word from PCI I/O or Memory space
*
* This function reads a word from a specified PCI I/O or Memory address
* via the QSPAN bridge chip.  This function should be used for access
* to the I/O or Memory mapped registers of a PCI device.  These
* registers are mapped as little-endian, but the QSPAN is setup
* to use big-endian address mapping, so we byte swap the data in order
* to make the value returned look the same as it would in PCI space.
*
* From a C point of view, the routine is defined as follows:
*
* 	UINT16 sysPciInWord 
*		 (
*		 UINT16 * dataPtr	- address to read from
*		 )
*
* RETURNS: word from address.
*/

sysPciInWord:

        /* Read word from address */

        lhbrx    r3,r0,r3

        /* Sync I/O operation */

        eieio

        /* Return to caller */

        bclr    20,0


/*****************************************************************************
*
* sysPciOutWord - writes a word to PCI I/O or Memory space
*
* This function writes a word to a specified PCI I/O or Memory address
* via the QSPAN bridge chip.  This function should be used for access
* to the I/O or Memory mapped registers of a PCI device.  These
* registers are mapped as little-endian, but the QSPAN is setup
* to use big-endian address mapping, so we byte swap the data in order
* to make the value written correct for the registers in PCI space.
*
* From a C point of view, the routine is defined as follows:
*
* 	void sysPciOutWord 
*		 (
*		 UINT16 * dataPtr, 	- address to write data
*		 UINT16 data		- data to be written
*		 )
*
* RETURNS: N/A
*/

sysPciOutWord:

        /* Write a word to the address */

        sthbrx    r4,r0,r3

        /* Sync I/O operation */

        eieio

        /* Return to caller */

        bclr    20,0


/*****************************************************************************
*
* sysPciConfigInWord - reads a word from PCI configuration space.
*
* This function reads a 16-bit word from a specified PCI configuration
* space address.  Since PCI on CPV3060 appears as big-endian, we must do
* byte swapping on the PCI space address.
*
* From a C point of view, the routine is defined as follows:
*
* 	UINT16 sysPciConfigInWord 
*		 (
*		 UINT16 * dataPtr	- address to read from
*		 )
*
* RETURNS: word from address.
*/

sysPciConfigInWord:

        /* Swap words in PCI space address */

        ori     r0,r3,2
        rlwinm  r3,r3,0,30,31
        subf    r3,r3,r0
        xor     r0,r0,r0

        /* Read word from PCI space */

        lhzx    r3,r0,r3

        /* Sync I/O operation */

        eieio

        /* Return to caller */

        bclr    20,0


/******************************************************************************
*
* sysPciConfigOutWord - writes a word to a PCI configuration space address.
*
* This function writes a 16-bit word to a specified PCI configuration
* space address.  Since PCI on CPV3060 appears as big-endian, we must do
* byte swapping on the PCI space address.
*
* From a C point of view, the routine is defined as follows:
*
* 	void sysPciConfigOutWord 
*		 (
*		 UINT16 * dataPtr, 	- address to write data
*		 UINT16 data		- data to be written
*		 )
*
* RETURNS: N/A
*/

sysPciConfigOutWord:

        /* Swap words in PCI space address */

        ori     r0,r3,2
        rlwinm  r3,r3,0,30,31
        subf    r3,r3,r0
        xor     r0,r0,r0

        /* Write a word to PCI space */

        sthx    r4,r0,r3

        /* Sync I/O operation */

        eieio

        /* Return to caller */

        bclr    20,0


/*****************************************************************************
*
* sysInLong - reads a long (32-bit big-endian) from an io address.
*
* This function reads a long from a specified io address or from local memory.
* It operates in big-endian mode and does not perform any translation
* operations on either the supplied address or the retrieved data.
*
* From a C point of view, the routine is defined as follows:
*
* 	UINT32 sysInLong 
*		 ( 
*		 UINT32 * dataPtr	- address to read from
*		 )
*
* RETURNS: long (32-bit big-endian) from address
*/

sysInLong:

        /* Read long from address */

        lwzx    r3,r0,r3

        /* Sync I/O operation */

        eieio

        /* Return to caller */

        bclr    20,0


/******************************************************************************
*
* sysOutLong - writes a long (32-bit big-endian) to an io address.
*
* This function writes a long to a specified io address or to local memory.
* It operates in big-endian mode and does not perform any translation
* operations on either the supplied address or data.

* This function writes a long to a specified io address.
*
* From a C point of view, the routine is defined as follows:
*
* 	void sysOutLong 
*		 (
*		 UINT32 * dataPtr, 	- address to write data
*		 UINT32 data		- data to be written
*		 )
*
* RETURNS: N/A
*/

sysOutLong:

        /* Write a long to address */

        stwx    r4,r0,r3

        /* Sync I/O operation */

        eieio

        /* Return to caller */

        bclr    20,0


/*****************************************************************************
*
* sysPciInLong - reads a longword from PCI I/O or Memory space
*
* This function reads a longword from a specified PCI I/O or Memory address
* via the QSPAN bridge chip.  This function should be used for access
* to the I/O or Memory mapped registers of a PCI device.  These
* registers are mapped as little-endian, but the QSPAN is setup
* to use big-endian address mapping, so we byte reverse the data in order
* to make the value returned look the same as it would in PCI space.
*
* From a C point of view, the routine is defined as follows:
*
* 	UINT32 sysPciInLong 
*		 (
*		 UINT32 * dataPtr	- address to read from
*		 )
*
* RETURNS: longword from address.
*/

sysPciInLong:

        /* Read a longword from the address, and reverse the bytes */

        lwbrx    r3,r0,r3

        /* Sync I/O operation */

        eieio

        /* Return to caller */

        bclr    20,0


/*****************************************************************************
*
* sysPciOutLong - writes a longword to PCI I/O or Memory space
*
* This function writes a longword to a specified PCI I/O or Memory address
* via the QSPAN bridge chip.  This function should be used for access
* to the I/O or Memory mapped registers of a PCI device.  These
* registers are mapped as little-endian, but the QSPAN is setup
* to use big-endian address mapping, so we byte reverse the data in order
* to make the value written correct for the registers in PCI space.
*
* From a C point of view, the routine is defined as follows:
*
* 	void sysPciOutLong 
*		 (
*		 UINT32 * dataPtr, 	- address to write data
*		 UINT32 data		- data to be written
*		 )
*
* RETURNS: N/A
*/

sysPciOutLong:

        /* Write a long to the address, reversing the bytes */

        stwbrx    r4,r0,r3

        /* Sync I/O operation */

        eieio

        /* Return to caller */

        bclr    20,0


/*****************************************************************************
*
* sysPciConfigInLong - reads a longword from PCI configuration space.
*
* This function reads a longword from a specified PCI configuration space
* address.  Since PCI on CPV3060 appears as big-endian, we must do
* byte swapping on the PCI space address.
*
* From a C point of view, the routine is defined as follows:
*
* 	UINT32 sysPciConfigInLong 
*		 ( 
*		 UINT32 * dataPtr	- address to read from
*		 )
*
* RETURNS: long (32-bit big-endian) from address
*/

sysPciConfigInLong:

        /* Read long from address */

        lwzx    r3,r0,r3

        /* Sync I/O operation */

        eieio

        /* Return to caller */

        bclr    20,0


/******************************************************************************
*
* sysPciConfigOutLong - writes a longword to a PCI configuration space address.
*
* This function writes a longword to a specified PCI configuration space
* address.  Since PCI on CPV3060 appears as big-endian, we must do
* byte swapping on the PCI space address.
*
* From a C point of view, the routine is defined as follows:
*
* 	void sysPciConfigOutLong 
*		 (
*		 UINT32 * dataPtr, 	- address to write data
*		 UINT32 data		- data to be written
*		 )
*
* RETURNS: N/A
*/

sysPciConfigOutLong:

        /* Write a long to address */

        stwx    r4,r0,r3

        /* Sync I/O operation */

        eieio

        /* Return to caller */

        bclr    20,0


/*******************************************************************************
*
* sysPciErr - Error return for PCI exception trap handler
*
* This routine is called from sysPciTrap if the PCI configuration access
* generates an exception.  This code sets the return value to -1.
*
* NOTE:  
* The QSpan PCI Bridge causes machine check exceptions to
* occur when a non-present device address is put into the
* configuration register.
*
* NOMANUAL
*/

sysPciErr:
	li	p0, -1
	blr


/*******************************************************************************
*
* sysDecGet - return the decrementer contents
*
* This routine will return the current contents of the
* decrementer register (MPU.SPR22)
#
* RETURNS: decrementer contents
*
* NOMANUAL
*/

sysDecGet:
	mfspr	r3,22		/* load decrementer contents */

	/* Return to caller */

	bclr	20,0


/*******************************************************************************
*
* sysUioRead - this function reads a register from the UIO chip
*
* From a C point of view, the routine is defined as follows:
*
*       UINT8 sysUioRead
*		 (
*                UINT32 * deviceAddress,  - device base address
*                UINT8    registerIndex,  - register index offset value
*		 )
*
* RETURNS: r3 = registerValue
*/

        .text
        .align  2
sysUioRead:
        stb     r4,0(r3)        /* write index register with register offset */
        eieio
        sync
        lbz     r3,1(r3)        /* retrieve specified reg offset contents */
        eieio
        sync
        bclr    20,0            /* return to caller */


/*******************************************************************************
*
* sysUioWrite - this function writes a register to the UIO chip
*
* From a C point of view, the routine is defined as follows:
*
*       void sysUioWrite
*	         (
*		 UINT32 * deviceAddress,  - device base address
*		 UINT8    registerIndex,  - register index offset value
*		 UINT8    registerValue   - data to be written
*		 )
*
* RETURNS: N/A
*/

        .text
        .align  2
sysUioWrite:
        stb     r4,0(r3)        /* write index register with register offset */
        eieio
        sync
        stb     r5,1(r3)        /* 1st write */
        eieio
        sync
        stb     r5,1(r3)        /* 2nd write */
        eieio
        sync
        bclr    20,0            /* return to caller */


/*******************************************************************************
*
* sysRevNumGet - Get the processor revision number
*
* This routine will return the lower 16 bits of the IMMR (SPR #638)
* which will contain the processor revision number.
*
* From a C point of view, the routine is defined as follows:
*
*	UINT sysRevNumGet (void)
*
* RETURNS: processor revision number
*/

sysRevNumGet:
        mfspr   r3,IMMR         /* load contents of the IMMR */

        rlwinm	r3,r3,0,16,31	/* mask out the upper 16 bits of the IMMR */

        bclr    20,0		/* Return to caller */