📄 sysalib.s
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/* sysALib.s - Motorola CPV3060 system-dependent assembly routines *//* Copyright 1984-2000 Wind River Systems, Inc. *//* Copyright 1997-2000 Motorola, Inc., All Rights Reserved */ .data .globl copyright_wind_river .long copyright_wind_river/*modification history--------------------01j,06dec00,rhk Cleanup to comply with WRS coding standards.01i,21nov00,rhk Added function to get revision number of the 860T.01h,16jun99,rhk PSP1 and PSP2 changed to CTL_PORT for 3060.01g,14jun99,srr removed global flag setting to indicate non ROM based.01f,09jun99,srr changed to support cpv3060.01e,30nov98,rhk modified sysPciXxx routines to support access of PCI devices in little-endian mode.01d,19nov98,rhk Added global flag setting to indicate non ROM based.01c,10nov98,rhk created sysPciConfigXxxx routines, cleanup of the sysPciXxxx routines for TRB.01b,30sep98,rhk fixed initialization of PSP1 and PSP2.01a,27aug98,rhk ported to CPV3160 from MBX version 01e.*//*DESCRIPTIONThis module contains system-dependent routines written in assemblylanguage.This module must be the first specified in the \f3ld\f1 command used tobuild the system. The sysInit() routine is the system start-up code.*/#define _ASMLANGUAGE#include "vxWorks.h"#include "asm.h"#include "cacheLib.h"#include "config.h"#include "regs.h" #include "sysLib.h"/* globals */ .globl _sysInit /* start of system code */ .globl sysInByte .globl sysOutByte .globl sysPciInByte .globl sysPciOutByte .globl sysPciConfigInByte .globl sysPciConfigOutByte .globl sysInWord .globl sysInWordRev .globl sysOutWord .globl sysPciInWord .globl sysPciOutWord .globl sysPciConfigInWord .globl sysPciConfigOutWord .globl sysInLong .globl sysOutLong .globl sysPciInLong .globl sysPciOutLong .globl sysPciConfigInLong .globl sysPciConfigOutLong .globl sysPciErr .globl sysDecGet .globl sysUioRead .globl sysUioWrite .globl sysRevNumGet/* externals */ .extern usrInit .text/********************************************************************************* sysInit - start after boot** This is the system start-up entry point for VxWorks in RAM, the* first code executed after booting. It disables interrupts, sets up* the stack, and jumps to the C routine usrInit() in usrConfig.c.** The initial stack is set to grow down from the address of sysInit(). This* stack is used only by usrInit() and is never used again. Memory for the* stack must be accounted for when determining the system load address.** NOTE: This routine should not be called by the user.** From a C point of view, the routine is defined as follows:** void sysInit (void) /@ THIS IS NOT A CALLABLE ROUTINE @/** RETURNS: N/A*/_sysInit: /* * disable external interrupts and Instruction/Data MMU, set * the exception prefix */ mfmsr p0 /* p0 = msr */ INT_MASK(p0, p1) /* mask EE bit */ rlwinm p1, p1, 0, _PPC_MSR_BIT_DR + 1, _PPC_MSR_BIT_IR - 1 rlwinm p1, p1, 0, _PPC_MSR_BIT_IP + 1, _PPC_MSR_BIT_IP - 1 mtmsr p1 /* msr = p1 */ isync /* ISYNC */ /* disable instruction and data caches */ lis p1, HIADJ ( CACHE_CMD_DISABLE) /* load disable cmd */ addi p1, p1, LO (CACHE_CMD_DISABLE) mtspr IC_CST, p1 /* Disable I cache */ mtspr DC_CST, p1 /* Disable D cache */ /* unlock instruction and data caches */ lis p1, HIADJ ( CACHE_CMD_UNLOCK_ALL) /* load unlock cmd */ addi p1, p1, LO (CACHE_CMD_UNLOCK_ALL) mtspr IC_CST, p1 /* Unlock I cache */ mtspr DC_CST, p1 /* Unlock D cache */ /* invalidate instruction and data caches */ lis p1, HIADJ ( CACHE_CMD_INVALIDATE) /* load invalidate cmd*/ addi p1, p1, LO (CACHE_CMD_INVALIDATE) mtspr IC_CST, p1 /* Invalidate I cache */ mtspr DC_CST, p1 /* Invalidate D cache */ /* invalidate entries within both TLBs */ tlbia /* disable all devices (serial, ethernet, ...) */ li r4, LO(CTL_PORT_RESET_VALUE) lis r5, HIADJ (CTL_PORT) stb r4, LO(CTL_PORT)(r5)#ifdef INCLUDE_FEC lis r4, HIADJ(FEC_ETH_RESET) addi r4, r4, LO(FEC_ETH_RESET) lis r5, HIADJ (FEC_CNTRL) stw r4, LO(FEC_CNTRL)(r5)#endif /* initialize Small Data Area (SDA) start address */#if FALSE /* XXX TPR SDA not supported yet */ lis r2, HIADJ( _SDA2_BASE_) addi r2, r2, LO(_SDA2_BASE_) lis r13, HIADJ ( _SDA_BASE_) addi r13, r13, LO(_SDA_BASE_)#endif /* initialize the stack pointer */ lis sp, HIADJ( RAM_LOW_ADRS) addi sp, sp, LO(RAM_LOW_ADRS) /* set the default boot code */ lis r3, HIADJ( BOOT_WARM_AUTOBOOT) addi r3, r3, LO(BOOT_WARM_AUTOBOOT) /* jump to usrInit */ addi sp, sp, -FRAMEBASESZ /* get frame stack */ b usrInit /* never returns - starts up kernel *//******************************************************************************* sysInByte - reads a byte from an io address.** This function reads a byte from a specified io address or from local memory.* It operates in big-endian mode and does not perform any translation* operations on either the supplied address or the retrieved data.** From a C point of view, the routine is defined as follows:** UINT8 sysInByte * (* UINT8 * dataPtr - address to read from* )** RETURNS: byte from address.*/sysInByte: /* Read byte from address */ lbzx r3,r0,r3 /* Sync I/O operation */ eieio /* Return to caller */ bclr 20,0/******************************************************************************** sysOutByte - writes a byte to an io address.** This function writes a byte to a specified io address or to local memory.* It operates in big-endian mode and does not perform any translation* operations on either the supplied address or data.** From a C point of view, the routine is defined as follows:** void sysOutByte * (* UINT8 * dataPtr, - address to write data* UINT8 data - data to be written* )** RETURNS: N/A*/sysOutByte: /* Write a byte to address */ stbx r4,r0,r3 /* Sync I/O operation */ eieio /* Return to caller */ bclr 20,0/******************************************************************************* sysPciInByte - reads a byte from PCI I/O or Memory space** This function reads a byte from a specified PCI I/O or Memory address* via the QSPAN bridge chip. This function should be used for access* to the I/O or Memory mapped registers of a PCI device. Since this routine* accesses only a single byte of data no address or data manipulation is* required.** From a C point of view, the routine is defined as follows:** UINT8 sysPciInByte * (* UINT8 * dataPtr - address to read from* )** RETURNS: byte from address.*/sysPciInByte: /* Read byte from address */ lbzx r3,r0,r3 /* Sync I/O operation */ eieio /* Return to caller */ bclr 20,0/******************************************************************************* sysPciOutByte - writes a byte to PCI I/O or Memory space** This function writes a byte to a specified PCI I/O or Memory address* via the QSPAN bridge chip. This function should be used for writing* to the I/O or Memory mapped registers of a PCI device. Since this routine* writes only a single byte of data no address or data manipulation is* required.** From a C point of view, the routine is defined as follows:** void sysPciOutByte * (* UINT8 * dataPtr, - address to write data* UINT8 data - data to be written* )** RETURNS: N/A*/sysPciOutByte: /* Write a byte to address */ stbx r4,r0,r3 /* Sync I/O operation */ eieio /* Return to caller */ bclr 20,0/******************************************************************************* sysPciConfigInByte - reads a byte from PCI configuration space.** This function reads a byte from a specified PCI configuration space* address. Since PCI on CPV3060 appears as big-endian, we must do* byte swapping on the PCI space address.** From a C point of view, the routine is defined as follows:** UINT8 sysPciConfigInByte * (* UINT8 * dataPtr - address to read from* )** RETURNS: byte from address.*/sysPciConfigInByte: /* Swap bytes in PCI space address */ ori r0,r3,3 rlwinm r3,r3,0,30,31 subf r3,r3,r0 xor r0,r0,r0 /* Read byte from PCI space */ lbzx r3,r0,r3 /* Sync I/O operation */ eieio /* Return to caller */ bclr 20,0/******************************************************************************** sysPciConfigOutByte - writes a byte to a PCI configuration space address.** This function writes a byte to a specified PCI configuration space* address. Since PCI on CPV3060 appears as big-endian, we must do* byte swapping on the PCI space address.** From a C point of view, the routine is defined as follows:** void sysPciConfigOutByte * (* UINT8 * dataPtr, - address to write data* UINT8 data - data to be written* )** RETURNS: N/A*/sysPciConfigOutByte: /* Swap bytes in PCI space address */ ori r0,r3,3 rlwinm r3,r3,0,30,31 subf r3,r3,r0 xor r0,r0,r0 /* Write a byte to PCI space */ stbx r4,r0,r3 /* Sync I/O operation */ eieio /* Return to caller */ bclr 20,0/******************************************************************************* sysInWord - reads a word (16-bit big-endian) from an io address.** This function reads a word from a specified io address or local memory.* It operates in big-endian mode and does not perform any translation* operations on either the supplied address or the retrieved data.** From a C point of view, the routine is defined as follows:** UINT16 sysInWord * (* UINT16 * dataPtr - address to read from* )** RETURNS: 16-bit word from read from address*/sysInWord: /* Read word from address */ lhzx r3,r0,r3 /* Sync I/O operation */ eieio /* Return to caller */ bclr 20,0/******************************************************************************* sysInWordRev - reads a word (16-bit byte reversed) from an io address.** This function reads a word from a specified io address, or memory * and reverses the bytes.** From a C point of view, the routine is defined as follows:** UINT16 sysInWordRev * (* UINT16 * dataPtr - address to read from* )** RETURNS: 16 bit word (byte swapped) read from address*/sysInWordRev: /* Read word from address */ lhbrx r3,r0,r3 /* Sync I/O operation */ eieio /* Return to caller */ bclr 20,0/******************************************************************************** sysOutWord - writes a word (16-bit big-endian) to an io address.** This function writes a word to a specified io address or to local memory.* It operates in big-endian mode and does not perform any translation* operations on either the supplied address or data.** From a C point of view, the routine is defined as follows:** void sysOutWord * (* UINT16 * dataPtr, - address to write data* UINT16 data - data to be written* )** RETURNS: N/A*/sysOutWord: /* Write a word to address */ sthx r4,r0,r3 /* Sync I/O operation */ eieio
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