rw_spruceflash.cmd

VxWorks下 Spruce的BSP源代码

#----------------------------------------------------------------------
# IBM RISCWatch command file for updating the Sruce board flash with a VxWorks
# bootrom image (bootrom.hex or bootrom_uncmp.hex).  JTAG RISCWatch is required.
#
#
# Usage:  From a RISCWatch command line type one the following commands:
#
#            exec rw_spruceflash.cmd {"bootrom_uncmp.hex"}
#
#            exec rw_spruceflash.cmd {"bootrom.hex"}
#
#  Assumptions:
#             - Using AMD29F040 flash part
#             - Using Micron MT8LSDT264AG-662C1
#               16Mb (2Mx64 bit) single sided DIMM. This is
#               the DIMM that shipped with 60x/7xx EVB. If a different
#               DIMM is used, this command file would not work properly
#               and would need to be modified.
#----------------------------------------------------------------------

parms {input_file}
unload all
window output

#----------------------------------------------------------------------
# reset the processor
#    Use probe's "halt on" command to guarantee good reset
#    even from empty flash
#----------------------------------------------------------------------
stop
#jtag pass halt on
#post note "Cycle power on the 6xx/7xx target board, the select OK"
print "Initializing the Spruce board"
reset chip


#----------------------------------------------------------------------
# Variables
#----------------------------------------------------------------------
create data
create baud
create refresh

#----------------------------------------------------------------------
# Set write enable for flash in bank 0 and NVRAM in bank 3
#----------------------------------------------------------------------
write dmem 0xFF500008 0x90
write dmem 0xFF50000C 0x90000000

#----------------------------------------------------------------------
# Set timings for flash bank 0
#----------------------------------------------------------------------
write dmem 0xFF500008 0xE0              # index word to RPB0P
write dmem 0xFF50000C 0x1C0190F0        # set TW=7, THDRD=3, THDWR=2, FWT=F

#----------------------------------------------------------------------
# NVRAM setup
#----------------------------------------------------------------------
write dmem 0xFF500008 0x44           # index word to MB3SA
write dmem 0xFF50000C 0xFF800000     # set starting addr 0xFF800000
write dmem 0xFF500008 0x64           # index word to MB3EA
write dmem 0xFF50000C 0xFF800000     # set ending addr 0xFF8FFFFF (1M)
write dmem 0xFF500008 0xEC           # index word to RPB3P
write dmem 0xFF50000C 0x2D0310F0     # set TW=B, CSON=1,THDRD=6, THDWR=2, FWT=F

#----------------------------------------------------------------------
# Determine baud rate to use for Serial port1 via FPGA_REG_A
# UART_CLK_33 bit - if bit set then 33Mhz, if not then assume 30Mhz.
#----------------------------------------------------------------------
readb 0xFF820000 data
if ((data & 0x02) == 0)
  set baud = 0x31                      # baud for 30Mhz CPC700
endif
if ((data & 0x02) == 0x02)
  set baud = 0x36                      # baud for 33.33Mhz CPC700
endif

#----------------------------------------------------------------------
# Initialize Serial Port 1
#----------------------------------------------------------------------
writeb dmem  0xFF600303 0x80
writeb dmem  0xFF600300 baud
writeb dmem  0xFF600301 0x00
writeb dmem  0xFF600303 0x03
writeb dmem  0xFF600302 0x00
writeb dmem  0xFF600304 0x03
readb 0xFF600305
readb 0xFF600300
writeb dmem  0xFF600307 0x00
writeb dmem  0xFF600301 0x00

#----------------------------------------------------------------------
# Set write enable for flash in bank 0
#----------------------------------------------------------------------
write dmem 0xFF500008 0x90
write dmem 0xFF50000C 0x80000000

#----------------------------------------------------------------------
# Set up SDRAM bank (assumes 16MB 2Mx64 single-sided DIMM that was
# shipped with the board is plugged)
#----------------------------------------------------------------------
write dmem 0xFF500008 0x24           # index word to MBEN
write dmem 0xFF50000C 0xD0000000     # enable bank 0,1,3 (flash,SDRAM,NVRAM)
write dmem 0xFF500008 0x28           # index word to MEMTYPE
write dmem 0xFF50000C 0x10000000     # set MT_1='01'
if ((data & 0x02) == 0)
  set refresh = 0x03920000           # refresh for 30Mhz CPC700/60Mhz SDRAM
endif
if ((data & 0x02) == 0x02)
  set refresh = 0x03F80000           # refresh for 33.3Mhz CPC700/66.6Mhz SDRAM
endif
write dmem 0xFF500008 0x30           # index word to RTR
write dmem 0xFF50000C refresh        # set refresh
write dmem 0xFF500008 0x34           # index word to DAM
write dmem 0xFF50000C 0x00000000     # set DAM_1='00' Mode 1(11x9)
write dmem 0xFF500008 0x3C           # index word to MB1SA
write dmem 0xFF50000C 0x00000000     # set starting addr 0x00000000
write dmem 0xFF500008 0x5C           # index word to MB1EA
write dmem 0xFF50000C 0x00FFFFFF     # set ending addr 0x00FFFFFF (16M)
write dmem 0xFF500008 0x80           # index word to SDTR1
write dmem 0xFF50000C 0x0004880A     # set SD_APGE=0, SD_PTA=1, SD_WTP=2,
                                     # SD_RTP=2, SD_RFTA=2, SD_RCD=2
write dmem 0xFF500008 0x94           # index word to ECCCF
write dmem 0xFF50000C 0x00000000
delay 2                              # ensure 200usec expired since reset
write dmem 0xFF500008 0x20           # index word to MCOPT1
write dmem 0xFF50000C 0x85000000     # set DC_EN=1, DRAMTYP=2, BOOTROMP=1

#----------------------------------------------------------------------
# Initialize interrupt controller
#----------------------------------------------------------------------
write dmem 0xFF500880 0xFFFFFFFF     # clear all ints
write dmem 0xFF500888 0x00000000     # disable all


#
# Initialize SDRAM between 0x00000000 and 0x00080000 to look like a blank
# flash (all 0xff).
#
print "Initializing SDRAM."
memfill 0x00000000 0x00080000 0xff

#
# Load the new bootrom image into SDRAM on top of the memory just initialized.
#
#fprint "Loading new VxWorks bootrom image ", input_file, " into SDRAM.\n"
create before
set before = $ERRORS
load mot input_file
if ($ERRORS > before)
   end                          # exit command file
endif


print "Loading flash update code into SDRAM."

#
# Put assembly code in SDRAM that will program the bootrom image into an
# AMD 29F040 flash device
#

# progflash:
write r3 0xffe00000         # flash base address
write r4 0x00000000         # base address of new ROM image
write r5 0xffe00000         # flash base address for increment

set hid0.ice = 1            # Turn icache on for faster execution
                            # Don't place MMIO addresses past this point

# Set r3 to base flash address
assm "addi    r0, 0, 0xF0"                      0x80000
assm "stb     r0, 0x0000(r3)"                   0x80004
assm "addi    r0, 0, 0xAA"                      0x80008
assm "stb     r0, 0x5555(r3)"                   0x8000c
assm "addi    r0, 0, 0x55"                      0x80010
assm "stb     r0, 0x2AAA(r3)"                   0x80014
assm "addi    r0, 0, 0x90"                      0x80018
assm "stb     r0, 0x5555(r3)"                   0x8001c

# r10 = MFG code
# r11 = Device code
assm "lbz     r10, 0x0000(r3)"                  0x80020
assm "lbz     r11, 0x0001(r3)"                  0x80024

# Reset flash for read access
assm "addi    r0, 0, 0xf0"                      0x80028
assm "stb     r0, 0x0000(r3)"                   0x8002c

# Does MFG code = 0x01 (AMD)?
assm "cmpwi   r10, 0x01"                        0x80030
assm "bne     $+0x0c"                           0x80034  # to device_err:

# Does Device code = 0xa4 (29F040)?
assm "cmpwi   r11, 0xa4"                        0x80038
assm "beq     $+0x0c"                           0x8003c  # to device_ok:

#device_err:
assm "addi    r0, 0, -1"                        0x80040
assm "bl      $+0xd8"                           0x80044  # to done:

#device_ok:
# erase whole chip
assm "addi    r0, 0, 0xaa"                      0x80048
assm "stb     r0, 0x5555(r3)"                   0x8004c
assm "addi    r0, 0, 0x55"                      0x80050
assm "stb     r0, 0x2aaa(r3)"                   0x80054
assm "addi    r0, 0, 0x80"                      0x80058
assm "stb     r0, 0x5555(r3)"                   0x8005c
assm "addi    r0, 0, 0xaa"                      0x80060
assm "stb     r0, 0x5555(r3)"                   0x80064
assm "addi    r0, 0, 0x55"                      0x80068
assm "stb     r0, 0x2aaa(r3)"                   0x8006c
assm "addi    r0, 0, 0x10"                      0x80070
assm "stb     r0, 0x5555(r3)"                   0x80074

#erase_loop:
assm "lbz     r0, 0x0000(r3)"                   0x80078
assm "rlwinm  r0,r0,0x0,0x18,0x18"              0x8007c
assm "cmpwi   cr0, r0, 0"                       0x80080
assm "bne     $+0x28"                           0x80084  # to program_flash:
assm "lbz     r0, 0x0000(r3)"                   0x80088
assm "rlwinm  r0, r0, 0x0, 0x1a, 0x1a"          0x8008c
assm "cmpwi   cr0, r0, 0"                       0x80090
assm "beq     $-0x1c"                           0x80094  # to erase_loop:
assm "lbz     r0, 0x0000(r3)"                   0x80098
assm "rlwinm  r0, r0, 0x0, 0x18, 0x18"          0x8009c
assm "cmpwi   cr0, r0, 0"                       0x800a0
assm "bne     $+0x08"                           0x800a4  # to program_flash:
# err condition so set return code and leave
assm "bl      $-0x68"                           0x800a8  # to device_err:

#program_flash:
# Set (size) counter to 0x80000 bytes (512KB)
assm "addis   r0, 0, 0x0008"                    0x800ac
assm "ori     r0, r0, 0x0000"                   0x800b0
assm "mtctr   r0"                               0x800b4

#top_of_loop:
assm "addi    r0, 0, 0xaa"                      0x800b8
assm "stb     r0, 0x5555(r3)"                   0x800bc
assm "addi    r0, 0, 0x55"                      0x800c0
assm "stb     r0, 0x2aaa(r3)"                   0x800c4
assm "addi    r0, 0, 0xa0"                      0x800c8
assm "stb     r0, 0x5555(r3)"                   0x800cc
assm "lbz     r2, 0x0000(r4)"                   0x800d0
assm "stb     r2, 0x0(r5)"                      0x800d4

#poll:
assm "lbz     r0, 0x0000(r5)"                   0x800d8
assm "rlwinm  r0, r0, 0x0, 0x18, 0x18"          0x800dc
assm "rlwinm  r1, r2, 0x0, 0x18, 0x18"          0x800e0
assm "cmpw    cr0, r0, r1"                      0x800e4
assm "beq     $+0x28"                           0x800e8  # to increment counters

assm "lbz     r0, 0x0(r5)"                      0x800ec
assm "rlwinm  r0, r0, 0x0, 0x1a, 0x1a"          0x800f0
assm "cmpwi   cr0, r0, 0"                       0x800f4
assm "beq     $-0x20"                           0x800f8  # to poll:
assm "lbz     r0, 0x0(r5)"                      0x800fc
assm "rlwinm  r0, r0, 0x0, 0x18, 0x18"          0x80100
assm "rlwinm  r1, r2, 0x0, 0x18, 0x18"          0x80104
assm "cmpw    cr0, r0, r1"                      0x80108
assm "bne     $-0xcc"                           0x8010c  # to device_err
# increment counters
assm "addi    r4, r4, 1"                        0x80110
assm "addi    r5, r5, 1"                        0x80114
assm "bdnz    $-0x60"                           0x80118  # to top_of_loop:
#done:
assm "b       $+0"                              0x8011c

write iar 0x80000
bp set 0x8011c            # set a breakpoint at the end

print "Starting flash update."
set hid0.icfi = 1        # Invalidate icache
expr hid0.icfi
run

if (r0 == -1)
  print "Flash update failed."
else
  print "Flash update successful."
  bp clear all
endif

bp clear all

# Reboot
reset sys