syslib.c

VxWorks下 Spruce的BSP源代码

/* sysLib.c - IBM Spruce board dependent library */

/*******************************************************************************
   This source and object code has been made available to you by IBM on an
   AS-IS basis.

   IT IS PROVIDED WITHOUT WARRANTY OF ANY KIND, INCLUDING THE WARRANTIES OF
   MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE OR OF
   NONINFRINGEMENT OF THIRD PARTY RIGHTS.  IN NO EVENT SHALL IBM OR ITS
   LICENSORS BE LIABLE FOR INCIDENTAL, CONSEQUENTIAL OR PUNITIVE DAMAGES.
   IBM'S OR ITS LICENSOR'S DAMAGES FOR ANY CAUSE OF ACTION, WHETHER IN
   CONTRACT OR IN TORT, AT LAW OR AT EQUITY, SHALL BE LIMITED TO A MAXIMUM
   OF $1,000 PER LICENSE.  Anyone receiving this source or object code is
   licensed under IBM copyrights to use it in any way he or she deems fit,
   including copying it, modifying it, compiling it, and redistributing it
   either with or without modifications.  No license under IBM patents or
   patent applications is to be implied by the copyright license.

   Any user of this software should understand that neither IBM nor its
   licensors will be responsible for any consequences resulting from the
   use of this software.

   Any person who transfers this object code or any derivative work must
   include the IBM copyright notice in the transferred software.

   COPYRIGHT   I B M   CORPORATION 1999
   LICENSED MATERIAL  -  PROGRAM PROPERTY OF  I B M"

*******************************************************************************/

/* Copyright 1984-2002 Wind River Systems, Inc. */

/*
modification history
--------------------
01l,23jan03,jtp  SPR 84493 recognize 750FX PVR values 700xxxxx
01k,12sep02,pch  SPR 80223: defer excIntConnect() call until sysHwInit2
		 SPR 80274: support 750FX additional BAT registers
		 SPR 80542: recognize additional 750FX PVR value
01j,21jun02,pch  restore CPC700 initialization dropped in 01h;
		 add 750FX; report PVR if unsupported processor
01i,13jun02,pch  SPR 78620
01h,03apr02,pch  use generic pciConfigLib
01g,25mar02,pch  fix compiler warnings
01f,22jun01,pch  Adjust WRONG_CPU_MSG handling
01e,27mar01,kab  Removed IBM support info per request
01d,27mar01,pch  added FPR initialization
01c,02nov00,mcg  updated for 750CX processor
01b,14sep99,mcg  updated for Tornado 2
01a,18feb99,mcg  written (from templateppc, ver 01b)
*/

/*
DESCRIPTION
This library provides board-specific routines.  The chip drivers included are:

    byteNvRam.c    - byte-oriented generic non-volatile RAM library
    nullVme.c      - no VME support library
    ppcDecTimer.c  - system clock and timestamp driver using PPC decrementer
    CPC700Intr.c   - CPC700 Univeral Interrupt controller driver
    sysSerial.c    - prepares serial driver evbNs16550sio
    sysNet.c       - prepares PCI Ethernet driver ln97xEnd
    sysCache.c     - PowerPC 750 L2 cache library
    pciConfigLib.c - CPC700 PCI configuration library
    auxClock.c     - Auxiliary clock driver that uses CPC700 compare timer
    d1642RTC.c     - real-time clock driver for Dallas DS1642

INCLUDE FILES: sysLib.h

SEE ALSO:
.pG "Configuration"
*/

/* includes */

#include "vxWorks.h"
#include "memLib.h"
#include "cacheLib.h"
#include "sysLib.h"
#include "config.h"
#include "string.h"
#include "intLib.h"
#include "logLib.h"
#include "taskLib.h"
#include "vxLib.h"
#include "tyLib.h"
#include "arch/ppc/mmu603Lib.h"
#include "arch/ppc/vxPpcLib.h"
#include "private/vmLibP.h"
#include "stdio.h"
#include "drv/pci/pciConfigLib.h"
#include "drv/pci/pciIntLib.h"
#include "drv/pci/pciAutoConfigLib.h"
#include "usrConfig.h"
#include "cpc700.h"

/* defines */

#define ZERO    0
#define SYS_MODEL       "IBM Spruce"
#define DEC_CLOCK_FREQ  sysGetBusSpd()

/* globals */


/*
 * sysBatDesc[] is used to initialize the block address translation (BAT)
 * registers within the PowerPC 603 MMU.  BAT hits take precedence
 * over Page Table Entry (PTE) hits and are faster.  Overlap of memory
 * coverage by BATs and PTEs is permitted in cases where either the IBATs
 * or the DBATs do not provide the necessary mapping (PTEs apply to both
 * instruction AND data space, without distinction).
 *
 * The primary means of memory control for VxWorks is the MMU PTE support
 * provided by vmLib and cacheLib.  Use of BAT registers will conflict
 * with vmLib support.  User's may use BAT registers for i/o mapping and
 * other purposes but are cautioned that conflicts with cacheing and mapping
 * through vmLib may arise.  Be aware that memory spaces mapped through a BAT
 * are not mapped by a PTE and any vmLib() or cacheLib() operations on such
 * areas will not be effective, nor will they report any error conditions.
 *
 * Note: BAT registers CANNOT be disabled - they are always active.
 * For example, setting them all to zero will yield four identical data
 * and instruction memory spaces starting at local address zero, each 128KB
 * in size, and each set as write-back and cache-enabled.  Hence, the BAT regs
 * MUST be configured carefully.
 *
 * With this in mind, it is recommended that the BAT registers be used
 * to map LARGE memory areas external to the processor if possible.
 * If not possible, map sections of high RAM and/or PROM space where
 * fine grained control of memory access is not needed.  This has the
 * beneficial effects of reducing PTE table size (8 bytes per 4k page)
 * and increasing the speed of access to the largest possible memory space.
 * Use the PTE table only for memory which needs fine grained (4KB pages)
 * control or which is too small to be mapped by the BAT regs.
 *
 * The BAT configuration for 4xx/6xx-based PPC boards is as follows:
 * All BATs point to PROM/FLASH memory so that end customer may configure
 * them as required.
 *
 * [Ref: chapter 7, PowerPC Microprocessor Family: The Programming Environments]
 */

#ifdef	EXTRA_BATS
UINT32 sysBatDesc [2 * (_MMU_NUM_IBAT + _MMU_NUM_DBAT
			+ _MMU_NUM_EXTRA_IBAT + _MMU_NUM_EXTRA_DBAT)] =
#else	/* EXTRA_BATS */
UINT32 sysBatDesc [2 * (_MMU_NUM_IBAT + _MMU_NUM_DBAT)] =
#endif	/* EXTRA_BATS */
    {
    /* I BAT 0 */   /* unused */
    ((LOCAL_MEM_LOCAL_ADRS & _MMU_UBAT_BEPI_MASK) | _MMU_UBAT_BL_128K ),
    ((LOCAL_MEM_LOCAL_ADRS & _MMU_LBAT_BRPN_MASK)),

    /* I BAT 1 */   /* unused */
    ((LOCAL_MEM_LOCAL_ADRS & _MMU_UBAT_BEPI_MASK) | _MMU_UBAT_BL_128K ),
    ((LOCAL_MEM_LOCAL_ADRS & _MMU_LBAT_BRPN_MASK)),

    /* I BAT 2 */   /* unused */
    ((LOCAL_MEM_LOCAL_ADRS & _MMU_UBAT_BEPI_MASK) | _MMU_UBAT_BL_128K ),
    ((LOCAL_MEM_LOCAL_ADRS & _MMU_LBAT_BRPN_MASK)),

    /* I BAT 3 */   /* unused */
    ((LOCAL_MEM_LOCAL_ADRS & _MMU_UBAT_BEPI_MASK) | _MMU_UBAT_BL_128K ),
    ((LOCAL_MEM_LOCAL_ADRS & _MMU_LBAT_BRPN_MASK)),

    /* D BAT 0 */   /* PCI Memory Space */
    ((PCI_MEMORY_START & _MMU_UBAT_BEPI_MASK) | _MMU_UBAT_BL_256M |
    _MMU_UBAT_VS | _MMU_UBAT_VP),
    ((PCI_MEMORY_START & _MMU_LBAT_BRPN_MASK) | _MMU_LBAT_CACHE_INHIBIT |
    _MMU_LBAT_PP_RW),

    /* D BAT 1 */   /* PCI I/O Space, CPC700 periherals, and boot ROM */
    ((PCI_IO_REGION_1_START & _MMU_UBAT_BEPI_MASK) | _MMU_UBAT_BL_128M |
    _MMU_UBAT_VS | _MMU_UBAT_VP),
    ((PCI_IO_REGION_1_START & _MMU_LBAT_BRPN_MASK) | _MMU_LBAT_CACHE_INHIBIT |
    _MMU_LBAT_PP_RW),

    /* D BAT 2 */   /* unused */
    ((LOCAL_MEM_LOCAL_ADRS & _MMU_UBAT_BEPI_MASK) | _MMU_UBAT_BL_128K),
    ((LOCAL_MEM_LOCAL_ADRS & _MMU_LBAT_BRPN_MASK)),

    /* D BAT 3 */   /* unused */
    ((LOCAL_MEM_LOCAL_ADRS & _MMU_UBAT_BEPI_MASK) | _MMU_UBAT_BL_128K),
    ((LOCAL_MEM_LOCAL_ADRS & _MMU_LBAT_BRPN_MASK))

#ifdef	EXTRA_BATS
    ,
    /*
     * These entries are for the the I/D BAT's (4-7) on the PPC750FX.
     * They are defined in the following order.
     * IBAT4U,IBAT4L,IBAT5U,IBAT5L,IBAT6U,IBAT6L,IBAT7U,IBAT7L,
     * DBAT4U,DBAT4L,DBAT5U,DBAT5L,DBAT6U,DBAT6L,DBAT7U,DBAT7L,
     */
    /* I BAT 4 */   /* unused */
    ((LOCAL_MEM_LOCAL_ADRS & _MMU_UBAT_BEPI_MASK) | _MMU_UBAT_BL_128K ),
    ((LOCAL_MEM_LOCAL_ADRS & _MMU_LBAT_BRPN_MASK)),

    /* I BAT 5 */   /* unused */
    ((LOCAL_MEM_LOCAL_ADRS & _MMU_UBAT_BEPI_MASK) | _MMU_UBAT_BL_128K ),
    ((LOCAL_MEM_LOCAL_ADRS & _MMU_LBAT_BRPN_MASK)),

    /* I BAT 6 */   /* unused */
    ((LOCAL_MEM_LOCAL_ADRS & _MMU_UBAT_BEPI_MASK) | _MMU_UBAT_BL_128K ),
    ((LOCAL_MEM_LOCAL_ADRS & _MMU_LBAT_BRPN_MASK)),

    /* I BAT 7 */   /* unused */
    ((LOCAL_MEM_LOCAL_ADRS & _MMU_UBAT_BEPI_MASK) | _MMU_UBAT_BL_128K ),
    ((LOCAL_MEM_LOCAL_ADRS & _MMU_LBAT_BRPN_MASK)),

    /* D BAT 4 */   /* unused */
    ((LOCAL_MEM_LOCAL_ADRS & _MMU_UBAT_BEPI_MASK) | _MMU_UBAT_BL_128K),
    ((LOCAL_MEM_LOCAL_ADRS & _MMU_LBAT_BRPN_MASK)),

    /* D BAT 5 */   /* unused */
    ((LOCAL_MEM_LOCAL_ADRS & _MMU_UBAT_BEPI_MASK) | _MMU_UBAT_BL_128K),
    ((LOCAL_MEM_LOCAL_ADRS & _MMU_LBAT_BRPN_MASK)),

    /* D BAT 6 */   /* unused */
    ((LOCAL_MEM_LOCAL_ADRS & _MMU_UBAT_BEPI_MASK) | _MMU_UBAT_BL_128K),
    ((LOCAL_MEM_LOCAL_ADRS & _MMU_LBAT_BRPN_MASK)),

    /* D BAT 7 */   /* unused */
    ((LOCAL_MEM_LOCAL_ADRS & _MMU_UBAT_BEPI_MASK) | _MMU_UBAT_BL_128K),
    ((LOCAL_MEM_LOCAL_ADRS & _MMU_LBAT_BRPN_MASK))
#endif	/* EXTRA_BATS */
    };


/*
 * sysPhysMemDesc[] is used to initialize the Page Table Entry (PTE) array
 * used by the MMU to translate addresses with single page (4k) granularity.
 * PTE memory space should not, in general, overlap BAT memory space but
 * may be allowed if only Data or Instruction access is mapped via BAT.
 *
 * Address translations for local RAM, memory mapped PCI bus, memory mapped
 * VME A16 space and local PROM/FLASH are set here.
 *
 * PTEs are held, strangely enough, in a Page Table.  Page Table sizes are
 * integer powers of two based on amount of memory to be mapped and a
 * minimum size of 64 kbytes.  The MINIMUM recommended Page Table sizes
 * for 32-bit PowerPCs are:
 *
 * Total mapped memory          Page Table size
 * -------------------          ---------------
 *        8 Meg                      64 K
 *       16 Meg                     128 K
 *       32 Meg                     256 K
 *       64 Meg                     512 K
 *      128 Meg                       1 Meg
 *      .                               .
 *      .                               .
 *      .                               .
 *
 * [Ref: chapter 7, PowerPC Microprocessor Family: The Programming Environments]
 */


PHYS_MEM_DESC sysPhysMemDesc [] =
    {
    {
    /* Vector Table and Interrupt Stack */

    (void *) LOCAL_MEM_LOCAL_ADRS,
    (void *) LOCAL_MEM_LOCAL_ADRS,
    RAM_LOW_ADRS,
    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE_NOT
    },

    {
    /* Local DRAM - MUST be second entry in table, see sysHwInit */

    (void *) RAM_LOW_ADRS,
    (void *) RAM_LOW_ADRS,
    LOCAL_MEM_SIZE -  RAM_LOW_ADRS, /* Dynamically changed by sysHwInit */
    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE
    }
    };

int sysPhysMemDescNumEnt = NELEMENTS (sysPhysMemDesc);

int   sysBus      = 0;			/* system bus type */
int   sysCpu      = CPU;                /* system CPU type (PPCxxx) */
char *sysBootLine = BOOT_LINE_ADRS;     /* address of boot line */
char *sysExcMsg   = EXC_MSG_ADRS;       /* catastrophic message area */
int   sysProcNum;                       /* processor number of this CPU */
int   sysFlags;                         /* boot flags */
char  sysBootHost [BOOT_FIELD_LEN];     /* name of host from which we booted */
char  sysBootFile [BOOT_FIELD_LEN];     /* name of file from which we booted */

/* locals */

LOCAL char sysModelStr[80] = SYS_MODEL;
#if     (CPU == PPC604)
LOCAL char wrongCpuMsg[] = WRONG_CPU_MSG;
/* Make sure this is big enough for the sprintf() in sysCpuCheck() */
LOCAL char wrongCpuPvr[] = "[PVR=xxxxxxxx]!\r\n";
LOCAL int sysInCpuCheck = 0;	/* recursion preventer */
#endif /* CPU == PPC604 */

/* forward declarations */

void    sysSpuriousIntHandler(void);
void    sysCpuCheck (void);
char *  sysPhysMemTop (void);
int     sysGetBusSpd (void);
void    sysLocalDelay (UINT32);

/* externals */

IMPORT void   sysWritePifCfg(int, int);
IMPORT int    sysReadPifCfg(int);
IMPORT void   sysFprInit(void);

IMPORT ULONG sysPciInLong(ULONG) ;
IMPORT void sysPciOutLong(ULONG, ULONG) ;

IMPORT void sysPciOutWord(ULONG, USHORT) ;
IMPORT USHORT sysPciInWord(ULONG) ;

IMPORT void sysPciOutByte(ULONG, UCHAR) ;
IMPORT UCHAR sysPciInByte(ULONG) ;

#ifdef	EXTRA_BATS
/*
 * mmuPpcBatInit750fx initializes the standard 4 (0-3)  I/D BAT's &
 * the additional 4 (4-7) I/D BAT's present on the PPC750FX.
 */
IMPORT void mmuPpcBatInit750fx (UINT32 *pSysBatDesc);

/* If running on a 750FX, _pSysBatInitFunc needs to be set
 * to the above function to make use of the additional BAT's.
 * If this is not set or is set to NULL then the standard mmuPpcBatInit
 * fn. would be called which would initialize only the (0-3) I/D BAT's
 */
IMPORT FUNCPTR _pSysBatInitFunc;

#endif	/* EXTRA_BATS */

/* BSP DRIVERS */

#include "mem/byteNvRam.c"
#include "vme/nullVme.c"
#include "timer/ppcDecTimer.c"
#include "cpc700Intr.c"
#include "sysSerial.c"
#include "sysNet.c"
#include "sysCache.c"             /* special cache setup */
#include "pci/pciIntLib.c"
#include "pci/pciConfigLib.c"
#include "pci/pciAutoConfigLib.c"
#include "sysPciInit.c"
#ifdef INCLUDE_SHOW_ROUTINES
# include "pci/pciConfigShow.c"
#endif /* INCLUDE_SHOW_ROUTINES */
#include "auxClock.c"             /* auxiliary clock driver */
#ifdef INCLUDE_RTC
#include "d1643RTC.c"             /* real time clock */
#endif

/******************************************************************************
*
* sysModel - return the model name of the CPU board
*
* This routine returns the model name of the CPU board.  The returned string
* depends on the board model and CPU version being used, for example,
* "IBM CPC700 Spruce PPC 603e".
*
* RETURNS: A pointer to the string.
*/

char * sysModel
    (
    void
    )
    {
    int cpu;

    /*
     * Determine CPU type and build display string
     */
    cpu = CPU_TYPE;
    switch (cpu)
        {
        case CPU_TYPE_603EV:
            sprintf (sysModelStr, "IBM Spruce 603ev");
            break;
        case CPU_TYPE_603E:
            sprintf (sysModelStr, "IBM Spruce 603e");
            break;
        case CPU_TYPE_740_750:
            sprintf (sysModelStr, "IBM Spruce 740/750");
            break;
        case CPU_TYPE_740L_750L:
        case CPU_TYPE_740L_750L_2:
        case CPU_TYPE_740L_750L_3:
            sprintf (sysModelStr, "IBM Spruce 740L/750L");
            break;
        case CPU_TYPE_750CX:
            sprintf (sysModelStr, "IBM Spruce 750CX");
            break;
        case CPU_TYPE_750FX:
            sprintf (sysModelStr, "IBM Spruce 750FX, with L2_TSTCLK low");
            break;
        case CPU_TYPE_750FX_7K:
            sprintf (sysModelStr, "IBM Spruce 750FX");
            break;
        default:
	    if (((cpu >> 16) & 0xfff0) == CPU_FAMILY_750FX)
		sprintf (sysModelStr, "IBM Spruce 750FX");
	    else
		sprintf (sysModelStr, "Processor type 0x%08x not supported",
		    vxPvrGet());
            break;
        }

    return (sysModelStr);
    }

/*******************************************************************************
*
* sysBspRev - return the BSP version and revision number
*
* This routine returns a pointer to a BSP version and revision number, for
* example, 1.1/0. BSP_REV is concatenated to BSP_VERSION and returned.
*
* RETURNS: A pointer to the BSP version/revision string.
*/
char * sysBspRev
    (
    void
    )
    {
    return (BSP_VERSION BSP_REV);
    }

/*******************************************************************************
*
* sysHwInit - initialize the system hardware
*
* This routine initializes various features of the board.
* It is the first board-specific C code executed, and runs with
* interrupts masked in the processor.
* This routine resets all devices to a quiescent state, typically
* by calling driver initialization routines.
*
* NOTE: Because this routine will be called from sysToMonitor(), it must
* shutdown all potential DMA master devices.  If a device is doing DMA
* at reboot time, the DMA could interfere with the reboot. For devices
* on non-local busses, this is easy if the bus reset or sysFail line can
* be asserted.
*
* NOTE: This routine should not be called directly by the user application.
*
* RETURNS: N/A
*/
void sysHwInit
    (
    void
    )
    {

    /*
     * Validate CPU type
     */
    sysCpuCheck();

    /*
     * Initialize the FPR's
     */
    sysFprInit ();

    /*
     * Interrupt system initialization
     */
    sysCPC700IntrInit ();

#if defined(INCLUDE_MMU)
#ifdef	EXTRA_BATS
    if (CPU_TYPE == CPU_TYPE_750FX || CPU_TYPE == CPU_TYPE_750FX_7K ||
	((CPU_TYPE >> 16) & 0xfff0) == CPU_FAMILY_750FX)
	_pSysBatInitFunc = (FUNCPTR) mmuPpcBatInit750fx;
#endif	/* EXTRA_BATS */
    /*