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📄 sysnetif.c

📁 VxWorks下 Spruce的BSP源代码
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    if (unit >= feiUnits)	return (ERROR);    /* locate the 82557 based adapter. PRO100B and XXX */    if (pReso->boardType == TYPE_PRO100B_PCI)	/* only do setup once */	{	}    else         {	/* read the configuration in EEPROM */	for (ix = 0; ix < EE_SIZE; ix++) 	    {	    value = sys557eepromRead (unit, ix);	    pReso->eeprom[ix] = value;	    sum += value;	    }#ifdef DEBUG	printf("eeprom contents: \n") ;	for (ix = 1 ; ix <= EE_SIZE ; ix++)	{		printf("0x%x ", (UINT16) pReso->eeprom[ix-1]) ;		if (((ix) % 0x08) == 0)			printf("\n") ;	}	printf("\n(sys557Init) eeprom calculated checksum: 0x%x\n", sum);#endif	if (sum != EE_CHECKSUM)	    printf ("i82557(%d): Invalid EEPROM checksum %#4.4x\n", unit, sum);#if 0 /* ZZZZZZZZZZZZZZZ */	/* DP83840 (PHY chip) specific setup */	/* PCS Sublayer Configuration Register */	if (((pReso->eeprom[6]>>8) & 0x3f) == DP83840)	{	    /*	     * unit, phyid, location	     *	     * location 23 = 0x17...	     */	    int reg23 = sys557mdioRead (unit, pReso->eeprom[6] & 0x1f, 23);	    sys557mdioWrite (unit, pReso->eeprom[6] & 0x1f, 23, reg23 | 0x0420);	}#endif	/* perform a system self-test. */        pReso->timeout     = 16000;		/* Timeout for set-test. */        pReso->pResults    = (int *) ((((int) pReso->str) + 0xf) & ~0xf);	pReso->pResults[0] = 0;	pReso->pResults[1] = -1;	sysPciOutLong (pReso->membaseCsr+SCB_PORT, (int)pReso->pResults | 1);	do {	    sysDelay ();	/* delay for one IO READ cycle */        } while ((pReso->pResults[1] == -1)  &&  (--pReso->timeout >= 0));        pReso->boardType = TYPE_PRO100B_PCI;	}    /* initializes the board information structure */    /* INT_VEC_PCI_SLOT2 = 24     * INT_LVL_PCI_SLOT2 = 24 defined in cpc700.h     */#if 0    pBoard->vector	  = pReso->irq + INT_NUM_IRQ0; /* ZZZZZZZZZZZZZ */    pBoard->vector	  = INT_VEC_PCI_SLOT2 ;    pBoard->level	  = INT_LVL_PCI_SLOT2 ;#endif    pBoard->vector	  = pReso->irq ;    pBoard->level	  = pReso->irq ;    pBoard->baseAddr	  = pReso->membaseCsr;    for (ix = 0, iy = 0; ix < 3; ix++)	{	pBoard->enetAddr[iy++] = pReso->eeprom[ix] & 0xff;	pBoard->enetAddr[iy++] = (pReso->eeprom[ix] >> 8) & 0xff;	}#ifdef DEBUG    {      int xx ;      printf("enet addr: ") ;      for (xx=0 ; xx < 6 ; xx++)      {         printf("0x%x ", pBoard->enetAddr[xx]) ;      }      printf("\n") ;    }#endif#ifdef INCLUDE_SPRUCE_NETWORK    pBoard->intEnable	  = sysLanIntEnable; /* ZZZZZZZZZ */    pBoard->intDisable	  = sysLanIntDisable; /* ZZZZZZZZZZ */#endif#if 0    pBoard->intEnable	  = sys557IntEnable;    pBoard->intDisable	  = sys557IntDisable;#endif    pBoard->intAck	  = sys557IntAck;    pBoard->sysLocalToBus = NULL; 	/* 1:1 mapping */    pBoard->sysBusToLocal = NULL; 	/* 1:1 mapping */#ifdef FEI_10MB     pBoard->phySpeed	  = NULL;    pBoard->phyDpx	  = NULL;#endif#if 0 /* ZZZZZZZZZZZZ */    sysIntEnablePIC (pReso->irq);#endif    return (OK);    }/********************************************************************************* sys557IntAck - acknowledge an 82557 interrupt** This routine performs any 82557 interrupt acknowledge that may be* required.  This typically involves an operation to some interrupt* control hardware.** This routine gets called from the 82557 driver's interrupt handler.** This routine assumes that the PCI configuration information has already* been setup.** RETURNS: OK, or ERROR if the interrupt could not be acknowledged.*/LOCAL STATUS sys557IntAck    (    int	unit		/* unit number */    )    {    FEI_RESOURCE *pReso = &feiResources [unit];    switch (pReso->boardType)	{	case TYPE_PRO100B_PCI:		/* handle PRO100B LAN Adapter */	    /* no addition work necessary for the PRO100B */	    break;	default:	    return (ERROR);	}    return (OK);    }#if 0 /* ZZZZZZZZZZ *//********************************************************************************* sys557IntEnable - enable 82557 interrupts** This routine enables 82557 interrupts.  This may involve operations on* interrupt control hardware.** The 82557 driver calls this routine throughout normal operation to terminate* critical sections of code.** This routine assumes that the PCI configuration information has already* been setup.** RETURNS: OK, or ERROR if interrupts could not be enabled.*/LOCAL STATUS sys557IntEnable    (    int	unit		/* unit number */    )    {    FEI_RESOURCE *pReso = &feiResources [unit];    switch (pReso->boardType)	{	case TYPE_PRO100B_PCI:		/* handle PRO100B LAN Adapter */	    /* no addition work necessary for the PRO100B */	    break;	default:	    return (ERROR);	}    return (OK);    }/********************************************************************************* sys557IntDisable - disable 82557 interrupts** This routine disables 82557 interrupts.  This may involve operations on* interrupt control hardware.** The 82557 driver calls this routine throughout normal operation to enter* critical sections of code.** This routine assumes that the PCI configuration information has already* been setup.** RETURNS: OK, or ERROR if interrupts could not be disabled.*/LOCAL STATUS sys557IntDisable    (    int	unit		/* unit number */    )    {    FEI_RESOURCE *pReso = &feiResources [unit];    switch (pReso->boardType)	{	case TYPE_PRO100B_PCI:		/* handle PRO100B LAN Adapter */	    /* no addition work necessary for the PRO100B */	    break;	default:	    return (ERROR);	}    return (OK);    }#endif/********************************************************************************* sys557eepromRead - read a word from the 82557 EEPROM** RETURNS: the EEPROM data word read in.** NOTE: sysPciOutWord swaps bytes when writing out.* */#define VXWORKS_IMPL 1#define EE_ENB (0x4800 | EE_CS)#define EE_READ_CMD (7 << EE_ADDR_BITS)LOCAL UINT16 sys557eepromRead    (    int	unit,		/* unit number */    int	location	/* address of word to be read */    )    {    UINT32 membase = feiResources[unit].membaseCsr;    UINT32 ee_addr = membase + SCB_EEPROM ;    UINT16 retval = 0 ;    UINT16 dataval;    volatile UINT16 dummy;    int ix;#ifdef LINUX_IMPL    UINT32 read_cmd = location | EE_READ_CMD ;    int i ;#endif #ifdef VXWORKS_IMPL    sysPciOutWord (ee_addr, EE_CS);	/* enable EEPROM */#endif#ifdef LINUX_IMPL    sysPciOutWord(ee_addr, EE_ENB & ~EE_CS) ;    sysPciOutWord(ee_addr, EE_ENB) ;    for (i=12 ; i >= 0 ; i--)    {	    dataval = (read_cmd & (1 << i)) ? EE_DI : 0 ;	    sysPciOutWord(ee_addr, EE_ENB | dataval) ;	    sysDelay() ;	    sysPciOutWord(ee_addr, EE_ENB | dataval | EE_SK) ;	    sysDelay() ;    }    sysPciOutWord(ee_addr, EE_ENB) ;    for (i = 15 ; i >= 0 ; i--)    {	    sysPciOutWord(ee_addr, EE_ENB | EE_SK) ;	    sysDelay() ;	    retval = (UINT16)((retval << 1) | ((sysPciInWord(ee_addr) & EE_DO) ? 1 : 0)) ;	    sysPciOutWord(ee_addr, EE_ENB) ;	    sysDelay() ;	    }    sysPciOutWord(ee_addr, EE_ENB & ~EE_CS) ;#endif#ifdef VXWORKS_IMPL    /* write the READ opcode */    for (ix = EE_CMD_BITS - 1; ix >= 0; ix--)    {        dataval = (EE_CMD_READ & (1 << ix)) ? EE_DI : 0;        sysPciOutWord (ee_addr, EE_CS | dataval);        sysDelay ();	/* delay for one IO READ cycle */        sysPciOutWord (ee_addr, EE_CS | dataval | EE_SK);        sysDelay ();	/* delay for one IO READ cycle */#if 0        sysPciOutWord (ee_addr, EE_CS | dataval);         sysDelay ();	/* delay for one IO READ cycle */#endif    }    /* write the location */    for (ix = EE_ADDR_BITS - 1; ix >= 0; ix--)    {        dataval = (location & (1 << ix)) ? EE_DI : 0;        sysPciOutWord (ee_addr, EE_CS | dataval);        sysDelay ();	/* delay for one IO READ cycle */        sysPciOutWord (ee_addr, EE_CS | dataval | EE_SK);        sysDelay ();	/* delay for one IO READ cycle */        sysPciOutWord (ee_addr, EE_CS | dataval);         sysDelay ();	/* delay for one IO READ cycle */    	dummy = sysPciInWord (ee_addr);    }    if ((dummy & EE_DO) == 0)		/* dummy read */	;     /* read the data */    for (ix = EE_DATA_BITS - 1; ix >= 0; ix--)    {        sysPciOutWord (ee_addr, EE_CS | EE_SK);        sysDelay ();	/* delay for one IO READ cycle */        retval = (retval << 1) | 	         ((sysPciInWord (ee_addr) & EE_DO) ? 1 : 0);        sysPciOutWord (ee_addr, EE_CS);        sysDelay ();	/* delay for one IO READ cycle */    }     sysPciOutWord (ee_addr, 0x00);	/* disable EEPROM */#endif    return (retval);    }#if 0/********************************************************************************* sys557mdioRead - read MDIO* phyId - PHY Address* location = PHY Register Address** RETURNS: read value*/LOCAL UINT32 sys557mdioRead    (    int	unit,		/* unit number */    int phyId,		/* PHY ID */    int location	/* location to read */    )    {    UINT32 membase = feiResources[unit].membaseCsr;/* ZZZZZZZZ */    int timeout   = 64*4;	/* <64 usec. to complete, typ 27 ticks */    int val;    sysPciOutLong (membase+SCB_MDI, 0x08000000 | (location<<16) | (phyId<<21));    do {    	sysDelay ();	/* delay for one IO READ cycle */    	val = sysPciInLong (membase+SCB_MDI);    	if (--timeout < 0)    	    printf ("sys557mdioRead() timed out with val = %8.8x.\n", val);        } while (! (val & 0x10000000));    return (val & 0xffff);    }/********************************************************************************* sys557mdioWrite - write MDIO** RETURNS: write value*/LOCAL UINT32 sys557mdioWrite    (    int unit,		/* unit number */    int phyId,		/* PHY ID */    int location,	/* location (register) to write */    int value		/* value to write */    )    {    UINT32 membase = feiResources[unit].membaseCsr;/* ZZZZZZZ */    int timeout   = 64*4;	/* <64 usec. to complete, typ 27 ticks */    int val;    sysPciOutLong (membase+SCB_MDI,		0x04000000 | (location<<16) | (phyId<<21) | value);    do {    	sysDelay ();	/* delay for one IO READ cycle */    	val = sysPciInLong (membase+SCB_MDI);    	if (--timeout < 0)    	    printf ("sys557mdioWrite() timed out with val = %8.8x.\n", val);        } while (! (val & 0x10000000));    return (val & 0xffff);    }#endif/********************************************************************************* sys557Show - shows 82557 configuration ** this routine shows (Intel Pro Express 100) configuration ** RETURNS: N/A*/void sys557Show    (    int	unit		/* unit number */    )    {    FEI_RESOURCE *pReso = &feiResources [unit];    UINT16 membase       = pReso->membaseCsr;    UCHAR etheraddr[6];    int ix;    int iy;    if (unit >= feiUnits)	{	printf ("none\n");	return;	}    for (ix = 0, iy = 0; ix < 3; ix++) 	{        etheraddr[iy++] = pReso->eeprom[ix];        etheraddr[iy++] = pReso->eeprom[ix] >> 8;        }    printf ("82557(%d): Intel EtherExpress Pro 10/100 at %#3x ", unit, membase);    for (ix = 0; ix < 5; ix++)    	printf ("%2.2X:", etheraddr[ix]);    printf ("%2.2X\n", etheraddr[ix]);    printf ("CSR mem base address = %x, Flash mem base address = %x\n", 	    pReso->membaseCsr, pReso->membaseFlash);    printf ("PCI bus no. = %x, device no. = %x, function no. = %x, IRQ = %d\n",	    pReso->pciBus, pReso->pciDevice, pReso->pciFunc, pReso->irq);    if (pReso->eeprom[3] & 0x03)        printf ("Receiver lock-up bug exists -- enabling work-around.\n");    printf ("Board assembly %4.4x%2.2x-%3.3d, Physical connectors present:",	pReso->eeprom[8], pReso->eeprom[9]>>8, pReso->eeprom[9] & 0xff);    for (ix = 0; ix < 4; ix++)	if (pReso->eeprom[5] & (1 << ix))	    printf (connectors [ix]);    printf ("\nPrimary interface chip %s PHY #%d.\n",	phys[(pReso->eeprom[6]>>8)&7], pReso->eeprom[6] & 0x1f);    if (pReso->eeprom[7] & 0x0700)	printf ("Secondary interface chip %s.\n", 		phys[(pReso->eeprom[7]>>8)&7]);#if	FALSE  /* we don't show PHY specific info at this time */    /* ToDo: Read and set PHY registers through MDIO port. */    for (ix = 0; ix < 2; ix++)	printf ("MDIO register %d is %4.4x.\n",		ix, sys557mdioRead (unit, pReso->eeprom[6] & 0x1f, ix));    for (ix = 5; ix < 7; ix++)	printf ("MDIO register %d is %4.4x.\n",		ix, sys557mdioRead (unit, pReso->eeprom[6] & 0x1f, ix));    printf ("MDIO register %d is %4.4x.\n",	    25, sys557mdioRead (unit, pReso->eeprom[6] & 0x1f, 25));#endif	/* FALSE */    if (pReso->timeout < 0)         {		/* Test optimized out. */	printf ("Self test failed, status %8.8x:\n"	        " Failure to initialize the 82557.\n"	        " Verify that the card is a bus-master capable slot.\n",	        pReso->pResults[1]);	}    else         {	printf ("General self-test: %s.\n"	        " Serial sub-system self-test: %s.\n"	        " Internal registers self-test: %s.\n"	        " ROM checksum self-test: %s (%#8.8x).\n",	        pReso->pResults[1] & 0x1000 ? "failed" : "passed",	        pReso->pResults[1] & 0x0020 ? "failed" : "passed",	        pReso->pResults[1] & 0x0008 ? "failed" : "passed",	        pReso->pResults[1] & 0x0004 ? "failed" : "passed",	        pReso->pResults[0]);        }    }#endif /* INCLUDE_FEI */

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