sysalib.s

VxWorks下 Spruce的BSP源代码

FUNC_BEGIN(sysPciInByte)
        lbzx    r3,r0,r3        /* Read byte from PCI space */
        sync                   /* Sync I/O operation */
        bclr    20,0            /* Return to caller */
FUNC_END(sysPciInByte)

/*****************************************************************************
*
* sysPciInWord - reads a word (16-bit big-endian) from PCI Config Space.
*
* This function reads a word from a specified PCI Config Space (little-endian)
* address.  It uses the load halfword byte-reversed instruction.
*
* ARGUMENTS:
*       r3      = Config Space address
*
* RETURNS:
*       r3      = word (16-bit big-endian) from address.
*/

FUNC_BEGIN(sysPciInWord)
        lhbrx   r3,r0,r3        /* Read and swap from PCI space */
        sync                   /* Sync I/O operation */
        bclr    20,0            /* Return to caller */
FUNC_END(sysPciInWord)

/*****************************************************************************
*
* sysPciInLong - reads a long (32-bit big-endian) from PCI Config Space.
*
* This function reads a long from a specified PCI Config Space (little-endian)
* address.  It uses the load word byte-reversed instruction.
*
* ARGUMENTS:
*       r3      = Config Space address
*
* RETURNS:
*       r3      = long (32-bit big-endian) from address.
*/

FUNC_BEGIN(sysPciInLong)
        lwbrx   r3,r0,r3        /* Read and swap from PCI space */
        sync                   /* Sync I/O operation */
        bclr    20,0            /* Return to caller */
FUNC_END(sysPciInLong)

/******************************************************************************
*
* sysPciOutByte - writes a byte to PCI Config Space.
*
* This function writes a byte to a specified PCI Config Space address.
*
* ARGUMENTS:
*       r3      = Config Space address
*       r4      = byte to write
*
* RETURNS: N/A
*/

FUNC_BEGIN(sysPciOutByte)
        stbx    r4,r0,r3        /* Write a byte to PCI space */
        sync                   /* Sync I/O operation */
        bclr    20,0            /* Return to caller */
FUNC_END(sysPciOutByte)

/******************************************************************************
*
* sysPciOutWord - writes a word (16-bit big-endian) to PCI Config Space.
*
* This function writes a word to a specified PCI Config Space (little-endian)
* address.  It uses the store halfword byte-reversed instruction.
*
* ARGUMENTS:
*       r3      = Config Space address
*       r4      = word (16-bit big-endian) to write
*
* RETURNS: N/A
*/

FUNC_BEGIN(sysPciOutWord)
        sthbrx  r4,r0,r3        /* Write with swap to PCI space */
        sync                   /* Sync I/O operation */
        bclr    20,0            /* Return to caller */
FUNC_END(sysPciOutWord)

/******************************************************************************
*
* sysPciOutLong - writes a long (32-bit big-endian) to PCI Config Space.
*
* This function writes a long to a specified PCI Config Space (little-endian)
* address.  It uses the store word byte-reversed instruction.
*
* ARGUMENTS:
*       r3      = Config Space address
*       r4      = long (32-bit big-endian) to write
*
* RETURNS: N/A
*/

FUNC_BEGIN(sysPciOutLong)
        stwbrx  r4,r0,r3        /* Write big-endian long to little-endian */
        mr      r3,r4           /* PCI space */
        sync                   /* Sync I/O operation */
        bclr    20,0            /* Return to caller */
FUNC_END(sysPciOutLong)

/*******************************************************************************
*
* sysMemProbeSup - sysBusProbe support routine
*
* This routine is called to try to read byte, word, or long, as specified
* by length, from the specified source to the specified destination.
*
* RETURNS: OK if successful probe, else ERROR
*
* STATUS sysMemProbeSup
*     (
*     int         length, /@ length of cell to test (1, 2, 4) @/
*     char *      src,    /@ address to read @/
*     char *      dest    /@ address to write @/
*     )
*/

FUNC_BEGIN(sysMemProbeSup)
        addi    r10, r3, 0      /* save length to r10 */
        xor     r3, r3, r3      /* set return status */
        cmpwi   r10, 1          /* check for byte access */
        bne     sbpShort        /* no, go check for short word access */
        lbz     r9, 0(r4)       /* load byte from source */
        stb     r9, 0(r5)       /* store byte to destination */
        isync                   /* enforce for immediate exception handling */
        blr
sbpShort:
        cmpwi   r10, 2          /* check for short word access */
        bne     sbpWord         /* no, check for word access */
        lhz     r9, 0(r4)       /* load half word from source */
        sth     r9, 0(r5)       /* store half word to destination */
        isync                   /* enforce for immediate exception handling */
        blr
sbpWord:
        cmpwi   r10, 4           /* check for short word access */
        bne     sysProbeExc     /* no, check for double word access */
        lwz     r9, 0(r4)       /* load half word from source */
        stw     r9, 0(r5)       /* store half word to destination */
        isync                   /* enforce for immediate exception handling */
        blr
sysProbeExc:
        li      r3, -1          /* shouldn't ever get here, but... */
        blr
FUNC_END(sysMemProbeSup)

/*******************************************************************************
* sysWritePifCfg - Write to a CPC700 Processor Interface Register
*
* This routine writes the value contained in r4 to the Processor Interface
* register specified by r3.
*
* RETURNS: Nothing
*
* (void) sysWritePifCfg
*     (
*     int         reg_offset, /@ the processor interface register
*     int         value       /@ value to be written
*     )
*/

FUNC_BEGIN(sysWritePifCfg)
        mfmsr   r8
        addi    r7,0,0x7FFF               /* Mask external interrupts */
        oris    r7,r7,0xFFFF
        and     r7,r7,r8
        mtmsr   r7
        addis   r5,r0, HIADJ(PIFCFGADR)
        ori     r5,r5, LO(PIFCFGADR)
        stw     r3,0x0000(r5)             /* write reg offset */
        addis   r5,r0, HIADJ(PIFCFGDATA)
        ori     r5,r5, LO(PIFCFGDATA)
        stw     r4,0x0000(r5)             /* write data */
        sync
        mtmsr   r8                        /* restore interrupts */
        blr
FUNC_END(sysWritePifCfg)

/*******************************************************************************
* sysReadPifCfg - Read a CPC700 Processor Interface Register
*
* This routine reads the Processor Interface register specified by r3
* and returns the value in r3
*
* RETURNS: contents of 32 bit Processor Interface register
*
* int sysReadPifCfg
*     (
*     int         reg_offset, /@ the processor interface register
*     )
*/

FUNC_BEGIN(sysReadPifCfg)
        mfmsr   r8
        addi    r7,0,0x7FFF               /* Mask external interrupts */
        oris    r7,r7,0xFFFF
        and     r7,r7,r8
        mtmsr   r7
        addis   r5,r0, HIADJ(PIFCFGADR)
        ori     r5,r5, LO(PIFCFGADR)
        stw     r3,0x0000(r5)             /* write reg offset */
        addis   r5,r0, HIADJ(PIFCFGDATA)
        ori     r5,r5, LO(PIFCFGDATA)
        lwz     r3,0x0000(r5)             /* read data */
        sync
        mtmsr   r8                        /* restore interrupts */
        blr
FUNC_END(sysReadPifCfg)

/*******************************************************************************
* sysDisableL2  - Disables the 750 L2 cache
*
* This routine disables the 750 L2 cache.  No parameters.
*
* RETURNS: Nothing
*
* void sysDisableL2
*     (
*     void
*     )
*/

FUNC_BEGIN(sysDisableL2)
        mfspr   r3, L2CR
        rlwinm  r3, r3, 0, 1, 31                /* turn off the L2 enable bit */
        mtspr   L2CR, r3
        blr
FUNC_END(sysDisableL2)

/*******************************************************************************
* sysReadL2CR  - Read 750 L2 cache control register
*
* This routine reads the 750 L2 cache.  No parameters.
*
* RETURNS: Contents of the L2CR register
*
* ULONG sysReadL2CR
*     (
*     void
*     )
*/

FUNC_BEGIN(sysReadL2CR)
        mfspr   r3, L2CR
        blr
FUNC_END(sysReadL2CR)

/*******************************************************************************
* sysWriteL2CR  - Writes 750 L2 cache control register
*
* This routine writes the 750 L2 cache.  Parameters is value to be written.
*
* RETURNS: Nothing
*
*  void sysWriteL2CR
*     (
*     ULONG
*     )
*/

FUNC_BEGIN(sysWriteL2CR)
        mtspr   L2CR, r3
        blr
FUNC_END(sysWriteL2CR)

/*******************************************************************************
* sysSync - executes PowerPC sync instruction
*
* This routine executes the PowerPC sync instruction.
*
* RETURNS: Nothing
*
*  void sysSync
*     (
*     void
*     )
*/

FUNC_BEGIN(sysSync)
        sync
        blr
FUNC_END(sysSync)

/*******************************************************************************
* sysDcbz - establishes one cache line of zeros using the dcbz instruction
*
* This routine uses the dcbz instruction to establish one cache line of zeros
* at the specified address.
*
* RETURNS: Nothing
*
*  void sysDcbz
*     (
*     void * address
*     )
*/

FUNC_BEGIN(sysDcbz)
        dcbz    r0,r3
        blr
FUNC_END(sysDcbz)

/*******************************************************************************
* sysDcbf - flushes one cache line of using the dcbf instruction
*
* This routine uses the dcbf instruction to flush one cache line at the
* specified address.
*
* RETURNS: Nothing
*
*  void sysDcbf
*     (
*     void * address
*     )
*/

FUNC_BEGIN(sysDcbf)
        dcbf    r0,r3
        blr
FUNC_END(sysDcbf)

/*******************************************************************************
* sysFprInit - Initialize floating point registers
*
* This is intended to be called only from sysHwInit().
*
* RETURNS: Nothing
*
*  void sysFprInit (void)
*
*/

FUNC_BEGIN(sysFprInit)
        /* Temporarily enable the FPU */
        /* sync/isync stuff copied from romInit.s */
        mfmsr	p1
        sync
        ori     p0, p1, _PPC_MSR_FP
        sync
        mtmsr   p0
        isync

        /* Load constant 0.0 into FPR0, then copy to the remaining FPRs */
        lis   p0, HIADJ(fZero)
        addi  p0, p0, LO(fZero)
        lfs   0,0(p0)
        fmr   1,0
        fmr   2,0
        fmr   3,0
        fmr   4,0
        fmr   5,0
        fmr   6,0
        fmr   7,0
        fmr   8,0
        fmr   9,0
        fmr   10,0
        fmr   11,0
        fmr   12,0
        fmr   13,0
        fmr   14,0
        fmr   15,0
        fmr   16,0
        fmr   17,0
        fmr   18,0
        fmr   19,0
        fmr   20,0
        fmr   21,0
        fmr   22,0
        fmr   23,0
        fmr   24,0
        fmr   25,0
        fmr   26,0
        fmr   27,0
        fmr   28,0
        fmr   29,0
        fmr   30,0
        fmr   31,0

        /* Restore prior MSR value */
        sync
        mtmsr   p1
        isync

        blr
FUNC_END(sysFprInit)