sysalib.s

VxWorks下 Spruce的BSP源代码

/* sysALib.s - IBM CPC700 Spruce system-dependent assembly routines */

/*******************************************************************************
   This source and object code has been made available to you by IBM on an
   AS-IS basis.

   IT IS PROVIDED WITHOUT WARRANTY OF ANY KIND, INCLUDING THE WARRANTIES OF
   MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE OR OF
   NONINFRINGEMENT OF THIRD PARTY RIGHTS.  IN NO EVENT SHALL IBM OR ITS
   LICENSORS BE LIABLE FOR INCIDENTAL, CONSEQUENTIAL OR PUNITIVE DAMAGES.
   IBM'S OR ITS LICENSOR'S DAMAGES FOR ANY CAUSE OF ACTION, WHETHER IN
   CONTRACT OR IN TORT, AT LAW OR AT EQUITY, SHALL BE LIMITED TO A MAXIMUM
   OF $1,000 PER LICENSE.  Anyone receiving this source or object code is
   licensed under IBM copyrights to use it in any way he or she deems fit,
   including copying it, modifying it, compiling it, and redistributing it
   either with or without modifications.  No license under IBM patents or
   patent applications is to be implied by the copyright license.

   Any user of this software should understand that neither IBM nor its
   licensors will be responsible for any consequences resulting from the
   use of this software.

   Any person who transfers this object code or any derivative work must
   include the IBM copyright notice in the transferred software.

   COPYRIGHT   I B M   CORPORATION 1999
   LICENSED MATERIAL  -  PROGRAM PROPERTY OF  I B M"

*******************************************************************************/

/* Copyright 1984-2002 Wind River Systems, Inc. */

/*
modification history
--------------------
01j,23jan03,jtp  SPR 84493 recognize 750FX PVR values 700xxxxx
01i,12sep02,pch  SPR 80542: recognize additional 750FX PVR value
01h,03apr02,pch  Update for T2.2; SPR 74348: Machine Check cleanup
01g,10dec01,kab  Fixed decl of fZero for diab
01f,27mar01,kab  Removed IBM support info per request
01e,27mar01,pch  added function sysFprInit, moved all .globl to top of file,
                 added .type directives
01d,06nov00,mcg  added functions sysSync, sysDcbz, sysDcbf
                 added earlier call to sysDisableL2
01c,18apr00,ajm  fix eieio (603 nop) with sync
01b,14sep99,mcg  updated for Tornado 2
01a,15feb99,mcg  written (from template 01b)
*/

/*
DESCRIPTION
This module contains the entry code, sysInit(), for VxWorks images that start
running from RAM, such as 'vxWorks'. These images are loaded into memory
by some external program (e.g., a boot ROM) and then started.
The routine sysInit() must come first in the text segment. Its job is to perform
the minimal setup needed to call the generic C
routine usrInit() with parameter BOOT_COLD.

The routine sysInit() typically masks interrupts in the processor, sets the
initial stack pointer (to STACK_ADRS which is defined in configAll.h),
then jumps to usrInit.
Most other hardware and device initialization is performed later by
sysHwInit().
*/

#define _ASMLANGUAGE
#include "vxWorks.h"
#include "sysLib.h"
#include "config.h"
#include "regs.h"
#include "asm.h"
#include "cpc700.h"
#include "arch/ppc/ppc603.h"

        /* globals */

	FUNC_EXPORT(_sysInit)			/* start of system code */
	FUNC_EXPORT(sysInByte)
	FUNC_EXPORT(sysOutByte)
	FUNC_EXPORT(sysInHword)
	FUNC_EXPORT(sysOutHword)
	FUNC_EXPORT(sysInLong)
	FUNC_EXPORT(sysOutLong)
	FUNC_EXPORT(sysPciInByte)
	FUNC_EXPORT(sysPciOutByte)
	FUNC_EXPORT(sysPciInWord)
	FUNC_EXPORT(sysPciOutWord)
	FUNC_EXPORT(sysPciInLong)
	FUNC_EXPORT(sysPciOutLong)
	FUNC_EXPORT(sysMemProbeSup)
	FUNC_EXPORT(sysWritePifCfg)
	FUNC_EXPORT(sysReadPifCfg)
	FUNC_EXPORT(sysDisableL2)
	FUNC_EXPORT(sysReadL2CR)
	FUNC_EXPORT(sysWriteL2CR)
	FUNC_EXPORT(sysSync)
	FUNC_EXPORT(sysDcbz)
	FUNC_EXPORT(sysDcbf)
	FUNC_EXPORT(sysFprInit)

        /* externals */

	FUNC_IMPORT(usrInit)

	/* local (read-only) data */

	.section	".rodata"
	.align 2
fZero:
	.float 0.0e0

	_WRS_TEXT_SEG_START

/*******************************************************************************
*
* sysInit - start after boot
*
* This is the system start-up entry point for VxWorks in RAM, the
* first code executed after booting.  It disables interrupts, sets up
* the stack, and jumps to the C routine usrInit() in usrConfig.c.
*
* The initial stack is set to grow down from the address of sysInit().  This
* stack is used only by usrInit() and is never used again.  Memory for the
* stack must be accounted for when determining the system load address.
*
* NOTE: This routine should not be called by the user.
*
* RETURNS: N/A
*
* sysInit (void)              /@ THIS IS NOT A CALLABLE ROUTINE @/
*/

FUNC_BEGIN(_sysInit)
        /* Disable external interrupts, turn off caching, translation */

        xor     r3, r3, r3
        mtmsr   r3                      /* clear the MSR register  */

        /* Turn off L2 cache.  PowerPC 750 is the only processor that can */
        /* have an L2 cache with the Spruce board.  It won't hurt the 740 */
        /* to do this.                                                    */

        mfspr   r28, PVR                        /* Get cpu type */
        rlwinm  r28, r28, 16, 16, 31
        cmpli   0, 0, r28, CPU_FAMILY_7XX       /* check if 740 or 750 */
        beq     doL2Dis
        rlwinm  r28, r28, 0, 16, 27		/* ignore 4 LS bits */
        cmpli   0, 0, r28, CPU_FAMILY_750FX     /* check if 750FX */
        bne     L2DisableDone
doL2Dis:
        bl      sysDisableL2
L2DisableDone:

        /* Invalidate L1 instruction and data caches */

        li      r3, 0
        ori     r4, r3, (_PPC_HID0_ICFI | _PPC_HID0_DCFI)
        sync
        isync
        mtspr   HID0, r4                /* first invalidate I and D caches */
        mtspr   HID0, r3                /* turn off invalidate bits */

        /* Insert protection from decrementer exceptions */

        addis   r4, r0, 0x4c00
        addi    r4, r4, 0x0064          /* load rfi (0x4c000064) to r4      */
        stw     r4, 0x900(r0)           /* store rfi at 0x00000900          */

        /* initialize the stack pointer */

        lis     r1, HIADJ(RAM_LOW_ADRS)
        addi    r1, r1, LO(RAM_LOW_ADRS)

        /*
         * Enable branch history table for the 740 and 750
         */

        mfspr   r28, PVR                        /* Get cpu type */
        rlwinm  r28, r28, 16, 16, 31
        cmpli   0, 0, r28, CPU_FAMILY_7XX       /* check if 740 or 750 */
        beq     doHid0
        rlwinm  r28, r28, 0, 16, 27		/* ignore 4 LS bits */
        cmpli   0, 0, r28, CPU_FAMILY_750FX     /* check if 750FX */
        bne     hid0done
doHid0:
        mfspr   r4,HID0
        ori     r4,r4,_PPC_HID0_BHTE
        mtspr   HID0,r4
        bl      sysDisableL2                 /* Disable L2 for 750/750L/750CX */

hid0done:

        /* disable instruction and data translations in the MMU */

        sync
        mfmsr   r3                      /* get the value in msr *
                                        /* clear bits IR and DR */

        rlwinm  r4, r3, 0, _PPC_MSR_BIT_DR+1, _PPC_MSR_BIT_IR - 1

        mtmsr   r4                      /* set the msr */
        sync                            /* SYNC */

        /* initialize the BAT register */

        li      r6,0                    /* r6 = 0 */

        isync
        mtspr   IBAT0U,r6
        isync
        mtspr   IBAT0L,r6
        isync
        mtspr   IBAT1U,r6
        isync
        mtspr   IBAT1L,r6
        isync
        mtspr   IBAT2U,r6
        isync
        mtspr   IBAT2L,r6
        isync
        mtspr   IBAT3U,r6
        isync
        mtspr   IBAT3L,r6
        isync
        mtspr   DBAT0U,r6
        isync
        mtspr   DBAT0L,r6
        isync
        mtspr   DBAT1U,r6
        isync
        mtspr   DBAT1L,r6
        isync
        mtspr   DBAT2U,r6
        isync
        mtspr   DBAT2L,r6
        isync
        mtspr   DBAT3U,r6
        isync
        mtspr   DBAT3L,r6
        isync

        /*
         * Enable the machine check input pin on the processor using the ECMP
         * bit in HID0.  Machine Check exceptions will be enabled later, after
	 * the vectors are set up.
         */
        mfspr   r4, HID0
        addis   r5,0,HIADJ(_PPC_HID0_EMCP)
        or      r4,r4,r5
        mtspr   HID0,r4                      /* enable the machine check pin */

        /* invalidate entries within both TLBs */

        li      r4,128
        xor     r3,r3,r3                /* r3 = 0    */
        mtctr   r4                      /* CTR = 32  */

        isync                           /* context sync req'd before tlbie */
sysALoop:
        tlbie   r3
        addi    r3,r3,0x1000            /* increment bits 15-19 */
        bdnz    sysALoop                /* decrement CTR, branch if CTR != 0 */
        sync                            /* sync instr req'd after tlbie      */

        /* initialize Small Data Area (SDA) start address */

#if     FALSE                           /* XXX TPR NO SDA for now */
        lis     r2, HIADJ(_SDA2_BASE_)
        addi    r2, r2, LO(_SDA2_BASE_)

        lis     r13, HIADJ(_SDA_BASE_)
        addi    r13, r13, LO(_SDA_BASE_)
#endif

        addi    r1, r1, -FRAMEBASESZ    /* get frame stack */
        li      r3, BOOT_WARM_AUTOBOOT
        b       usrInit                 /* never returns - starts up kernel */
FUNC_END(_sysInit)

/*****************************************************************************
*
* sysInByte - reads a byte from an io address.
*
* This function reads a byte from a specified io address.
*
* INPUTS:
* r3      = address to read data from
* RETURNS: byte from address.
*/

FUNC_BEGIN(sysInByte)
        lbzx    r3,r0,r3        /* Read byte from an address */
        sync                   /* Sync I/O operation */
        bclr    20,0            /* Return to caller */
FUNC_END(sysInByte)

/******************************************************************************
*
* sysOutByte - writes a byte to an io address.
*
* This function writes a byte to a specified io address.
*
* r3      = address to write to
* r4      = data to be written
* RETURNS: N/A
*/

FUNC_BEGIN(sysOutByte)
        stbx    r4,r0,r3        /* Write a byte to an address */
        sync                   /* Sync I/O operation */
        bclr    20,0            /* Return to caller */
FUNC_END(sysOutByte)

/*****************************************************************************
*
* sysInHword - reads a halfword (Big Endian 16 bits) from an io address.
*
* This function reads a halfword from a specified io address.
*
* INPUTS:
* r3      = address to read data from
* RETURNS: halfword from address.
*/

FUNC_BEGIN(sysInHword)
        lhzx    r3,r0,r3        /* Read halfword from an address */
        sync                   /* Sync I/O operation */
        bclr    20,0            /* Return to caller */
FUNC_END(sysInHword)

/******************************************************************************
*
* sysOutHword - writes a halfword (Big Endian 16 bits) to an io address.
*
* This function writes a halfword to a specified io address.
*
* r3      = address to write to
* r4      = data to be written
* RETURNS: N/A
*/

FUNC_BEGIN(sysOutHword)
        sthx    r4,r0,r3        /* Write a halfword to an address */
        sync                   /* Sync I/O operation */
        bclr    20,0            /* Return to caller */
FUNC_END(sysOutHword)

/*****************************************************************************
*
* sysInLong - reads a word (Big Endian 32 bits) from an io address.
*
* This function reads a word from a specified io address.
*
* INPUTS:
* r3      = address to read data from
* RETURNS: word from address.
*/

FUNC_BEGIN(sysInLong)
        lwzx    r3,r0,r3        /* Read word from an address */
        sync                   /* Sync I/O operation */
        bclr    20,0            /* Return to caller */
FUNC_END(sysInLong)

/******************************************************************************
*
* sysOutLong - writes a word (Big Endian 32 bits) to an io address.
*
* This function writes a word to a specified io address.
*
* r3      = address to write to
* r4      = data to be written
* RETURNS: N/A
*/

FUNC_BEGIN(sysOutLong)
        stwx    r4,r0,r3        /* Write a word to an address */
        sync                   /* Sync I/O operation */
        bclr    20,0            /* Return to caller */
FUNC_END(sysOutLong)

/*****************************************************************************
*
* sysPciInByte - reads a byte from PCI Config Space.
*
* This function reads a byte from a specified PCI Config Space address.
*
* ARGUMENTS:
*       r3      = Config Space address
*
* RETURNS:
*       r3      = byte from address.
*/