📄 syslib.c
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sysOutByte (NV_RAM_MSB_REG, MSB(offset)); return sysInByte (NV_RAM_DAT_REG); }/******************************************************************************** sysNvWrite - write one byte to NVRAM** This routine writes a single byte to a specified offset in NVRAM. The* MVME2600 uses a 48T18 device w/fast write times, no wait.** RETURNS: N/A*/void sysNvWrite ( ULONG offset, /* NVRAM offset to write the byte to */ UCHAR data /* datum byte */ ) { sysOutByte (NV_RAM_LSB_REG, LSB(offset)); sysOutByte (NV_RAM_MSB_REG, MSB(offset)); sysOutByte (NV_RAM_DAT_REG, data); }/********************************************************************************* sysCpuCheck - confirm the CPU type** This routine validates the cpu type. If the wrong cpu type is discovered* a message is printed using the serial channel in polled mode.** RETURNS: N/A.*/void sysCpuCheck (void) { int msgSize; int msgIx; SIO_CHAN * pSioChan; /* serial I/O channel */ /* Check for a valid CPU type; If one is found, just return */#if (CPU == PPC603) if ((CPU_TYPE == CPU_TYPE_603) || (CPU_TYPE == CPU_TYPE_603E) || (CPU_TYPE == CPU_TYPE_603P)) { return; }#else /* (CPU == PPC604) */ if ((CPU_TYPE == CPU_TYPE_604) || (CPU_TYPE == CPU_TYPE_604E) || (CPU_TYPE == CPU_TYPE_604R) || (CPU_TYPE == CPU_TYPE_750)) { return; }#endif /* (CPU == PPC604) */ /* Invalid CPU type; print error message and terminate */ msgSize = strlen (sysWrongCpuMsg); sysSerialHwInit (); pSioChan = sysSerialChanGet (0); sioIoctl (pSioChan, SIO_MODE_SET, (void *) SIO_MODE_POLL); for (msgIx = 0; msgIx < msgSize; msgIx++) { while (sioPollOutput (pSioChan, sysWrongCpuMsg[msgIx]) == EAGAIN); } sysToMonitor (BOOT_NO_AUTOBOOT); }/******************************************************************************** sysPciExtViaInit - initialize the extended portion of the VIA PCI header** This routine initializes the extended portion of the PCI header for the* VIA Technologies VT82C586B PCI Integrated Peripheral Controller (PIPC).** RETURNS: OK** SEE ALSO: sysPciExtIbcInit()*/STATUS sysPciExtViaInit ( int busNo, /* bus number */ int deviceNo, /* device number */ int funcNo /* function number */ ) { /* * Initialize ISA-to-PCI decoder. The following ISA * memory accesses are forwarded to the PCI bus: * * 00000000-0007FFFF, ie 0-512 Kbyte * 00100000-00ffffff, ie 1-16 Mbyte */ pciConfigOutWord (busNo, deviceNo, funcNo, PCI_CFG_VIA_MEM_AC3, VIA_PCI_CFG_MEM_AC3_16M | VIA_PCI_CFG_MEM_0_7FFFF); /* Enable Port92 reset capability */ pciConfigOutByte (busNo, deviceNo, funcNo, PCI_CFG_VIA_ISA_TM, (UCHAR) ~VIA_PCI_CFG_ISA_TM_MSK); pciConfigOutByte (busNo, deviceNo, funcNo, PCI_CFG_VIA_ISA_TM, VIA_PCI_CFG_ISA_TM_P92); /* Enable PCI Memory Write to ISA to be posted */ pciConfigOutByte (busNo, deviceNo, funcNo, PCI_CFG_VIA_MC1, VIA_PCI_CFG_MC1_POST_M); /* Disable Extra RTC Port 74/75 */ pciConfigOutByte (busNo, deviceNo, funcNo, PCI_CFG_VIA_MC3, VIA_PCI_CFG_MC3_RTC_E | VIA_PCI_CFG_MC3_512_M); /* * Initialize IDE Primary Channel IRQ to IRQ14 * Initialize IDE Secondary Channel IRQ to IRQ15 */ pciConfigOutByte (busNo, deviceNo, funcNo, PCI_CFG_VIA_IDE_IR, VIA_PCI_CFG_IDE_SEC_15 | VIA_PCI_CFG_IDE_PRI_14);#ifdef CONFIG1_SYS_REG_BMEFR if (EXTENDED_FEATURE_PRESENT(SYS_REG_BMEFR_ISA_REWORK))#endif { /* * Correctly set up for level and edge sensitivity for all boards * using VIA except for MCP750 pre-rev A boards. The pre-rev A * boards need a HW fix (present on MCP750 rev A boards) * which allows for SW to function properly with level interrupt * sensitivity enabled for the appropriate IRQ lines. */ /* Enable 4D0/4D1 port */ pciConfigOutByte (busNo, deviceNo, funcNo, PCI_CFG_VIA_MC2, VIA_PCI_CFG_MC2_4D0_PORT); /* Set PCI interrupt inputs to non-inverting level interrupts */ pciConfigOutByte (busNo, deviceNo, funcNo, PCI_CFG_VIA_EGLV_SEL, VIA_PCI_CFG_EGLV_LV); } return (OK); }/******************************************************************************** sysDelay - delay for approximately one millisecond** Delay for approximately one milli-second.** RETURNS: N/A*/void sysDelay (void) { sysMsDelay (1); }/******************************************************************************** sysMsDelay - delay for the specified amount of time (MS)** This routine will delay for the specified amount of time by counting* decrementer ticks.** This routine is not dependent on a particular rollover value for* the decrementer, it should work no matter what the rollover* value is.** A small amount of count may be lost at the rollover point resulting in* the sysMsDelay() causing a slightly longer delay than requested.** This routine will produce incorrect results if the delay time requested* requires a count larger than 0xffffffff to hold the decrementer* elapsed tick count. For a System Bus Speed of 67 MHZ this amounts to* about 258 seconds.** RETURNS: N/A*/void sysMsDelay ( UINT delay /* length of time in MS to delay */ ) { register UINT oldval; /* decrementer value */ register UINT newval; /* decrementer value */ register UINT totalDelta; /* Dec. delta for entire delay period */ register UINT decElapsed; /* cumulative decrementer ticks */ /* * Calculate delta of decrementer ticks for desired elapsed time. */ totalDelta = ((DEC_CLOCK_FREQ / 4) / 1000) * delay; /* * Now keep grabbing decrementer value and incrementing "decElapsed" until * we hit the desired delay value. Compensate for the fact that we may * read the decrementer at 0xffffffff before the interrupt service * routine has a chance to set in the rollover value. */ decElapsed = 0; oldval = vxDecGet (); while (decElapsed < totalDelta) { newval = vxDecGet (); if (newval > oldval) decElapsed += oldval; /* rollover */ else decElapsed += (oldval - newval); /* no rollover */ oldval = newval; } }/******************************************************************************** sysMemProbeTrap - trap handler for vxMemProbe exception** This routine is called from the excConnectCode stub if sysMemProbeSup* generates an exception. This code simply increments a static variable each* time an exception is generated and advances to the next instruction.*/LOCAL int sysMemProbeTrap ( ESFPPC * pEsf /* pointer to exception stack frame */ ) { REG_SET *pRegSet = &pEsf->regSet; pRegSet->pc += (_RType)4; /* advance to next instruction */ sysProbeFault++; /* indicate trap occurred */ return (0); }/******************************************************************************** sysPciWriteFlush - flush posted PCI writes from buffer** This routine flushes the posted write buffer in the Raven and the Dec2155x if* it is present.** RETURNS: OK if flush succeeded or ERROR if an error occured.*/STATUS sysPciWriteFlush(void) { UINT16 devId;#ifdef INCLUDE_DEC2155X char * temp;#endif /* INCLUDE_DEC2155X */ /* * Flush Raven posted write buffer by doing a dummy read of one * of its MPC registers */ devId = sysIn16 ((UINT16 *)(RAVEN_BASE_ADRS + RAVEN_MPC_DEVID));#ifdef INCLUDE_DEC2155X /* Flush the Dec2155x posted write buffer by reading from a cPCI location */ if (sysBusToLocalAdrs (PCI_SPACE_MEM_SEC, (char *) CPCI_FLUSH_ADDR, &temp) != OK) return (ERROR); temp = (char *)sysIn32 ((UINT32 *)temp);#endif /* INCLUDE_DEC2155X */ return (OK); }/******************************************************************************** sysMemProbeBus - probe an address on a bus.** This routine probes a specified address to see if it is readable or* writable, as specified by <mode>. The address will be read or written as* 1, 2, or 4 bytes as specified by <length> (values other than 1, 2, or 4* yield unpredictable results). If the probe is a VX_READ, the value read will* be copied to the location pointed to by <pVal>. If the probe is a VX_WRITE,* the value written will be taken from the location pointed to by <pVal>.* In either case, <pVal> should point to a value of 1, 2, or 4 bytes, as* specified by <length>.** This routine probes the specified address with interrupts disabled and* a special handler for Data Access and Alignment exceptions.** RETURNS: OK if probe succeeded or ERROR if an exception occured.*/LOCAL STATUS sysMemProbeBus ( char * adrs, /* address to be probed */ int mode, /* VX_READ or VX_WRITE */ int length, /* 1, 2 or 4 byte probe */ char * pVal /* address of value to write OR */ /* address of location to place value read */ ) { FUNCPTR oldVec; STATUS status; /* clear fault flag */ sysProbeFault = 0; /* * Handle Data Access Exceptions locally * * Data Access Exceptions will occur when trying to probe addresses * that have not been mapped by the MMU. */ oldVec = excVecGet ((FUNCPTR *) _EXC_OFF_DATA); excVecSet ((FUNCPTR *) _EXC_OFF_DATA, FUNCREF(sysMemProbeTrap)); /* do probe */ if (mode == VX_READ) { status = sysMemProbeSup (length, adrs, pVal); } else { status = sysMemProbeSup (length, pVal, adrs); } /* restore original vector */ excVecSet ((FUNCPTR *) _EXC_OFF_DATA, oldVec); if (status == OK) /* no parameter errors during probe */ { /* if a PCI write was performed, flush the write post buffer(s) */ if (mode == VX_WRITE) status = sysPciWriteFlush (); } /* check for MMU fault */ if (sysProbeFault != 0) return (ERROR); else return (status); }/******************************************************************************** sysProbeErrClr - clear errors associated with probing an address on a bus.** This routine clears the error flags and conditions in the DAR, DSISR, SRR0* and SRR1 PowerPC registers arising from probing addresses as well as the* Raven MERST and PCI_CFG_STATUS registers and V_AMERR registers.** RETURNS: N/A*/void sysProbeErrClr (void) {#ifdef INCLUDE_DEC2155X sysDec2155xErrClr ();#endif /* INCLUDE_DEC2155X */ /* Clear Raven MPC MERST Register */ sysOutByte ((ULONG)(RAVEN_BASE_ADRS + RAVEN_MPC_MERST), RAVEN_MPC_MERST_CLR); /* Clear Raven's Cnfg Hdr Status Reg */ pciConfigOutWord (sysRavPciBusNo, sysRavPciDevNo, sysRavPciFuncNo, PCI_CFG_STATUS, RAVEN_PCI_CFG_STATUS_CLR); /* Clear PowerPC Data Access Exception Registers */ vxDarSet (0); vxDsisrSet (0); vxSrr0Set (0); vxSrr1Set (0); }/******************************************************************************** sysPciProbe - probe a PCI bus address** This routine probes an address on the PCI bus. All probing is done with* interrupts disabled.** NOTE: The VIA PCI-to-ISA bridge chip has a subtractive decoder which cannot* disabled. If there is no reponse to a PCI transaction, the PCI-to-ISA bridge* will claim the transaction and pass it on to the ISA bus. The upshot of all* this is that probes of the PCI bus will not produce a fault indication. The* PCI-to-ISA bridge will provide dummy data (0xffffffff) and discard write* data. The bridge designers considered this behavior a feature. Probes which* pass through the Dec2155x (if present) will return the proper fault* indications.** RETURNS: OK or ERROR if address cannot be probed*/LOCAL STATUS sysPciProbe ( char * adrs, /* address to be probed */ int mode, /* VX_READ or VX_WRITE */ int length, /* 1, 2 or 4 byte probe */ char * pVal /* address of value to write OR */ /* address of location to place value read */ ) { STATUS status = ERROR; int oldLevel; UINT16 mpcErrEnbl; /* Raven MPC Error Enable reg */ UINT8 mpcErrStat; /* Raven MPC Error Status reg */#ifdef INCLUDE_DEC2155X UINT16 secCmd; /* Dec2155x secondary comma
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