sysalib.s

VxWorkS下 MV2604的BSP源代码

	sync				/* synchronize */

	addis	r4,r0,0x0000		/* MARB:BRENx=1,PKEN=0,PKMD=0,DEFMx=1 */
	ori	r4,r4,0x0703		/* MARB:BRENx=1,PKEN=0,PKMD=0,DEFMx=1 */
	sth	r4,RAVEN_MPC_MARB(r3)	/* write MARB */
	eieio				/* synchronize */
	sync				/* synchronize */

	addis	r4,r0,0x0000		/* PADJ:BE=66MHZ */
	ori	r4,r4,0x00BE		/* PADJ:BE=66MHZ */
	stb	r4,RAVEN_MPC_PADJ(r3)	/* write PADJ */
	eieio				/* synchronize */
	sync				/* synchronize */

	addis	r4,r0,0x0000		/* MEREN:(all error enables disabled) */
	ori	r4,r4,0x0000		/* MEREN:(all error enables disabled) */
	sth	r4,RAVEN_MPC_MEREN(r3)	/* write MEREN */
	eieio				/* synchronize */
	sync				/* synchronize */

	addis	r4,r0,0x0000		/* MERST:(clear all error status) */
	ori	r4,r4,0x00ff		/* MERST:(clear all error status) */
	stb	r4,RAVEN_MPC_MERST(r3)	/* write MERST */
	eieio				/* synchronize */
	sync				/* synchronize */

	addis	r4,r0,0x0000		/* MSATTx:(all attributes disabled) */
	ori	r4,r4,0x0000		/* MSATTx:(all attributes disabled) */
	stb	r4,RAVEN_MPC_MSATT0(r3)	/* write MSATT0 */
	eieio				/* synchronize */
	sync				/* synchronize */
	stb	r4,RAVEN_MPC_MSATT1(r3)	/* write MSATT1 */
	eieio				/* synchronize */
	sync				/* synchronize */
	stb	r4,RAVEN_MPC_MSATT2(r3)	/* write MSATT2 */
	eieio				/* synchronize */
	sync				/* synchronize */
	stb	r4,RAVEN_MPC_MSATT3(r3)	/* write MSATT3 */
	eieio				/* synchronize */
	sync				/* synchronize */

	addis	r4,r0,CPU2PCI_ADDR0_START	/* MSADD0: */
	ori	r4,r4,CPU2PCI_ADDR0_END		/* MSADD0: */
	stw	r4,RAVEN_MPC_MSADD0(r3)	/* write MSADD0 */
	eieio				/* synchronize */
	sync				/* synchronize */

	addis	r4,r0,0x0000		/* MSOFF0: */
	ori	r4,r4,CPU2PCI_OFFSET0	/* MSOFF0: */
	sth	r4,RAVEN_MPC_MSOFF0(r3)	/* write MSOFF0 */
	eieio				/* synchronize */
	sync				/* synchronize */

	addis	r4,r0,0x0000		/* MSATT0: */
	ori	r4,r4,CPU2PCI_MSATT0	/* MSATT0: */
	stb	r4,RAVEN_MPC_MSATT0(r3)	/* write MSATT0 */
	eieio				/* synchronize */
	sync				/* synchronize */

	addis	r4,r0,CPU2PCI_ADDR1_START	/* MSADD1: */
	ori	r4,r4,CPU2PCI_ADDR1_END		/* MSADD1: */
	stw	r4,RAVEN_MPC_MSADD1(r3)	/* write MSADD1 */
	eieio				/* synchronize */
	sync				/* synchronize */

	addis	r4,r0,0x0000		/* MSOFF1: */
	ori	r4,r4,CPU2PCI_OFFSET1	/* MSOFF1: */
	sth	r4,RAVEN_MPC_MSOFF1(r3)	/* write MSOFF1 */
	eieio				/* synchronize */
	sync				/* synchronize */

	addis	r4,r0,0x0000		/* MSATT1: */
	ori	r4,r4,CPU2PCI_MSATT1	/* MSATT1: */
	stb	r4,RAVEN_MPC_MSATT1(r3)	/* write MSATT1 */
	eieio				/* synchronize */
	sync				/* synchronize */

	addis	r4,r0,CPU2PCI_ADDR2_START	/* MSADD2: */
	ori	r4,r4,CPU2PCI_ADDR2_END		/* MSADD2: */
	stw	r4,RAVEN_MPC_MSADD2(r3)	/* write MSADD2 */
	eieio				/* synchronize */
	sync				/* synchronize */

	addis	r4,r0,0x0000		/* MSOFF2: */
	ori	r4,r4,CPU2PCI_OFFSET2	/* MSOFF2: */
	sth	r4,RAVEN_MPC_MSOFF2(r3)	/* write MSOFF2 */
	eieio				/* synchronize */
	sync				/* synchronize */

	addis	r4,r0,0x0000		/* MSATT2: */
	ori	r4,r4,CPU2PCI_MSATT2	/* MSATT2: */
	stb	r4,RAVEN_MPC_MSATT2(r3)	/* write MSATT2 */
	eieio				/* synchronize */
	sync				/* synchronize */

/*
 * PCI address space 3 registers supports config. space access and
 * special cycle generation.  It should be configured for I/O space.
 */

	addis	r4,r0,CPU2PCI_ADDR3_START	/* MSADD3: */
	ori	r4,r4,CPU2PCI_ADDR3_END		/* MSADD3: */
	stw	r4,RAVEN_MPC_MSADD3(r3)	/* write MSADD3 */
	eieio				/* synchronize */
	sync				/* synchronize */

	addis	r4,r0,0x0000		/* MSOFF3: */
	ori	r4,r4,CPU2PCI_OFFSET3	/* MSOFF3: */
	sth	r4,RAVEN_MPC_MSOFF3(r3)	/* write MSOFF3 */
	eieio				/* synchronize */
	sync				/* synchronize */

	addis	r4,r0,0x0000		/* MSATT3: */
	ori	r4,r4,CPU2PCI_MSATT3	/* MSATT3: */
	stb	r4,RAVEN_MPC_MSATT3(r3)	/* write MSATT3 */
	eieio				/* synchronize */
	sync				/* synchronize */

/* End of Raven Init */

/* 
 * Do the init for the SIO, now that the Raven is configured.
 * This was moved after the Raven init for the Extended VME config.
 */

#ifndef MV2300
        bl .sioInit
#endif  /* MV2300 */

	/* invalidate entries within both TLBs */

	li	p1,128
	xor	p0,p0,p0		/* p0 = 0    */
	mtctr	p1			/* CTR = 32  */

	isync				/* context sync req'd before tlbie */
sysALoop:
	tlbie	p0
	addi	p0,p0,0x1000		/* increment bits 15-19 */
	bdnz	sysALoop		/* decrement CTR, branch if CTR != 0 */
	sync				/* sync instr req'd after tlbie      */

/* workaround for Extended VME config. with 2603 boards */

#ifdef EXTENDED_VME
        lis     r3, HI(RAVEN_BASE_ADRS)
        ori     r3, r3, LO(RAVEN_BASE_ADRS)
        addis   r4,r0,(VME_A32_MSTR_LOCAL>>16)  /* MSADD0: */
        ori     r4,r4,CPU2PCI_ADDR0_END         /* MSADD0: */
        stw     r4,RAVEN_MPC_MSADD0(r3)     /* write MSADD0 */
        eieio                           /* synchronize */
        sync                            /* synchronize */
#endif

	/* initialize Small Data Area (SDA) start address */

#if	FALSE				/* XXX TPR NO SDA for now */
	lis     r2, HIADJ(_SDA2_BASE_)
	addi    r2, r2, LO(_SDA2_BASE_)

	lis     r13, HIADJ(_SDA_BASE_)
	addi    r13, r13, LO(_SDA_BASE_)
#endif

	addi	sp, sp, -FRAMEBASESZ	/* get frame stack */
	li      r3, BOOT_WARM_AUTOBOOT
	b	usrInit			/* never returns - starts up kernel */


/*****************************************************************************
*
* sysInByte - reads a byte from an address.
*
* This function reads a byte from a specified address.
*
* From a C programmers point of view, the routine is defined as follows:
*
*         sysInByte
*             (
*             ULONG       *addr;  - address of data
*             )
*
* INPUTS:
* r3      = address to read data from
*
* OUTPUTS:
* r3      = data
*
* RETURNS: byte from address.
*/

sysInByte:

	/*
	 *	Read byte from given address
	 */
	lbzx	r3,r0,r3
	/*
	 *	Sync I/O operation
	 */
	eieio
	/*
	 *	Return to caller
	 */
	bclr	20,0

/******************************************************************************
*
* sysOutByte - writes a byte to an address.
*
* This function writes a byte to a specified address.
*
* From a C point of view, the routine is defined as follows:
*
*         sysOutByte
*             (
*             ULONG      *addr  - address to write data to
*             UCHAR       data  - 8-bit data
*             )
*
* INPUTS:
* r3      = address to write to
* r4      = data to be written
*
* RETURNS: N/A
*/

sysOutByte:

	/*
	 *	Write a byte to given address
	 */
	stbx	r4,r0,r3
	/*
	 *	Sync I/O operation
	 */
	eieio
	/*
	 *	Return to caller
	 */
	bclr	20,0

/*****************************************************************************
*
* sysIn16 - reads a 16-bit unsigned value from an address.
*
* This function reads a 16-bit unsigned value from a specified address.
*
* From a C programmers point of view, the routine is defined as follows:
*
*         sysIn16
*             (
*             UINT16       *addr;  - address of data
*             )
*
* INPUTS:
* r3      = address to read data from
*
* OUTPUTS:
* r3      = data
*
* RETURNS: 16-bit unsigned value from address.
*/

sysIn16:

	lhz	3,0(3)
	eieio
	bclr	20,0

/******************************************************************************
*
* sysOut16 - writes a 16-bit unsigned value to an address.
*
* This function writes a 16-bit unsigned value to a specified address.
*
* From a C point of view, the routine is defined as follows:
*
*         sysOut16
*             (
*             UINT16      *addr  - address to write data to
*             UINT16       data  - 8-bit data
*             )
*
* INPUTS:
* r3      = address to write to
* r4      = data to be written
*
* RETURNS: N/A
*/

sysOut16:

	sth	4,0(3)
	eieio
	bclr	20,0

/*****************************************************************************
*
* sysIn32 - reads a 32-bit unsigned value from an address.
*
* This function reads a 32-bit unsigned value from a specified address.
*
* From a C programmers point of view, the routine is defined as follows:
*
*         sysIn32
*             (
*             UINT32       *addr;  - address of data
*             )
*
* INPUTS:
* r3      = address to read data from
*
* OUTPUTS:
* r3      = data
*
* RETURNS: 32-bit unsigned value from address.
*/

sysIn32:

	lwz	3,0(3)
	eieio
	bclr	20,0

/******************************************************************************
*
* sysOut32 - writes a 32-bit unsigned value to an address.
*
* This function writes a 32-bit unsigned value to a specified address.
*
* From a C point of view, the routine is defined as follows:
*
*         sysOut32
*             (
*             UINT32      *addr  - address to write data to
*             UINT32       data  - 32-bit data
*             )
*
* INPUTS:
* r3      = address to write to
* r4      = data to be written
*
* RETURNS: N/A
*/

sysOut32:

	stw	4,0(3)
	eieio
	bclr	20,0


/******************************************************************************
*
* sysPciRead32 - read 32 bit PCI data
*
* This routine will read a 32-bit data item from PCI ( I/O or
* memory ) space.  From a C programmers point of view, the routine
* is defined as follows:
*
*         sysPciRead32
*             (
*             UINT32      *addr;  - address of data in PCI space
*             UINT32      *pdata  - pointer to data being returned
*             )                     by the read call ( data is converted
*                                   to big-endian )
*
* INPUTS:
* r3      = PCI address to read data from
* r4      = pointer to store data to
*
* RETURNS: N/A
*/

sysPciRead32:
        lwbrx   r3,r0,r3        /* get the data and swap the bytes */
	/*
	 *	Sync I/O operation
	 */
	eieio
        stw     r3,0(r4)        /* store into address ptd. to by r4 */
        bclr    20,0


/******************************************************************************
*
* sysPciWrite32 - write a 32 bit data item to PCI space
*
* This routine will store a 32-bit data item ( input as big-endian )
* into PCI ( I/O or memory ) space in little-endian mode.  From a
* C point of view, the routine is defined as follows:
*
*         sysPciWrite32
*             (
*             UINT32      *addr  - address to write data to
*             UINT32       data  - 32-bit big-endian data
*             )
*
* INPUTS:
* r3      = PCI address to write to
* r4      = data to be written
*
* RETURNS: N/A
*/

sysPciWrite32:
        stwbrx  r4,r0,r3        /* store data as little-endian */
	/*
	 *	Sync I/O operation
	 */
	eieio
        bclr    20,0


/*****************************************************************************
*
* sysPciInByte - reads a byte from PCI Config Space.
*
* This function reads a byte from a specified PCI Config Space address.
*
* ARGUMENTS:
*       r3      = Config Space address
*
* RETURNS:
*       r3      = byte from address.
*/

sysPciInByte:

        /*
         *      Read byte from PCI space
         */
        lbzx    r3,r0,r3
        /*
         *      Sync I/O operation
         */
	eieio
        /*
         *      Return to caller
         */
        bclr    20,0

/*****************************************************************************
*
* sysPciInWord - reads a word (16-bit big-endian) from PCI Config Space.
*
* This function reads a word from a specified PCI Config Space (little-endian)
* address.
*
* ARGUMENTS:
*       r3      = Config Space address
*
* RETURNS:
*       r3      = word (16-bit big-endian) from address.
*/

sysPciInWord:

        /*
         *      Read big-endian word from little-endian PCI space
         */
        lhbrx   r3,r0,r3
        /*
         *      Sync I/O operation
         */
	eieio
        /*
         *      Return to caller
         */
        bclr    20,0

/*****************************************************************************
*
* sysPciInLong - reads a long (32-bit big-endian) from PCI Config Space.
*
* This function reads a long from a specified PCI Config Space (little-endian)
* address.
*
* ARGUMENTS:
*       r3      = Config Space address
*
* RETURNS:
*       r3      = long (32-bit big-endian) from address.
*/

sysPciInLong:

        /*
         *      Read big-endian long from little-endian PCI space
         */
        lwbrx   r3,r0,r3
        /*
         *      Sync I/O operation
         */
	eieio
        /*
         *      Return to caller
         */
        bclr    20,0

/******************************************************************************
*
* sysPciOutByte - writes a byte to PCI Config Space.
*
* This function writes a byte to a specified PCI Config Space address.
*
* ARGUMENTS:
*       r3      = Config Space address
*       r4      = byte to write
*
* RETURNS: N/A
*/

sysPciOutByte:

        /*
         *      Write a byte to PCI space
         */
        stbx    r4,r0,r3
        /*
         *      Sync I/O operation
         */
	eieio
        /*
         *      Return to caller
         */
        bclr    20,0

/******************************************************************************
*
* sysPciOutWord - writes a word (16-bit big-endian) to PCI Config Space.
*
* This function writes a word to a specified PCI Config Space (little-endian)
* address.
*
* ARGUMENTS:
*       r3      = Config Space address
*       r4      = word (16-bit big-endian) to write
*
* RETURNS: N/A
*/

sysPciOutWord:

        /*
         *      Write a big-endian word to little-endian PCI space
         */
        sthbrx  r4,r0,r3
        /*
         *      Sync I/O operation
         */
	eieio
        /*
         *      Return to caller
         */
        bclr    20,0

/******************************************************************************
*
* sysPciOutLong - writes a long (32-bit big-endian) to PCI Config Space.
*
* This function writes a long to a specified PCI Config Space (little-endian)
* address.
*
* ARGUMENTS:
*       r3      = Config Space address
*       r4      = long (32-bit big-endian) to write
*
* RETURNS: N/A