📄 shubio.h
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shubreg_t i_rsvd_1 : 2; shubreg_t i_pi0_forward_int : 1; shubreg_t i_pi1_forward_int : 1; shubreg_t i_rsvd : 30; } ii_iidsr_fld_s;} ii_iidsr_u_t;/************************************************************************ * * * There are two instances of this register. This register is used * * for matching up the incoming responses from the graphics widget to * * the processor that initiated the graphics operation. The * * write-responses are converted to graphics credits and returned to * * the processor so that the processor interface can manage the flow * * control. * * * ************************************************************************/typedef union ii_igfx0_u { shubreg_t ii_igfx0_regval; struct { shubreg_t i_w_num : 4; shubreg_t i_pi_id : 1; shubreg_t i_n_num : 12; shubreg_t i_p_num : 1; shubreg_t i_rsvd : 46; } ii_igfx0_fld_s;} ii_igfx0_u_t;/************************************************************************ * * * There are two instances of this register. This register is used * * for matching up the incoming responses from the graphics widget to * * the processor that initiated the graphics operation. The * * write-responses are converted to graphics credits and returned to * * the processor so that the processor interface can manage the flow * * control. * * * ************************************************************************/typedef union ii_igfx1_u { shubreg_t ii_igfx1_regval; struct { shubreg_t i_w_num : 4; shubreg_t i_pi_id : 1; shubreg_t i_n_num : 12; shubreg_t i_p_num : 1; shubreg_t i_rsvd : 46; } ii_igfx1_fld_s;} ii_igfx1_u_t;/************************************************************************ * * * There are two instances of this registers. These registers are * * used as scratch registers for software use. * * * ************************************************************************/typedef union ii_iscr0_u { shubreg_t ii_iscr0_regval; struct { shubreg_t i_scratch : 64; } ii_iscr0_fld_s;} ii_iscr0_u_t;/************************************************************************ * * * There are two instances of this registers. These registers are * * used as scratch registers for software use. * * * ************************************************************************/typedef union ii_iscr1_u { shubreg_t ii_iscr1_regval; struct { shubreg_t i_scratch : 64; } ii_iscr1_fld_s;} ii_iscr1_u_t;/************************************************************************ * * * Description: There are seven instances of translation table entry * * registers. Each register maps a Shub Big Window to a 48-bit * * address on Crosstalk. * * For M-mode (128 nodes, 8 GBytes/node), SysAD[31:29] (Big Window * * number) are used to select one of these 7 registers. The Widget * * number field is then derived from the W_NUM field for synthesizing * * a Crosstalk packet. The 5 bits of OFFSET are concatenated with * * SysAD[28:0] to form Crosstalk[33:0]. The upper Crosstalk[47:34] * * are padded with zeros. Although the maximum Crosstalk space * * addressable by the SHub is thus the lower 16 GBytes per widget * * (M-mode), however only <SUP >7</SUP>/<SUB >32nds</SUB> of this * * space can be accessed. * * For the N-mode (256 nodes, 4 GBytes/node), SysAD[30:28] (Big * * Window number) are used to select one of these 7 registers. The * * Widget number field is then derived from the W_NUM field for * * synthesizing a Crosstalk packet. The 5 bits of OFFSET are * * concatenated with SysAD[27:0] to form Crosstalk[33:0]. The IOSP * * field is used as Crosstalk[47], and remainder of the Crosstalk * * address bits (Crosstalk[46:34]) are always zero. While the maximum * * Crosstalk space addressable by the Shub is thus the lower * * 8-GBytes per widget (N-mode), only <SUP >7</SUP>/<SUB >32nds</SUB> * * of this space can be accessed. * * * ************************************************************************/typedef union ii_itte1_u { shubreg_t ii_itte1_regval; struct { shubreg_t i_offset : 5; shubreg_t i_rsvd_1 : 3; shubreg_t i_w_num : 4; shubreg_t i_iosp : 1; shubreg_t i_rsvd : 51; } ii_itte1_fld_s;} ii_itte1_u_t;/************************************************************************ * * * Description: There are seven instances of translation table entry * * registers. Each register maps a Shub Big Window to a 48-bit * * address on Crosstalk. * * For M-mode (128 nodes, 8 GBytes/node), SysAD[31:29] (Big Window * * number) are used to select one of these 7 registers. The Widget * * number field is then derived from the W_NUM field for synthesizing * * a Crosstalk packet. The 5 bits of OFFSET are concatenated with * * SysAD[28:0] to form Crosstalk[33:0]. The upper Crosstalk[47:34] * * are padded with zeros. Although the maximum Crosstalk space * * addressable by the Shub is thus the lower 16 GBytes per widget * * (M-mode), however only <SUP >7</SUP>/<SUB >32nds</SUB> of this * * space can be accessed. * * For the N-mode (256 nodes, 4 GBytes/node), SysAD[30:28] (Big * * Window number) are used to select one of these 7 registers. The * * Widget number field is then derived from the W_NUM field for * * synthesizing a Crosstalk packet. The 5 bits of OFFSET are * * concatenated with SysAD[27:0] to form Crosstalk[33:0]. The IOSP * * field is used as Crosstalk[47], and remainder of the Crosstalk * * address bits (Crosstalk[46:34]) are always zero. While the maximum * * Crosstalk space addressable by the Shub is thus the lower * * 8-GBytes per widget (N-mode), only <SUP >7</SUP>/<SUB >32nds</SUB> * * of this space can be accessed. * * * ************************************************************************/typedef union ii_itte2_u { shubreg_t ii_itte2_regval; struct { shubreg_t i_offset : 5; shubreg_t i_rsvd_1 : 3; shubreg_t i_w_num : 4; shubreg_t i_iosp : 1; shubreg_t i_rsvd : 51; } ii_itte2_fld_s;} ii_itte2_u_t;/************************************************************************ * * * Description: There are seven instances of translation table entry * * registers. Each register maps a Shub Big Window to a 48-bit * * address on Crosstalk. * * For M-mode (128 nodes, 8 GBytes/node), SysAD[31:29] (Big Window * * number) are used to select one of these 7 registers. The Widget * * number field is then derived from the W_NUM field for synthesizing * * a Crosstalk packet. The 5 bits of OFFSET are concatenated with * * SysAD[28:0] to form Crosstalk[33:0]. The upper Crosstalk[47:34] * * are padded with zeros. Although the maximum Crosstalk space * * addressable by the Shub is thus the lower 16 GBytes per widget * * (M-mode), however only <SUP >7</SUP>/<SUB >32nds</SUB> of this * * space can be accessed. * * For the N-mode (256 nodes, 4 GBytes/node), SysAD[30:28] (Big * * Window number) are used to select one of these 7 registers. The * * Widget number field is then derived from the W_NUM field for * * synthesizing a Crosstalk packet. The 5 bits of OFFSET are * * concatenated with SysAD[27:0] to form Crosstalk[33:0]. The IOSP * * field is used as Crosstalk[47], and remainder of the Crosstalk * * address bits (Crosstalk[46:34]) are always zero. While the maximum * * Crosstalk space addressable by the SHub is thus the lower * * 8-GBytes per widget (N-mode), only <SUP >7</SUP>/<SUB >32nds</SUB> * * of this space can be accessed. * * * ************************************************************************/typedef union ii_itte3_u { shubreg_t ii_itte3_regval; struct { shubreg_t i_offset : 5; shubreg_t i_rsvd_1 : 3; shubreg_t i_w_num : 4; shubreg_t i_iosp : 1; shubreg_t i_rsvd : 51; } ii_itte3_fld_s;} ii_itte3_u_t;/************************************************************************ * * * Description: There are seven instances of translation table entry * * registers. Each register maps a SHub Big Window to a 48-bit * * address on Crosstalk. * * For M-mode (128 nodes, 8 GBytes/node), SysAD[31:29] (Big Window * * number) are used to select one of these 7 registers. The Widget * * number field is then derived from the W_NUM field for synthesizing * * a Crosstalk packet. The 5 bits of OFFSET are concatenated with * * SysAD[28:0] to form Crosstalk[33:0]. The upper Crosstalk[47:34] * * are padded with zeros. Although the maximum Crosstalk space * * addressable by the SHub is thus the lower 16 GBytes per widget * * (M-mode), however only <SUP >7</SUP>/<SUB >32nds</SUB> of this * * space can be accessed. * * For the N-mode (256 nodes, 4 GBytes/node), SysAD[30:28] (Big * * Window number) are used to select one of these 7 registers. The * * Widget number field is then derived from the W_NUM field for * * synthesizing a Crosstalk packet. The 5 bits of OFFSET are * * concatenated with SysAD[27:0] to form Crosstalk[33:0]. The IOSP * * field is used as Crosstalk[47], and remainder of the Crosstalk * * address bits (Crosstalk[46:34]) are always zero. While the maximum * * Crosstalk space addressable by the SHub is thus the lower * * 8-GBytes per widget (N-mode), only <SUP >7</SUP>/<SUB >32nds</SUB> * * of this space can be accessed. * * * ************************************************************************/typedef union ii_itte4_u { shubreg_t ii_itte4_regval; struct { shubreg_t i_offset : 5; shubreg_t i_rsvd_1 : 3; shubreg_t i_w_num : 4; shubreg_t i_iosp : 1; shubreg_t i_rsvd : 51; } ii_itte4_fld_s;} ii_itte4_u_t;/************************************************************************ * * * Description: There are seven instances of translation table entry * * registers. Each register maps a SHub Big Window to a 48-bit * * address on Crosstalk. * * For M-mode (128 nodes, 8 GBytes/node), SysAD[31:29] (Big Window *
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