shubio.h

该文件是rt_linux

/* $Id: shubio.h,v 1.1 2002/02/28 17:31:25 marcelo Exp $
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 1992 - 1997, 2000-2002 Silicon Graphics, Inc. All rights reserved.
 */

#ifndef _ASM_IA64_SN_SN2_SHUBIO_H
#define _ASM_IA64_SN_SN2_SHUBIO_H

#include <asm/sn/arch.h>

#define HUB_WIDGET_ID_MAX 0xf
#define IIO_NUM_ITTES   7
#define HUB_NUM_BIG_WINDOW      (IIO_NUM_ITTES - 1)

#define    IIO_WID                   0x00400000    /* Crosstalk Widget Identification */
                                                   /* This register is also accessible from
                                                    * Crosstalk at address 0x0.  */
#define    IIO_WSTAT                 0x00400008    /* Crosstalk Widget Status */
#define    IIO_WCR                   0x00400020    /* Crosstalk Widget Control Register */
#define    IIO_ILAPR                 0x00400100    /* IO Local Access Protection Register */
#define    IIO_ILAPO                 0x00400108    /* IO Local Access Protection Override */
#define    IIO_IOWA                  0x00400110    /* IO Outbound Widget Access */
#define    IIO_IIWA                  0x00400118    /* IO Inbound Widget Access */
#define    IIO_IIDEM                 0x00400120    /* IO Inbound Device Error Mask */
#define    IIO_ILCSR                 0x00400128    /* IO LLP Control and Status Register */
#define    IIO_ILLR                  0x00400130    /* IO LLP Log Register    */
#define    IIO_IIDSR                 0x00400138    /* IO Interrupt Destination */

#define    IIO_IGFX0                 0x00400140    /* IO Graphics Node-Widget Map 0 */
#define    IIO_IGFX1                 0x00400148    /* IO Graphics Node-Widget Map 1 */

#define    IIO_ISCR0                 0x00400150    /* IO Scratch Register 0 */
#define    IIO_ISCR1                 0x00400158    /* IO Scratch Register 1 */

#define    IIO_ITTE1                 0x00400160    /* IO Translation Table Entry 1 */
#define    IIO_ITTE2                 0x00400168    /* IO Translation Table Entry 2 */
#define    IIO_ITTE3                 0x00400170    /* IO Translation Table Entry 3 */
#define    IIO_ITTE4                 0x00400178    /* IO Translation Table Entry 4 */
#define    IIO_ITTE5                 0x00400180    /* IO Translation Table Entry 5 */
#define    IIO_ITTE6                 0x00400188    /* IO Translation Table Entry 6 */
#define    IIO_ITTE7                 0x00400190    /* IO Translation Table Entry 7 */

#define    IIO_IPRB0                 0x00400198    /* IO PRB Entry 0         */
#define    IIO_IPRB8                 0x004001A0    /* IO PRB Entry 8         */
#define    IIO_IPRB9                 0x004001A8    /* IO PRB Entry 9         */
#define    IIO_IPRBA                 0x004001B0    /* IO PRB Entry A         */
#define    IIO_IPRBB                 0x004001B8    /* IO PRB Entry B         */
#define    IIO_IPRBC                 0x004001C0    /* IO PRB Entry C         */
#define    IIO_IPRBD                 0x004001C8    /* IO PRB Entry D         */
#define    IIO_IPRBE                 0x004001D0    /* IO PRB Entry E         */
#define    IIO_IPRBF                 0x004001D8    /* IO PRB Entry F         */

#define    IIO_IXCC                  0x004001E0    /* IO Crosstalk Credit Count Timeout */
#define    IIO_IMEM                  0x004001E8    /* IO Miscellaneous Error Mask */
#define    IIO_IXTT                  0x004001F0    /* IO Crosstalk Timeout Threshold */
#define    IIO_IECLR                 0x004001F8    /* IO Error Clear Register */
#define    IIO_IBCR                  0x00400200    /* IO BTE Control Register */

#define    IIO_IXSM                  0x00400208    /* IO Crosstalk Spurious Message */
#define    IIO_IXSS                  0x00400210    /* IO Crosstalk Spurious Sideband */

#define    IIO_ILCT                  0x00400218    /* IO LLP Channel Test    */

#define    IIO_IIEPH1                0x00400220    /* IO Incoming Error Packet Header, Part 1 */
#define    IIO_IIEPH2                0x00400228    /* IO Incoming Error Packet Header, Part 2 */


#define    IIO_ISLAPR                0x00400230    /* IO SXB Local Access Protection Regster */
#define    IIO_ISLAPO                0x00400238    /* IO SXB Local Access Protection Override */

#define    IIO_IWI                   0x00400240    /* IO Wrapper Interrupt Register */
#define    IIO_IWEL                  0x00400248    /* IO Wrapper Error Log Register */
#define    IIO_IWC                   0x00400250    /* IO Wrapper Control Register */
#define    IIO_IWS                   0x00400258    /* IO Wrapper Status Register */
#define    IIO_IWEIM                 0x00400260    /* IO Wrapper Error Interrupt Masking Register */

#define    IIO_IPCA                  0x00400300    /* IO PRB Counter Adjust */

#define    IIO_IPRTE0_A              0x00400308    /* IO PIO Read Address Table Entry 0, Part A */
#define    IIO_IPRTE1_A              0x00400310    /* IO PIO Read Address Table Entry 1, Part A */
#define    IIO_IPRTE2_A              0x00400318    /* IO PIO Read Address Table Entry 2, Part A */
#define    IIO_IPRTE3_A               0x00400320    /* IO PIO Read Address Table Entry 3, Part A */
#define    IIO_IPRTE4_A               0x00400328    /* IO PIO Read Address Table Entry 4, Part A */
#define    IIO_IPRTE5_A               0x00400330    /* IO PIO Read Address Table Entry 5, Part A */
#define    IIO_IPRTE6_A               0x00400338    /* IO PIO Read Address Table Entry 6, Part A */
#define    IIO_IPRTE7_A               0x00400340    /* IO PIO Read Address Table Entry 7, Part A */

#define    IIO_IPRTE0_B              0x00400348    /* IO PIO Read Address Table Entry 0, Part B */
#define    IIO_IPRTE1_B              0x00400350    /* IO PIO Read Address Table Entry 1, Part B */
#define    IIO_IPRTE2_B              0x00400358    /* IO PIO Read Address Table Entry 2, Part B */
#define    IIO_IPRTE3_B               0x00400360    /* IO PIO Read Address Table Entry 3, Part B */
#define    IIO_IPRTE4_B               0x00400368    /* IO PIO Read Address Table Entry 4, Part B */
#define    IIO_IPRTE5_B               0x00400370    /* IO PIO Read Address Table Entry 5, Part B */
#define    IIO_IPRTE6_B               0x00400378    /* IO PIO Read Address Table Entry 6, Part B */
#define    IIO_IPRTE7_B               0x00400380    /* IO PIO Read Address Table Entry 7, Part B */

#define    IIO_IPDR                  0x00400388    /* IO PIO Deallocation Register */
#define    IIO_ICDR                  0x00400390    /* IO CRB Entry Deallocation Register */
#define    IIO_IFDR                  0x00400398    /* IO IOQ FIFO Depth Register */
#define    IIO_IIAP                  0x004003A0    /* IO IIQ Arbitration Parameters */
#define    IIO_ICMR                  0x004003A8    /* IO CRB Management Register */
#define    IIO_ICCR                  0x004003B0    /* IO CRB Control Register */
#define    IIO_ICTO                  0x004003B8    /* IO CRB Timeout         */
#define    IIO_ICTP                  0x004003C0    /* IO CRB Timeout Prescalar */

#define    IIO_ICRB0_A               0x00400400    /* IO CRB Entry 0_A       */
#define    IIO_ICRB0_B               0x00400408    /* IO CRB Entry 0_B       */
#define    IIO_ICRB0_C               0x00400410    /* IO CRB Entry 0_C       */
#define    IIO_ICRB0_D               0x00400418    /* IO CRB Entry 0_D       */
#define    IIO_ICRB0_E               0x00400420    /* IO CRB Entry 0_E       */

#define    IIO_ICRB1_A               0x00400430    /* IO CRB Entry 1_A       */
#define    IIO_ICRB1_B               0x00400438    /* IO CRB Entry 1_B       */
#define    IIO_ICRB1_C               0x00400440    /* IO CRB Entry 1_C       */
#define    IIO_ICRB1_D               0x00400448    /* IO CRB Entry 1_D       */
#define    IIO_ICRB1_E               0x00400450    /* IO CRB Entry 1_E       */

#define    IIO_ICRB2_A               0x00400460    /* IO CRB Entry 2_A       */
#define    IIO_ICRB2_B               0x00400468    /* IO CRB Entry 2_B       */
#define    IIO_ICRB2_C               0x00400470    /* IO CRB Entry 2_C       */
#define    IIO_ICRB2_D               0x00400478    /* IO CRB Entry 2_D       */
#define    IIO_ICRB2_E               0x00400480    /* IO CRB Entry 2_E       */

#define    IIO_ICRB3_A               0x00400490    /* IO CRB Entry 3_A       */
#define    IIO_ICRB3_B               0x00400498    /* IO CRB Entry 3_B       */
#define    IIO_ICRB3_C               0x004004a0    /* IO CRB Entry 3_C       */
#define    IIO_ICRB3_D               0x004004a8    /* IO CRB Entry 3_D       */
#define    IIO_ICRB3_E               0x004004b0    /* IO CRB Entry 3_E       */

#define    IIO_ICRB4_A               0x004004c0    /* IO CRB Entry 4_A       */
#define    IIO_ICRB4_B               0x004004c8    /* IO CRB Entry 4_B       */
#define    IIO_ICRB4_C               0x004004d0    /* IO CRB Entry 4_C       */
#define    IIO_ICRB4_D               0x004004d8    /* IO CRB Entry 4_D       */
#define    IIO_ICRB4_E               0x004004e0    /* IO CRB Entry 4_E       */

#define    IIO_ICRB5_A               0x004004f0    /* IO CRB Entry 5_A       */
#define    IIO_ICRB5_B               0x004004f8    /* IO CRB Entry 5_B       */
#define    IIO_ICRB5_C               0x00400500    /* IO CRB Entry 5_C       */
#define    IIO_ICRB5_D               0x00400508    /* IO CRB Entry 5_D       */
#define    IIO_ICRB5_E               0x00400510    /* IO CRB Entry 5_E       */

#define    IIO_ICRB6_A               0x00400520    /* IO CRB Entry 6_A       */
#define    IIO_ICRB6_B               0x00400528    /* IO CRB Entry 6_B       */
#define    IIO_ICRB6_C               0x00400530    /* IO CRB Entry 6_C       */
#define    IIO_ICRB6_D               0x00400538    /* IO CRB Entry 6_D       */
#define    IIO_ICRB6_E               0x00400540    /* IO CRB Entry 6_E       */

#define    IIO_ICRB7_A               0x00400550    /* IO CRB Entry 7_A       */
#define    IIO_ICRB7_B               0x00400558    /* IO CRB Entry 7_B       */
#define    IIO_ICRB7_C               0x00400560    /* IO CRB Entry 7_C       */
#define    IIO_ICRB7_D               0x00400568    /* IO CRB Entry 7_D       */
#define    IIO_ICRB7_E               0x00400570    /* IO CRB Entry 7_E       */

#define    IIO_ICRB8_A               0x00400580    /* IO CRB Entry 8_A       */
#define    IIO_ICRB8_B               0x00400588    /* IO CRB Entry 8_B       */
#define    IIO_ICRB8_C               0x00400590    /* IO CRB Entry 8_C       */
#define    IIO_ICRB8_D               0x00400598    /* IO CRB Entry 8_D       */
#define    IIO_ICRB8_E               0x004005a0    /* IO CRB Entry 8_E       */

#define    IIO_ICRB9_A               0x004005b0    /* IO CRB Entry 9_A       */
#define    IIO_ICRB9_B               0x004005b8    /* IO CRB Entry 9_B       */
#define    IIO_ICRB9_C               0x004005c0    /* IO CRB Entry 9_C       */
#define    IIO_ICRB9_D               0x004005c8    /* IO CRB Entry 9_D       */
#define    IIO_ICRB9_E               0x004005d0    /* IO CRB Entry 9_E       */

#define    IIO_ICRBA_A               0x004005e0    /* IO CRB Entry A_A       */
#define    IIO_ICRBA_B               0x004005e8    /* IO CRB Entry A_B       */
#define    IIO_ICRBA_C               0x004005f0    /* IO CRB Entry A_C       */
#define    IIO_ICRBA_D               0x004005f8    /* IO CRB Entry A_D       */
#define    IIO_ICRBA_E               0x00400600    /* IO CRB Entry A_E       */

#define    IIO_ICRBB_A               0x00400610    /* IO CRB Entry B_A       */
#define    IIO_ICRBB_B               0x00400618    /* IO CRB Entry B_B       */
#define    IIO_ICRBB_C               0x00400620    /* IO CRB Entry B_C       */
#define    IIO_ICRBB_D               0x00400628    /* IO CRB Entry B_D       */
#define    IIO_ICRBB_E               0x00400630    /* IO CRB Entry B_E       */

#define    IIO_ICRBC_A               0x00400640    /* IO CRB Entry C_A       */
#define    IIO_ICRBC_B               0x00400648    /* IO CRB Entry C_B       */
#define    IIO_ICRBC_C               0x00400650    /* IO CRB Entry C_C       */
#define    IIO_ICRBC_D               0x00400658    /* IO CRB Entry C_D       */
#define    IIO_ICRBC_E               0x00400660    /* IO CRB Entry C_E       */

#define    IIO_ICRBD_A               0x00400670    /* IO CRB Entry D_A       */
#define    IIO_ICRBD_B               0x00400678    /* IO CRB Entry D_B       */
#define    IIO_ICRBD_C               0x00400680    /* IO CRB Entry D_C       */
#define    IIO_ICRBD_D               0x00400688    /* IO CRB Entry D_D       */
#define    IIO_ICRBD_E               0x00400690    /* IO CRB Entry D_E       */

#define    IIO_ICRBE_A               0x004006a0    /* IO CRB Entry E_A       */
#define    IIO_ICRBE_B               0x004006a8    /* IO CRB Entry E_B       */
#define    IIO_ICRBE_C               0x004006b0    /* IO CRB Entry E_C       */
#define    IIO_ICRBE_D               0x004006b8    /* IO CRB Entry E_D       */
#define    IIO_ICRBE_E               0x004006c0    /* IO CRB Entry E_E       */

#define    IIO_ICSML                 0x00400700    /* IO CRB Spurious Message Low */
#define    IIO_ICSMM                 0x00400708    /* IO CRB Spurious Message Middle */
#define    IIO_ICSMH                 0x00400710    /* IO CRB Spurious Message High */

#define    IIO_IDBSS                 0x00400718    /* IO Debug Submenu Select */

#define    IIO_IBLS0                 0x00410000    /* IO BTE Length Status 0 */
#define    IIO_IBSA0                 0x00410008    /* IO BTE Source Address 0 */
#define    IIO_IBDA0                 0x00410010    /* IO BTE Destination Address 0 */
#define    IIO_IBCT0                 0x00410018    /* IO BTE Control Terminate 0 */
#define    IIO_IBNA0                 0x00410020    /* IO BTE Notification Address 0 */
#define    IIO_IBIA0                 0x00410028    /* IO BTE Interrupt Address 0 */
#define    IIO_IBLS1                 0x00420000    /* IO BTE Length Status 1 */
#define    IIO_IBSA1                 0x00420008    /* IO BTE Source Address 1 */
#define    IIO_IBDA1                 0x00420010    /* IO BTE Destination Address 1 */
#define    IIO_IBCT1                 0x00420018    /* IO BTE Control Terminate 1 */
#define    IIO_IBNA1                 0x00420020    /* IO BTE Notification Address 1 */
#define    IIO_IBIA1                 0x00420028    /* IO BTE Interrupt Address 1 */

#define    IIO_IPCR                  0x00430000    /* IO Performance Control */
#define    IIO_IPPR                  0x00430008    /* IO Performance Profiling */


#ifndef __ASSEMBLY__

/************************************************************************
 *                                                                      *
 * Description:  This register echoes some information from the         *
 * LB_REV_ID register. It is available through Crosstalk as described   *
 * above. The REV_NUM and MFG_NUM fields receive their values from      *
 * the REVISION and MANUFACTURER fields in the LB_REV_ID register.      *
 * The PART_NUM field's value is the Crosstalk device ID number that    *
 * Steve Miller assigned to the SHub chip.                              *
 *                                                                      *
 ************************************************************************/

typedef union ii_wid_u {
	shubreg_t	ii_wid_regval;
	struct	{
		shubreg_t	w_rsvd_1		  :	 1;
		shubreg_t	w_mfg_num		  :	11;
		shubreg_t	w_part_num		  :	16;
		shubreg_t	w_rev_num		  :	 4;
		shubreg_t	w_rsvd			  :	32;
	} ii_wid_fld_s;
} ii_wid_u_t;


/************************************************************************