e100.h

该文件是rt_linux

	cb_header_t filter_cb_hdr;
	u32 filter_data[MAX_FILTER];
} filter_cb_t __attribute__ ((__packed__));

/* NON_TRANSMIT_CB -- Generic Non-Transmit Command Block 
 */
typedef struct _nxmit_cb_t {
	union {
		config_cb_t config;
		ia_cb_t setup;
		load_ucode_cb_t load_ucode;
		mltcst_cb_t multicast;
		filter_cb_t filter;
	} ntcb;
} nxmit_cb_t __attribute__ ((__packed__));

/*Block for queuing for postponed execution of the non-transmit commands*/
typedef struct _nxmit_cb_entry_t {
	struct list_head list_elem;
	nxmit_cb_t *non_tx_cmd;
	dma_addr_t dma_addr;
	unsigned long expiration_time;
} nxmit_cb_entry_t;

/* States for postponed non tx commands execution */
typedef enum _non_tx_cmd_state_t {
	E100_NON_TX_IDLE = 0,	/* No queued NON-TX commands */
	E100_WAIT_TX_FINISH,	/* Wait for completion of the TX activities */
	E100_WAIT_NON_TX_FINISH	/* Wait for completion of the non TX command */
} non_tx_cmd_state_t;

/* some defines for the ipcb */
#define IPCB_IP_CHECKSUM_ENABLE 	BIT_4
#define IPCB_TCPUDP_CHECKSUM_ENABLE	BIT_5
#define IPCB_TCP_PACKET 		BIT_6
#define IPCB_LARGESEND_ENABLE 		BIT_7
#define IPCB_HARDWAREPARSING_ENABLE	BIT_0
#define IPCB_INSERTVLAN_ENABLE 		BIT_1
#define IPCB_IP_ACTIVATION_DEFAULT      IPCB_HARDWAREPARSING_ENABLE

#define FOLD_CSUM(_XSUM)  ((((_XSUM << 16) | (_XSUM >> 16)) + _XSUM) >> 16)

/* Transmit Buffer Descriptor (TBD)*/
typedef struct _tbd_t {
	u32 tbd_buf_addr;	/* Physical Transmit Buffer Address */
	u16 tbd_buf_cnt;	/* Actual Count Of Bytes */
	u16 padd;
} tbd_t __attribute__ ((__packed__));

/* d102 specific fields */
typedef struct _tcb_ipcb_t {
	u16 schedule_low;
	u8 ip_schedule;
	u8 ip_activation_high;
	u16 vlan;
	u8 ip_header_offset;
	u8 tcp_header_offset;
	union {
		u32 sec_rec_phys_addr;
		u32 tbd_zero_address;
	} tbd_sec_addr;
	union {
		u16 sec_rec_size;
		u16 tbd_zero_size;
	} tbd_sec_size;
	u16 total_tcp_payload;
} tcb_ipcb_t __attribute__ ((__packed__));

#define E100_TBD_ARRAY_SIZE (2+MAX_SKB_FRAGS)

/* Transmit Command Block (TCB)*/
struct _tcb_t {
	cb_header_t tcb_hdr;
	u32 tcb_tbd_ptr;	/* TBD address */
	u16 tcb_cnt;	/* Data Bytes In TCB past header */
	u8 tcb_thrshld;	/* TX Threshold for FIFO Extender */
	u8 tcb_tbd_num;

	union {
		tcb_ipcb_t ipcb;	/* d102 ipcb fields */
		tbd_t tbd_array[E100_TBD_ARRAY_SIZE];
	} tcbu;

	/* From here onward we can dump anything we want as long as the
	 * size of the total structure is a multiple of a paragraph
	 * boundary ( i.e. -16 bit aligned ).
	 */
	tbd_t *tbd_ptr;

	u32 tcb_tbd_dflt_ptr;	/* TBD address for non-segmented packet */
	u32 tcb_tbd_expand_ptr;	/* TBD address for segmented packet */

	struct sk_buff *tcb_skb;	/* the associated socket buffer */
	dma_addr_t tcb_phys;	/* phys addr of the TCB */
} __attribute__ ((__packed__));

#define _TCB_T_
typedef struct _tcb_t tcb_t;

/* Receive Frame Descriptor (RFD) - will be using the simple model*/
struct _rfd_t {
	/* 8255x */
	cb_header_t rfd_header;
	u32 rfd_rbd_ptr;	/* Receive Buffer Descriptor Addr */
	u16 rfd_act_cnt;	/* Number Of Bytes Received */
	u16 rfd_sz;	/* Number Of Bytes In RFD */
	/* D102 aka Gamla */
	u16 vlanid;
	u8 rcvparserstatus;
	u8 reserved;
	u16 securitystatus;
	u8 checksumstatus;
	u8 zerocopystatus;
	u8 pad[8];	/* data should be 16 byte aligned */
	u8 data[RFD_DATA_SIZE];

} __attribute__ ((__packed__));

#define _RFD_T_
typedef struct _rfd_t rfd_t;

/* Receive Buffer Descriptor (RBD)*/
typedef struct _rbd_t {
	u16 rbd_act_cnt;	/* Number Of Bytes Received */
	u16 rbd_filler;
	u32 rbd_lnk_addr;	/* Link To Next RBD */
	u32 rbd_rcb_addr;	/* Receive Buffer Address */
	u16 rbd_sz;	/* Receive Buffer Size */
	u16 rbd_filler1;
} rbd_t __attribute__ ((__packed__));

/*
 * This structure is used to maintain a FIFO access to a resource that is 
 * maintained as a circular queue. The resource to be maintained is pointed
 * to by the "data" field in the structure below. In this driver the TCBs', 
 * TBDs' & RFDs' are maintained  as a circular queue & are managed thru this
 * structure.
 */
typedef struct _buf_pool_t {
	unsigned int head;	/* index to first used resource */
	unsigned int tail;	/* index to last used resource */
	void *data;		/* points to resource pool */
} buf_pool_t;

/*Rx skb holding structure*/
struct rx_list_elem {
	struct list_head list_elem;
	dma_addr_t dma_addr;
	struct sk_buff *skb;
};

enum next_cu_cmd_e { RESUME_NO_WAIT = 0, RESUME_WAIT, START_WAIT };
enum zlock_state_e { ZLOCK_INITIAL, ZLOCK_READING, ZLOCK_SLEEPING };
enum tx_queue_stop_type { LONG_STOP = 0, SHORT_STOP };

/* 64 bit aligned size */
#define E100_SIZE_64A(X) ((sizeof(X) + 7) & ~0x7)

typedef struct _bd_dma_able_t {
	char selftest[E100_SIZE_64A(self_test_t)];
	char stats_counters[E100_SIZE_64A(max_counters_t)];
} bd_dma_able_t;

/* bit masks for bool parameters */
#define PRM_XSUMRX       0x00000001
#define PRM_UCODE        0x00000002
#define PRM_FC           0x00000004
#define PRM_IFS          0x00000008
#define PRM_BUNDLE_SMALL 0x00000010

struct cfg_params {
	int e100_speed_duplex;
	int RxDescriptors;
	int TxDescriptors;
	int IntDelay;
	int BundleMax;
	int ber;
	u32 b_params;
};
struct ethtool_lpbk_data{
        dma_addr_t dma_handle;
        tcb_t *tcb;
        rfd_t *rfd;

};

struct e100_private {
	u32 flags;		/* board management flags */
	u32 tx_per_underrun;	/* number of good tx frames per underrun */
	unsigned int tx_count;	/* count of tx frames, so we can request an interrupt */
	u8 tx_thld;		/* stores transmit threshold */
	u16 eeprom_size;
	u32 pwa_no;		/* PWA: xxxxxx-0xx */
	u8 perm_node_address[ETH_ALEN];
	struct list_head active_rx_list;	/* list of rx buffers */
	struct list_head rx_struct_pool;	/* pool of rx buffer struct headers */
	u16 rfd_size;			/* size of the adapter's RFD struct */
	int skb_req;			/* number of skbs neede by the adapter */
	u8 intr_mask;			/* mask for interrupt status */

	void *dma_able;			/* dma allocated structs */
	dma_addr_t dma_able_phys;
	self_test_t *selftest;		/* pointer to self test area */
	dma_addr_t selftest_phys;	/* phys addr of selftest */
	max_counters_t *stats_counters;	/* pointer to stats table */
	dma_addr_t stat_cnt_phys;	/* phys addr of stat counter area */

	stat_mode_t stat_mode;	/* statistics mode: extended, TCO, basic */
	scb_t *scb;		/* memory mapped ptr to 82557 scb */

	tcb_t *last_tcb;	/* pointer to last tcb sent */
	buf_pool_t tcb_pool;	/* adapter's TCB array */
	dma_addr_t tcb_phys;	/* phys addr of start of TCBs */

	u16 cur_line_speed;
	u16 cur_dplx_mode;

	struct net_device *device;
	struct pci_dev *pdev;
	struct driver_stats drv_stats;

	u8 rev_id;		/* adapter PCI revision ID */
	unsigned long device_type;	/* device type from e100_vendor.h */

	unsigned int phy_addr;	/* address of PHY component */
	unsigned int PhyId;	/* ID of PHY component */
	unsigned int PhyState;	/* state for the fix squelch algorithm */
	unsigned int PhyDelay;	/* delay for the fix squelch algorithm */

	/* Lock defintions for the driver */
	spinlock_t bd_lock;		/* board lock */
	spinlock_t bd_non_tx_lock;	/* Non transmit command lock  */
	spinlock_t config_lock;		/* config block lock */
	spinlock_t mdi_access_lock;	/* mdi lock */

	struct timer_list watchdog_timer;	/* watchdog timer id */

	/* non-tx commands parameters */
	struct timer_list nontx_timer_id;	/* non-tx timer id */
	struct list_head non_tx_cmd_list;
	non_tx_cmd_state_t non_tx_command_state;
	nxmit_cb_entry_t *same_cmd_entry[CB_MAX_NONTX_CMD];

	enum next_cu_cmd_e next_cu_cmd;

	/* Zero Locking Algorithm data members */
	enum zlock_state_e zlock_state;
	u8 zlock_read_data[16];	/* number of times each value 0-15 was read */
	u16 zlock_read_cnt;	/* counts number of reads */
	ulong zlock_sleep_cnt;	/* keeps track of "sleep" time */

	u8 config[CB_CFIG_BYTE_COUNT + CB_CFIG_D102_BYTE_COUNT];

	/* IFS params */
	u8 ifs_state;
	u8 ifs_value;

	struct cfg_params params;	/* adapter's command line parameters */

	struct proc_dir_entry *proc_parent;

	rwlock_t isolate_lock;
	int driver_isolated;
	char *id_string;
	char *cable_status;
	char *mdix_status;

	/* Variables for HWI */
	int saved_open_circut;
	int saved_short_circut;
	int saved_distance;
	int saved_i;
	int saved_same;
	unsigned char hwi_started;
	struct timer_list hwi_timer;	/* hwi timer id */

	u32 speed_duplex_caps;	/* adapter's speed/duplex capabilities */

	/* WOL params for ethtool */
	u32 wolsupported;
	u32 wolopts;
	u16 ip_lbytes;
	struct ethtool_lpbk_data loopback;
	struct timer_list blink_timer;	/* led blink timer id */

#ifdef CONFIG_PM
	u32 pci_state[16];
#endif
	char ifname[IFNAMSIZ];
};

#define E100_AUTONEG        0
#define E100_SPEED_10_HALF  1
#define E100_SPEED_10_FULL  2
#define E100_SPEED_100_HALF 3
#define E100_SPEED_100_FULL 4

/********* function prototypes *************/
extern void e100_isolate_driver(struct e100_private *bdp);
extern void e100_sw_reset(struct e100_private *bdp, u32 reset_cmd);
extern void e100_start_cu(struct e100_private *bdp, tcb_t *tcb);
extern void e100_free_non_tx_cmd(struct e100_private *bdp,
				 nxmit_cb_entry_t *non_tx_cmd);
extern nxmit_cb_entry_t *e100_alloc_non_tx_cmd(struct e100_private *bdp);
extern unsigned char e100_exec_non_cu_cmd(struct e100_private *bdp,
					  nxmit_cb_entry_t *cmd);
extern unsigned char e100_selftest(struct e100_private *bdp, u32 *st_timeout,
				   u32 *st_result);
extern unsigned char e100_get_link_state(struct e100_private *bdp);
extern unsigned char e100_wait_scb(struct e100_private *bdp);

extern void e100_deisolate_driver(struct e100_private *bdp,
				  u8 recover, u8 full_reset);
extern unsigned char e100_hw_reset_recover(struct e100_private *bdp,
					   u32 reset_cmd);

#define ROM_TEST_FAIL		0x01
#define REGISTER_TEST_FAIL	0x02
#define SELF_TEST_FAIL		0x04
#define TEST_TIMEOUT		0x08

enum test_offsets {
	E100_EEPROM_TEST_FAIL = 0,
	E100_CHIP_TIMEOUT,
	E100_ROM_TEST_FAIL,
	E100_REG_TEST_FAIL,
	E100_MAC_TEST_FAIL,
	E100_LPBK_MAC_FAIL,
	E100_LPBK_PHY_FAIL,
	E100_MAX_TEST_RES
};

#endif